Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: ASPEED AST2600 i3c controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Jeremy Kerr <jk@codeconstruct.com.au> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: i3c.yaml# |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | const: aspeed,ast2600-i3c |
| 18 | |
| 19 | reg: |
| 20 | maxItems: 1 |
| 21 | |
| 22 | clocks: |
| 23 | maxItems: 1 |
| 24 | |
| 25 | resets: |
| 26 | maxItems: 1 |
| 27 | |
| 28 | interrupts: |
| 29 | maxItems: 1 |
| 30 | |
| 31 | sda-pullup-ohms: |
| 32 | enum: [545, 750, 2000] |
| 33 | default: 2000 |
| 34 | description: | |
| 35 | Value to configure SDA pullup resistor, in Ohms. |
| 36 | |
| 37 | aspeed,global-regs: |
| 38 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| 39 | items: |
| 40 | - items: |
| 41 | - description: phandle to i3c global register syscon node |
| 42 | - description: index of this i3c controller in the global register set |
| 43 | description: | |
| 44 | A (phandle, controller index) reference to the i3c global register set |
| 45 | used for this device. |
| 46 | |
| 47 | required: |
| 48 | - compatible |
| 49 | - reg |
| 50 | - clocks |
| 51 | - interrupts |
| 52 | - aspeed,global-regs |
| 53 | |
| 54 | unevaluatedProperties: false |
| 55 | |
| 56 | examples: |
| 57 | - | |
| 58 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 59 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 60 | i3c@2000 { |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 61 | compatible = "aspeed,ast2600-i3c"; |
| 62 | reg = <0x2000 0x1000>; |
| 63 | #address-cells = <3>; |
| 64 | #size-cells = <0>; |
| 65 | clocks = <&syscon 0>; |
| 66 | resets = <&syscon 0>; |
| 67 | aspeed,global-regs = <&i3c_global 0>; |
| 68 | pinctrl-names = "default"; |
| 69 | pinctrl-0 = <&pinctrl_i3c1_default>; |
| 70 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; |
| 71 | }; |
| 72 | ... |