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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Bifrost GPU
8
9maintainers:
10 - Rob Herring <robh@kernel.org>
11
12properties:
13 $nodename:
14 pattern: '^gpu@[a-f0-9]+$'
15
16 compatible:
17 oneOf:
18 - items:
19 - enum:
20 - amlogic,meson-g12a-mali
21 - mediatek,mt8183-mali
22 - mediatek,mt8183b-mali
23 - mediatek,mt8186-mali
24 - realtek,rtd1619-mali
25 - renesas,r9a07g044-mali
26 - renesas,r9a07g054-mali
27 - rockchip,px30-mali
28 - rockchip,rk3568-mali
29 - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
30 - items:
31 - enum:
32 - mediatek,mt8195-mali
33 - const: mediatek,mt8192-mali
34 - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
35 - items:
36 - enum:
37 - mediatek,mt8192-mali
38 - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
39
40 reg:
41 maxItems: 1
42
43 interrupts:
44 minItems: 3
45 items:
46 - description: Job interrupt
47 - description: MMU interrupt
48 - description: GPU interrupt
49 - description: Event interrupt
50
51 interrupt-names:
52 minItems: 3
53 items:
54 - const: job
55 - const: mmu
56 - const: gpu
57 - const: event
58
59 clocks:
60 minItems: 1
61 maxItems: 3
62
63 clock-names: true
64
65 mali-supply: true
66
67 sram-supply: true
68
69 operating-points-v2: true
70
71 power-domains:
72 minItems: 1
73 maxItems: 5
74
75 power-domain-names:
76 minItems: 2
77 maxItems: 5
78
79 resets:
80 minItems: 1
81 maxItems: 3
82
83 reset-names: true
84
85 "#cooling-cells":
86 const: 2
87
88 dynamic-power-coefficient:
89 $ref: /schemas/types.yaml#/definitions/uint32
90 description:
91 A u32 value that represents the running time dynamic
92 power coefficient in units of uW/MHz/V^2. The
93 coefficient can either be calculated from power
94 measurements or derived by analysis.
95
96 The dynamic power consumption of the GPU is
97 proportional to the square of the Voltage (V) and
98 the clock frequency (f). The coefficient is used to
99 calculate the dynamic power as below -
100
101 Pdyn = dynamic-power-coefficient * V^2 * f
102
103 where voltage is in V, frequency is in MHz.
104
105 dma-coherent: true
106
107 nvmem-cell-names:
108 items:
109 - const: speed-bin
110
111 nvmem-cells:
112 maxItems: 1
113
114required:
115 - compatible
116 - reg
117 - interrupts
118 - interrupt-names
119 - clocks
120
121additionalProperties: false
122
123allOf:
124 - if:
125 properties:
126 compatible:
127 contains:
128 const: amlogic,meson-g12a-mali
129 then:
130 properties:
131 power-domains:
132 maxItems: 1
133 power-domain-names: false
134 required:
135 - resets
136 - if:
137 properties:
138 compatible:
139 contains:
140 enum:
141 - renesas,r9a07g044-mali
142 - renesas,r9a07g054-mali
143 then:
144 properties:
145 interrupts:
146 minItems: 4
147 interrupt-names:
148 minItems: 4
149 clocks:
150 minItems: 3
151 clock-names:
152 items:
153 - const: gpu
154 - const: bus
155 - const: bus_ace
156 power-domains:
157 maxItems: 1
158 power-domain-names: false
159 resets:
160 minItems: 3
161 reset-names:
162 items:
163 - const: rst
164 - const: axi_rst
165 - const: ace_rst
166 required:
167 - clock-names
168 - power-domains
169 - resets
170 - reset-names
171 - if:
172 properties:
173 compatible:
174 contains:
175 const: mediatek,mt8183-mali
176 then:
177 properties:
178 power-domains:
179 minItems: 3
180 maxItems: 3
181 power-domain-names:
182 items:
183 - const: core0
184 - const: core1
185 - const: core2
186
187 required:
188 - sram-supply
189 - power-domains
190 - power-domain-names
191 else:
192 properties:
193 sram-supply: false
194 - if:
195 properties:
196 compatible:
197 contains:
198 const: mediatek,mt8183b-mali
199 then:
200 properties:
201 power-domains:
202 minItems: 3
203 maxItems: 3
204 power-domain-names:
205 items:
206 - const: core0
207 - const: core1
208 - const: core2
209 required:
210 - power-domains
211 - power-domain-names
212 - if:
213 properties:
214 compatible:
215 contains:
216 const: mediatek,mt8186-mali
217 then:
218 properties:
219 power-domains:
220 minItems: 2
221 maxItems: 2
222 power-domain-names:
223 items:
224 - const: core0
225 - const: core1
226 required:
227 - power-domains
228 - power-domain-names
229 - if:
230 properties:
231 compatible:
232 contains:
233 const: mediatek,mt8192-mali
234 then:
235 properties:
236 power-domains:
237 minItems: 5
238 power-domain-names:
239 items:
240 - const: core0
241 - const: core1
242 - const: core2
243 - const: core3
244 - const: core4
245 required:
246 - power-domains
247 - power-domain-names
248 - if:
249 properties:
250 compatible:
251 contains:
252 const: rockchip,rk3568-mali
253 then:
254 properties:
255 clocks:
256 minItems: 2
257 clock-names:
258 items:
259 - const: gpu
260 - const: bus
261 power-domains:
262 maxItems: 1
263 power-domain-names: false
264 required:
265 - clock-names
266
267examples:
268 - |
269 #include <dt-bindings/interrupt-controller/irq.h>
270 #include <dt-bindings/interrupt-controller/arm-gic.h>
271
272 gpu@ffe40000 {
273 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
274 reg = <0xffe40000 0x10000>;
275 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
276 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
277 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
278 interrupt-names = "job", "mmu", "gpu";
279 clocks = <&clk 1>;
280 mali-supply = <&vdd_gpu>;
281 operating-points-v2 = <&gpu_opp_table>;
282 resets = <&reset 0>, <&reset 1>;
283 };
284
285 gpu_opp_table: opp-table {
286 compatible = "operating-points-v2";
287
288 opp-533000000 {
289 opp-hz = /bits/ 64 <533000000>;
290 opp-microvolt = <1250000>;
291 };
292 opp-450000000 {
293 opp-hz = /bits/ 64 <450000000>;
294 opp-microvolt = <1150000>;
295 };
296 opp-400000000 {
297 opp-hz = /bits/ 64 <400000000>;
298 opp-microvolt = <1125000>;
299 };
300 opp-350000000 {
301 opp-hz = /bits/ 64 <350000000>;
302 opp-microvolt = <1075000>;
303 };
304 opp-266000000 {
305 opp-hz = /bits/ 64 <266000000>;
306 opp-microvolt = <1025000>;
307 };
308 opp-160000000 {
309 opp-hz = /bits/ 64 <160000000>;
310 opp-microvolt = <925000>;
311 };
312 opp-100000000 {
313 opp-hz = /bits/ 64 <100000000>;
314 opp-microvolt = <912500>;
315 };
316 };
317
318...