| Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/dma/marvell,mmp-dma.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Marvell MMP DMA controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Duje Mihanović <duje.mihanovic@skole.hr> |
| 11 | |
| 12 | description: |
| 13 | Marvell MMP SoCs may have two types of DMA controllers, peripheral and audio. |
| 14 | |
| 15 | properties: |
| 16 | compatible: |
| 17 | enum: |
| 18 | - marvell,pdma-1.0 |
| 19 | - marvell,adma-1.0 |
| 20 | - marvell,pxa910-squ |
| 21 | |
| 22 | reg: |
| 23 | maxItems: 1 |
| 24 | |
| 25 | interrupts: |
| 26 | description: |
| 27 | Interrupt lines for the controller, may be shared or one per DMA channel |
| 28 | minItems: 1 |
| 29 | |
| 30 | asram: |
| 31 | description: |
| 32 | A phandle to the SRAM pool |
| 33 | $ref: /schemas/types.yaml#/definitions/phandle |
| 34 | |
| 35 | '#dma-channels': |
| 36 | deprecated: true |
| 37 | |
| 38 | '#dma-requests': |
| 39 | deprecated: true |
| 40 | |
| 41 | required: |
| 42 | - compatible |
| 43 | - reg |
| 44 | - interrupts |
| 45 | - '#dma-cells' |
| 46 | |
| 47 | allOf: |
| 48 | - $ref: dma-controller.yaml# |
| 49 | - if: |
| 50 | properties: |
| 51 | compatible: |
| 52 | contains: |
| 53 | enum: |
| 54 | - marvell,pdma-1.0 |
| 55 | then: |
| 56 | properties: |
| 57 | asram: false |
| 58 | else: |
| 59 | required: |
| 60 | - asram |
| 61 | |
| 62 | unevaluatedProperties: false |
| 63 | |
| 64 | examples: |
| 65 | - | |
| 66 | dma-controller@d4000000 { |
| 67 | compatible = "marvell,pdma-1.0"; |
| 68 | reg = <0xd4000000 0x10000>; |
| 69 | interrupts = <47>; |
| 70 | #dma-cells = <2>; |
| 71 | dma-channels = <16>; |
| 72 | }; |