Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/imx6q-clock.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Freescale i.MX6 Quad Clock Controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Anson Huang <Anson.Huang@nxp.com> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | const: fsl,imx6q-ccm |
| 15 | |
| 16 | reg: |
| 17 | maxItems: 1 |
| 18 | |
| 19 | interrupts: |
| 20 | description: CCM provides 2 interrupt requests, request 1 is to generate |
| 21 | interrupt for frequency or mux change, request 2 is to generate |
| 22 | interrupt for oscillator read or PLL lock. |
| 23 | items: |
| 24 | - description: CCM interrupt request 1 |
| 25 | - description: CCM interrupt request 2 |
| 26 | |
| 27 | '#clock-cells': |
| 28 | const: 1 |
| 29 | |
| 30 | clocks: |
| 31 | items: |
| 32 | - description: 24m osc |
| 33 | - description: 32k osc |
| 34 | - description: ckih1 clock input |
| 35 | - description: anaclk1 clock input |
| 36 | - description: anaclk2 clock input |
| 37 | |
| 38 | clock-names: |
| 39 | items: |
| 40 | - const: osc |
| 41 | - const: ckil |
| 42 | - const: ckih1 |
| 43 | - const: anaclk1 |
| 44 | - const: anaclk2 |
| 45 | |
| 46 | fsl,pmic-stby-poweroff: |
| 47 | $ref: /schemas/types.yaml#/definitions/flag |
| 48 | description: | |
| 49 | Use this property if the SoC should be powered off by external power |
| 50 | management IC (PMIC) triggered via PMIC_STBY_REQ signal. |
| 51 | Boards that are designed to initiate poweroff on PMIC_ON_REQ signal should |
| 52 | be using "syscon-poweroff" driver instead. |
| 53 | |
| 54 | required: |
| 55 | - compatible |
| 56 | - reg |
| 57 | - interrupts |
| 58 | - '#clock-cells' |
| 59 | |
| 60 | additionalProperties: false |
| 61 | |
| 62 | examples: |
| 63 | # Clock Control Module node: |
| 64 | - | |
| 65 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 66 | |
| 67 | clock-controller@20c4000 { |
| 68 | compatible = "fsl,imx6q-ccm"; |
| 69 | reg = <0x020c4000 0x4000>; |
| 70 | interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, |
| 71 | <0 88 IRQ_TYPE_LEVEL_HIGH>; |
| 72 | #clock-cells = <1>; |
| 73 | }; |