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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8M Family Anatop Module
8
9maintainers:
10 - Peng Fan <peng.fan@nxp.com>
11
12description: |
13 NXP i.MX8M Family anatop PLL module which generates PLL to CCM root.
14
15properties:
16 compatible:
17 oneOf:
18 - enum:
19 - fsl,imx8mm-anatop
20 - fsl,imx8mq-anatop
21 - items:
22 - enum:
23 - fsl,imx8mn-anatop
24 - fsl,imx8mp-anatop
25 - const: fsl,imx8mm-anatop
26
27 reg:
28 maxItems: 1
29
30 interrupts:
31 maxItems: 1
32
33 '#clock-cells':
34 const: 1
35
36required:
37 - compatible
38 - reg
39 - '#clock-cells'
40
41additionalProperties: false
42
43examples:
44 - |
45 anatop: clock-controller@30360000 {
46 compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
47 reg = <0x30360000 0x10000>;
48 #clock-cells = <1>;
49 };
50
51...