| Angelo Dureghello | c6164c9 | 2019-03-13 21:46:41 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it> |
| 4 | */ |
| 5 | |
| 6 | / { |
| 7 | compatible = "fsl,mcf5253"; |
| 8 | |
| 9 | aliases { |
| 10 | serial0 = &uart0; |
| 11 | }; |
| 12 | |
| 13 | soc { |
| 14 | compatible = "simple-bus"; |
| 15 | #address-cells = <1>; |
| 16 | #size-cells = <1>; |
| 17 | |
| 18 | mbar: mbar@10000000 { |
| 19 | compatible = "simple-bus"; |
| 20 | #address-cells = <1>; |
| 21 | #size-cells = <1>; |
| 22 | ranges = <0x00000000 0x10000000 0x10000>; |
| 23 | reg = <0x10000000 0x10000>; |
| 24 | |
| 25 | uart0: uart@1c0 { |
| 26 | compatible = "fsl,mcf-uart"; |
| 27 | reg = <0x1c0 0x40>; |
| 28 | status = "disabled"; |
| 29 | }; |
| 30 | |
| 31 | uart1: uart@200 { |
| 32 | compatible = "fsl,mcf-uart"; |
| 33 | reg = <0x200 0x40>; |
| 34 | status = "disabled"; |
| 35 | }; |
| 36 | |
| 37 | uart3: uart@c00 { |
| 38 | compatible = "fsl,mcf-uart"; |
| 39 | reg = <0xc00 0x40>; |
| 40 | status = "disabled"; |
| 41 | }; |
| Angelo Dureghello | d768df1 | 2023-04-05 00:59:27 +0200 | [diff] [blame] | 42 | |
| 43 | i2c0: i2c@280 { |
| 44 | compatible = "fsl-i2c"; |
| 45 | #address-cells=<1>; |
| 46 | #size-cells=<0>; |
| 47 | cell-index = <0>; |
| 48 | reg = <0x280 0x14>; |
| 49 | clock-frequency = <100000>; |
| 50 | status = "disabled"; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | mbar2: mbar2@80000000 { |
| 55 | compatible = "simple-bus"; |
| 56 | #address-cells = <1>; |
| 57 | #size-cells = <1>; |
| 58 | ranges = <0x00000000 0x80000000 0x10000>; |
| 59 | reg = <0x80000000 0x10000>; |
| 60 | |
| 61 | i2c1: i2c@440 { |
| 62 | compatible = "fsl-i2c"; |
| 63 | #address-cells=<1>; |
| 64 | #size-cells=<0>; |
| 65 | cell-index = <0>; |
| 66 | reg = <0x440 0x14>; |
| 67 | clock-frequency = <100000>; |
| 68 | status = "disabled"; |
| 69 | }; |
| Angelo Dureghello | c6164c9 | 2019-03-13 21:46:41 +0100 | [diff] [blame] | 70 | }; |
| 71 | }; |
| 72 | }; |