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git01.mediatek.com / filogic / uboot / 411c609d90922ec1011067fb19619448b1c9845e / . / arch / arm / dts / k3-j721e-common-proc-board-u-boot.dtsi
blob: 974dae841616f0edfb36a7d339f42717d85121ac [file] [log] [blame]
Lokesh Vutlaac736802019-06-13 10:29:55 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]6#include <dt-bindings/net/ti-dp83867.h>
7
Lokesh Vutlaac736802019-06-13 10:29:55 +0530[diff] [blame]8/ {
9 chosen {
10 stdout-path = "serial2:115200n8";
11 tick-timer = &timer1;
12 };
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]13
14 aliases {
15 ethernet0 = &cpsw_port1;
Lokesh Vutla62eada12021-02-01 11:26:40 +0530[diff] [blame]16 spi0 = &ospi0;
17 spi1 = &ospi1;
18 remoteproc0 = &mcu_r5fss0_core0;
19 remoteproc1 = &mcu_r5fss0_core1;
20 remoteproc2 = &main_r5fss0_core0;
21 remoteproc3 = &main_r5fss0_core1;
22 remoteproc4 = &main_r5fss1_core0;
23 remoteproc5 = &main_r5fss1_core1;
24 remoteproc6 = &c66_0;
25 remoteproc7 = &c66_1;
26 remoteproc8 = &c71_0;
27 i2c0 = &wkup_i2c0;
28 i2c1 = &mcu_i2c0;
29 i2c2 = &mcu_i2c1;
30 i2c3 = &main_i2c0;
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]31 };
Lokesh Vutlaac736802019-06-13 10:29:55 +0530[diff] [blame]32};
33
34&cbass_main{
35 u-boot,dm-spl;
Lokesh Vutla62eada12021-02-01 11:26:40 +0530[diff] [blame]36
37 main-navss {
38 u-boot,dm-spl;
39 };
Lokesh Vutlaac736802019-06-13 10:29:55 +0530[diff] [blame]40};
41
42&cbass_mcu_wakeup {
43 u-boot,dm-spl;
44
45 timer1: timer@40400000 {
46 compatible = "ti,omap5430-timer";
47 reg = <0x0 0x40400000 0x0 0x80>;
48 ti,timer-alwon;
Tero Kristo94388c82021-06-11 11:45:27 +0300[diff] [blame]49 clock-frequency = <250000000>;
Lokesh Vutlaac736802019-06-13 10:29:55 +0530[diff] [blame]50 u-boot,dm-spl;
51 };
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]52
Lokesh Vutla62eada12021-02-01 11:26:40 +0530[diff] [blame]53 mcu-navss {
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]54 u-boot,dm-spl;
55
Vignesh Raghavendra01250d82020-07-07 13:43:35 +0530[diff] [blame]56 ringacc@2b800000 {
Vignesh Raghavendra7bd02882021-06-07 19:47:51 +0530[diff] [blame]57 reg = <0x0 0x2b800000 0x0 0x400000>,
58 <0x0 0x2b000000 0x0 0x400000>,
59 <0x0 0x28590000 0x0 0x100>,
60 <0x0 0x2a500000 0x0 0x40000>,
61 <0x0 0x28440000 0x0 0x40000>;
62 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]63 u-boot,dm-spl;
64 };
65
Vignesh Raghavendra01250d82020-07-07 13:43:35 +0530[diff] [blame]66 dma-controller@285c0000 {
Vignesh Raghavendra7bd02882021-06-07 19:47:51 +0530[diff] [blame]67 reg = <0x0 0x285c0000 0x0 0x100>,
68 <0x0 0x284c0000 0x0 0x4000>,
69 <0x0 0x2a800000 0x0 0x40000>,
70 <0x0 0x284a0000 0x0 0x4000>,
71 <0x0 0x2aa00000 0x0 0x40000>,
72 <0x0 0x28400000 0x0 0x2000>;
73 reg-names = "gcfg", "rchan", "rchanrt", "tchan",
74 "tchanrt", "rflow";
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]75 u-boot,dm-spl;
76 };
77 };
Lokesh Vutla62eada12021-02-01 11:26:40 +0530[diff] [blame]78
79 chipid@43000014 {
80 u-boot,dm-spl;
81 };
Lokesh Vutlaac736802019-06-13 10:29:55 +0530[diff] [blame]82};
83
84&secure_proxy_main {
85 u-boot,dm-spl;
86};
87
88&dmsc {
89 u-boot,dm-spl;
90 k3_sysreset: sysreset-controller {
91 compatible = "ti,sci-sysreset";
92 u-boot,dm-spl;
93 };
94};
95
96&k3_pds {
97 u-boot,dm-spl;
98};
99
100&k3_clks {
101 u-boot,dm-spl;
102};
103
104&k3_reset {
105 u-boot,dm-spl;
106};
107
108&wkup_pmx0 {
109 u-boot,dm-spl;
110};
111
112&main_pmx0 {
113 u-boot,dm-spl;
114};
115
116&main_uart0 {
117 u-boot,dm-spl;
118};
119
120&mcu_uart0 {
121 u-boot,dm-spl;
122};
123
124&main_sdhci0 {
125 u-boot,dm-spl;
126};
127
128&main_sdhci1 {
129 u-boot,dm-spl;
130};
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]131
Vignesh Raghavendra04ed4932019-11-18 19:16:35 +0530[diff] [blame]132&main_usbss0_pins_default {
133 u-boot,dm-spl;
134};
135
136&usbss0 {
137 u-boot,dm-spl;
138 ti,usb2-only;
139};
140
141&usb0 {
142 dr_mode = "peripheral";
143 u-boot,dm-spl;
144};
145
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]146&mcu_cpsw {
147 reg = <0x0 0x46000000 0x0 0x200000>,
148 <0x0 0x40f00200 0x0 0x2>;
149 reg-names = "cpsw_nuss", "mac_efuse";
Vignesh Raghavendra3f09ed42020-07-06 13:36:55 +0530[diff] [blame]150 /delete-property/ ranges;
Vignesh Raghavendra268dad22019-12-04 22:17:24 +0530[diff] [blame]151
152 cpsw-phy-sel@40f04040 {
153 compatible = "ti,am654-cpsw-phy-sel";
154 reg= <0x0 0x40f04040 0x0 0x4>;
155 reg-names = "gmii-sel";
156 };
157};
Faiz Abbasc67d3892020-01-16 19:42:21 +0530[diff] [blame]158
159&main_mmc1_pins_default {
160 u-boot,dm-spl;
161};
Andreas Dannenberg0fe40e92020-01-07 13:15:56 +0530[diff] [blame]162
163&wkup_i2c0_pins_default {
164 u-boot,dm-spl;
165};
166
167&wkup_i2c0 {
168 u-boot,dm-spl;
169};
Vignesh Raghavendra8a290cc2020-01-27 23:22:15 +0530[diff] [blame]170
171&main_i2c0 {
172 u-boot,dm-spl;
173};
174
175&main_i2c0_pins_default {
176 u-boot,dm-spl;
177};
178
179&exp2 {
180 u-boot,dm-spl;
181};
Vignesh Raghavendrada674372020-02-04 11:09:52 +0530[diff] [blame]182
183&mcu_fss0_ospi0_pins_default {
184 u-boot,dm-spl;
185};
186
187&fss {
188 u-boot,dm-spl;
189};
190
191&ospi0 {
192 u-boot,dm-spl;
193
194 flash@0 {
195 u-boot,dm-spl;
196 };
197};
Keerthy71156c92020-03-04 10:09:59 +0530[diff] [blame]198
199&ospi1 {
200 u-boot,dm-spl;
201
202 flash@0 {
203 u-boot,dm-spl;
204 };
205};
206
207&mcu_fss0_ospi1_pins_default {
208 u-boot,dm-spl;
209};
Suman Anna90eecec2021-05-18 16:38:25 -0500[diff] [blame]210
211&main_r5fss0 {
212 ti,cluster-mode = <0>;
213};
214
215&main_r5fss1 {
216 ti,cluster-mode = <0>;
217};