Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Renesas SH7763RDP board |
| 3 | * |
| 4 | * Copyright (C) 2008 Renesas Solutions Corp. |
| 5 | * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __SH7763RDP_H |
| 11 | #define __SH7763RDP_H |
| 12 | |
| 13 | #define CONFIG_SH 1 |
| 14 | #define CONFIG_SH4 1 |
| 15 | #define CONFIG_CPU_SH7763 1 |
| 16 | #define CONFIG_SH7763RDP 1 |
| 17 | #define __LITTLE_ENDIAN 1 |
| 18 | |
| 19 | /* |
| 20 | * Command line configuration. |
| 21 | */ |
| 22 | #define CONFIG_CMD_SDRAM |
| 23 | #define CONFIG_CMD_FLASH |
| 24 | #define CONFIG_CMD_MEMORY |
Nobuhiro Iwamatsu | 8a0d1c7 | 2008-08-08 16:30:23 +0900 | [diff] [blame] | 25 | #define CONFIG_CMD_NET |
Yoshihiro Shimoda | c578baa | 2011-10-31 10:44:18 +0900 | [diff] [blame] | 26 | #define CONFIG_CMD_MII |
Nobuhiro Iwamatsu | 8a0d1c7 | 2008-08-08 16:30:23 +0900 | [diff] [blame] | 27 | #define CONFIG_CMD_PING |
Mike Frysinger | 78dcaf4 | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 28 | #define CONFIG_CMD_SAVEENV |
Nobuhiro Iwamatsu | 8a0d1c7 | 2008-08-08 16:30:23 +0900 | [diff] [blame] | 29 | #define CONFIG_CMD_NFS |
| 30 | #define CONFIG_CMD_JFFS2 |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 31 | |
| 32 | #define CONFIG_BOOTDELAY -1 |
| 33 | #define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01" |
| 34 | #define CONFIG_ENV_OVERWRITE 1 |
| 35 | |
| 36 | #define CONFIG_VERSION_VARIABLE |
| 37 | #undef CONFIG_SHOW_BOOT_PROGRESS |
| 38 | |
| 39 | /* SCIF */ |
Jean-Christophe PLAGNIOL-VILLARD | 6ce9ea6 | 2008-08-13 01:40:38 +0200 | [diff] [blame] | 40 | #define CONFIG_SCIF_CONSOLE 1 |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 41 | #define CONFIG_BAUDRATE 115200 |
| 42 | #define CONFIG_CONS_SCIF2 1 |
| 43 | |
Nobuhiro Iwamatsu | 6963366 | 2011-01-17 20:53:29 +0900 | [diff] [blame] | 44 | #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 45 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 46 | #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ |
| 47 | #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ |
| 48 | #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ |
| 49 | #define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 50 | passed to kernel */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 51 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 52 | settings for this board */ |
| 53 | |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 54 | /* SDRAM */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 55 | #define CONFIG_SYS_SDRAM_BASE (0x8C000000) |
| 56 | #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) |
| 57 | #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) |
| 58 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 59 | |
| 60 | /* Flash(NOR) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | #define CONFIG_SYS_FLASH_BASE (0xA0000000) |
| 62 | #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) |
| 63 | #define CONFIG_SYS_MAX_FLASH_BANKS (1) |
| 64 | #define CONFIG_SYS_MAX_FLASH_SECT (520) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 65 | |
| 66 | /* U-boot setting */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 67 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) |
| 68 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) |
| 69 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 70 | /* Size of DRAM reserved for malloc() use */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 71 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 72 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 73 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 74 | #define CONFIG_SYS_FLASH_CFI |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 75 | #define CONFIG_FLASH_CFI_DRIVER |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
| 77 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 78 | /* Timeout for Flash erase operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 79 | #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 80 | /* Timeout for Flash write operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 81 | #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 82 | /* Timeout for Flash set sector lock bit operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 83 | #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 84 | /* Timeout for Flash clear lock bit operations (in ms) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 86 | /* Use hardware flash sectors protection instead of U-Boot software protection */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 87 | #undef CONFIG_SYS_FLASH_PROTECTION |
| 88 | #undef CONFIG_SYS_DIRECT_FLASH_TFTP |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 89 | #define CONFIG_ENV_IS_IN_FLASH |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 90 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
| 91 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 92 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE)) |
| 93 | /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ |
| 94 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 95 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 96 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 97 | |
| 98 | /* Clock */ |
| 99 | #define CONFIG_SYS_CLK_FREQ 66666666 |
Nobuhiro Iwamatsu | e698449 | 2013-08-21 16:11:21 +0900 | [diff] [blame] | 100 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
| 101 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
Jean-Christophe PLAGNIOL-VILLARD | 32e6acc | 2009-06-04 12:06:48 +0200 | [diff] [blame] | 102 | #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 103 | |
Nobuhiro Iwamatsu | 8a0d1c7 | 2008-08-08 16:30:23 +0900 | [diff] [blame] | 104 | /* Ether */ |
| 105 | #define CONFIG_SH_ETHER 1 |
| 106 | #define CONFIG_SH_ETHER_USE_PORT (1) |
| 107 | #define CONFIG_SH_ETHER_PHY_ADDR (0x01) |
Yoshihiro Shimoda | c578baa | 2011-10-31 10:44:18 +0900 | [diff] [blame] | 108 | #define CONFIG_PHYLIB |
| 109 | #define CONFIG_BITBANGMII |
| 110 | #define CONFIG_BITBANGMII_MULTI |
Nobuhiro Iwamatsu | 32f900e | 2012-05-16 10:23:21 +0900 | [diff] [blame] | 111 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII |
Nobuhiro Iwamatsu | 8a0d1c7 | 2008-08-08 16:30:23 +0900 | [diff] [blame] | 112 | |
Nobuhiro Iwamatsu | 113a37e | 2008-06-09 13:39:57 +0900 | [diff] [blame] | 113 | #endif /* __SH7763RDP_H */ |