wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001, 2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | bd8ec7e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * board/config.h - configuration options, board specific |
| 10 | */ |
| 11 | |
| 12 | #ifndef __CONFIG_H |
| 13 | #define __CONFIG_H |
| 14 | |
| 15 | /*********************************************************** |
| 16 | * High Level Configuration Options |
| 17 | * (easy to change) |
| 18 | ***********************************************************/ |
| 19 | #define CONFIG_405GP 1 /* This is a PPC405 CPU */ |
| 20 | #define CONFIG_4xx 1 /* ...member of PPC4xx family */ |
| 21 | #define CONFIG_MIP405 1 /* ...on a MIP405 board */ |
Wolfgang Denk | 291ba1b | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 22 | |
| 23 | #define CONFIG_SYS_TEXT_BASE 0xFFF80000 |
| 24 | |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 25 | /*********************************************************** |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 26 | * Note that it may also be a MIP405T board which is a subset of the |
| 27 | * MIP405 |
| 28 | ***********************************************************/ |
| 29 | /*********************************************************** |
| 30 | * WARNING: |
| 31 | * CONFIG_BOOT_PCI is only used for first boot-up and should |
| 32 | * NOT be enabled for production bootloader |
| 33 | ***********************************************************/ |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 34 | /*#define CONFIG_BOOT_PCI 1*/ |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 35 | /*********************************************************** |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 36 | * Clock |
| 37 | ***********************************************************/ |
| 38 | #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ |
| 39 | |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 40 | |
Jon Loeliger | 446e1f5 | 2007-07-08 14:14:17 -0500 | [diff] [blame] | 41 | /* |
Jon Loeliger | ed26c74 | 2007-07-10 09:10:49 -0500 | [diff] [blame] | 42 | * BOOTP options |
| 43 | */ |
| 44 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 45 | #define CONFIG_BOOTP_BOOTPATH |
| 46 | #define CONFIG_BOOTP_GATEWAY |
| 47 | #define CONFIG_BOOTP_HOSTNAME |
| 48 | |
| 49 | |
| 50 | /* |
Jon Loeliger | 446e1f5 | 2007-07-08 14:14:17 -0500 | [diff] [blame] | 51 | * Command line configuration. |
| 52 | */ |
| 53 | #include <config_cmd_default.h> |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 54 | |
Jon Loeliger | 446e1f5 | 2007-07-08 14:14:17 -0500 | [diff] [blame] | 55 | #define CONFIG_CMD_CACHE |
| 56 | #define CONFIG_CMD_DATE |
| 57 | #define CONFIG_CMD_DHCP |
| 58 | #define CONFIG_CMD_EEPROM |
| 59 | #define CONFIG_CMD_ELF |
| 60 | #define CONFIG_CMD_FAT |
| 61 | #define CONFIG_CMD_I2C |
| 62 | #define CONFIG_CMD_IDE |
| 63 | #define CONFIG_CMD_IRQ |
| 64 | #define CONFIG_CMD_JFFS2 |
| 65 | #define CONFIG_CMD_MII |
| 66 | #define CONFIG_CMD_PCI |
| 67 | #define CONFIG_CMD_PING |
| 68 | #define CONFIG_CMD_REGINFO |
| 69 | #define CONFIG_CMD_SAVES |
| 70 | #define CONFIG_CMD_BSP |
| 71 | |
| 72 | #if !defined(CONFIG_MIP405T) |
| 73 | #define CONFIG_CMD_USB |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 74 | #endif |
| 75 | |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 76 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #define CONFIG_SYS_HUSH_PARSER |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 78 | /************************************************************** |
| 79 | * I2C Stuff: |
| 80 | * the MIP405 is equiped with an Atmel 24C128/256 EEPROM at address |
| 81 | * 0x53. |
| 82 | * The Atmel EEPROM uses 16Bit addressing. |
| 83 | ***************************************************************/ |
| 84 | |
Dirk Eibach | 42b204f | 2013-04-25 02:40:01 +0000 | [diff] [blame] | 85 | #define CONFIG_SYS_I2C |
| 86 | #define CONFIG_SYS_I2C_PPC4XX |
| 87 | #define CONFIG_SYS_I2C_PPC4XX_CH0 |
| 88 | #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000 |
| 89 | #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 90 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 /* EEPROM 24C128/256 */ |
| 92 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 93 | /* mask of address bits that overflow into the "EEPROM chip address" */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 94 | #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW |
| 95 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 96 | /* 64 byte page write mode using*/ |
| 97 | /* last 6 bits of the address */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 98 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 99 | |
| 100 | |
Jean-Christophe PLAGNIOL-VILLARD | e46af64 | 2008-09-05 09:19:30 +0200 | [diff] [blame] | 101 | #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 102 | #define CONFIG_ENV_OFFSET 0x00000 /* environment starts at the beginning of the EEPROM */ |
| 103 | #define CONFIG_ENV_SIZE 0x00800 /* 2k bytes may be used for env vars */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 104 | |
| 105 | /*************************************************************** |
| 106 | * Definitions for Serial Presence Detect EEPROM address |
| 107 | * (to get SDRAM settings) |
| 108 | ***************************************************************/ |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 109 | /*#define SDRAM_EEPROM_WRITE_ADDRESS 0xA0 |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 110 | #define SDRAM_EEPROM_READ_ADDRESS 0xA1 |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 111 | */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 112 | /************************************************************** |
| 113 | * Environment definitions |
| 114 | **************************************************************/ |
| 115 | #define CONFIG_BAUDRATE 9600 /* STD Baudrate */ |
| 116 | #define CONFIG_BOOTDELAY 5 |
| 117 | /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ |
Wolfgang Denk | 7b4e347 | 2005-08-13 02:04:37 +0200 | [diff] [blame] | 118 | /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 119 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 120 | |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 121 | #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 122 | #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ |
| 123 | |
| 124 | #define CONFIG_IPADDR 10.0.0.100 |
| 125 | #define CONFIG_SERVERIP 10.0.0.1 |
| 126 | #define CONFIG_PREBOOT |
| 127 | /*************************************************************** |
| 128 | * defines if the console is stored in the environment |
| 129 | ***************************************************************/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* stdin, stdout and stderr are in evironment */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 131 | /*************************************************************** |
| 132 | * defines if an overwrite_console function exists |
| 133 | *************************************************************/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |
| 135 | #define CONFIG_SYS_CONSOLE_INFO_QUIET |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 136 | /*************************************************************** |
| 137 | * defines if the overwrite_console should be stored in the |
| 138 | * environment |
| 139 | **************************************************************/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 140 | #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 141 | |
| 142 | /************************************************************** |
| 143 | * loads config |
| 144 | *************************************************************/ |
| 145 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 147 | |
| 148 | #define CONFIG_MISC_INIT_R |
| 149 | /*********************************************************** |
| 150 | * Miscellaneous configurable options |
| 151 | **********************************************************/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 152 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Jon Loeliger | 446e1f5 | 2007-07-08 14:14:17 -0500 | [diff] [blame] | 153 | #if defined(CONFIG_CMD_KGDB) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 154 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 155 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 156 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 157 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 158 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 159 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 160 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 161 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 162 | #define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */ |
| 163 | #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 164 | |
Stefan Roese | 3ddce57 | 2010-09-20 16:05:31 +0200 | [diff] [blame] | 165 | #define CONFIG_CONS_INDEX 1 /* Use UART0 */ |
| 166 | #define CONFIG_SYS_NS16550 |
| 167 | #define CONFIG_SYS_NS16550_SERIAL |
| 168 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 169 | #define CONFIG_SYS_NS16550_CLK get_serial_clock() |
| 170 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 171 | #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ |
| 172 | #define CONFIG_SYS_BASE_BAUD 916667 |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 173 | |
| 174 | /* The following table includes the supported baudrates */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 175 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 176 | { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ |
| 177 | 57600, 115200, 230400, 460800, 921600 } |
| 178 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 179 | #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ |
| 180 | #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 181 | |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 182 | /*----------------------------------------------------------------------- |
| 183 | * PCI stuff |
| 184 | *----------------------------------------------------------------------- |
| 185 | */ |
| 186 | #define PCI_HOST_ADAPTER 0 /* configure as pci adapter */ |
| 187 | #define PCI_HOST_FORCE 1 /* configure as pci host */ |
| 188 | #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ |
| 189 | |
| 190 | #define CONFIG_PCI /* include pci support */ |
Gabor Juhos | b445873 | 2013-05-30 07:06:12 +0000 | [diff] [blame] | 191 | #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 192 | #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ |
| 193 | #define CONFIG_PCI_PNP /* pci plug-and-play */ |
| 194 | /* resource configuration */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 195 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ |
| 196 | #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ |
| 197 | #define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ |
| 198 | #define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */ |
| 199 | #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ |
| 200 | #define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */ |
| 201 | #define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */ |
| 202 | #define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 203 | |
| 204 | /*----------------------------------------------------------------------- |
| 205 | * Start addresses for the final memory configuration |
| 206 | * (Set up by the startup code) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 207 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 208 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 209 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 210 | #define CONFIG_SYS_FLASH_BASE 0xFFF80000 |
| 211 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
| 212 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ |
| 213 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 214 | |
| 215 | /* |
| 216 | * For booting Linux, the board info and command line data |
| 217 | * have to be in the first 8 MB of memory, since this is |
| 218 | * the maximum mapped by the Linux kernel during initialization. |
| 219 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 220 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 221 | /*----------------------------------------------------------------------- |
| 222 | * FLASH organization |
| 223 | */ |
David Müller | a24c878 | 2011-12-22 13:38:21 +0100 | [diff] [blame] | 224 | #define CONFIG_SYS_UPDATE_FLASH_SIZE |
| 225 | #define CONFIG_SYS_FLASH_PROTECTION |
| 226 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 227 | |
David Müller | a24c878 | 2011-12-22 13:38:21 +0100 | [diff] [blame] | 228 | #define CONFIG_SYS_FLASH_CFI |
| 229 | #define CONFIG_FLASH_CFI_DRIVER |
| 230 | |
| 231 | #define CONFIG_FLASH_SHOW_PROGRESS 45 |
| 232 | |
| 233 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 234 | #define CONFIG_SYS_MAX_FLASH_SECT 256 |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 235 | |
Wolfgang Denk | 47f5779 | 2005-08-08 01:03:24 +0200 | [diff] [blame] | 236 | /* |
| 237 | * JFFS2 partitions |
| 238 | * |
| 239 | */ |
| 240 | /* No command line, one static partition, whole device */ |
Stefan Roese | b1423dd | 2009-03-19 13:30:36 +0100 | [diff] [blame] | 241 | #undef CONFIG_CMD_MTDPARTS |
Wolfgang Denk | 47f5779 | 2005-08-08 01:03:24 +0200 | [diff] [blame] | 242 | #define CONFIG_JFFS2_DEV "nor0" |
| 243 | #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF |
| 244 | #define CONFIG_JFFS2_PART_OFFSET 0x00000000 |
| 245 | |
| 246 | /* mtdparts command line support */ |
| 247 | /* Note: fake mtd_id used, no linux mtd map file */ |
| 248 | /* |
Stefan Roese | b1423dd | 2009-03-19 13:30:36 +0100 | [diff] [blame] | 249 | #define CONFIG_CMD_MTDPARTS |
Wolfgang Denk | 47f5779 | 2005-08-08 01:03:24 +0200 | [diff] [blame] | 250 | #define MTDIDS_DEFAULT "nor0=mip405-0" |
| 251 | #define MTDPARTS_DEFAULT "mtdparts=mip405-0:-(jffs2)" |
| 252 | */ |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 253 | |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 254 | /*----------------------------------------------------------------------- |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 255 | * Logbuffer Configuration |
| 256 | */ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 257 | #undef CONFIG_LOGBUFFER /* supported but not enabled */ |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 258 | /*----------------------------------------------------------------------- |
| 259 | * Bootcountlimit Configuration |
| 260 | */ |
| 261 | #undef CONFIG_BOOTCOUNT_LIMIT /* supported but not enabled */ |
| 262 | |
| 263 | /*----------------------------------------------------------------------- |
| 264 | * POST Configuration |
| 265 | */ |
| 266 | #if 0 /* enable this if POST is desired (is supported but not enabled) */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 267 | #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ |
| 268 | CONFIG_SYS_POST_CPU | \ |
| 269 | CONFIG_SYS_POST_RTC | \ |
| 270 | CONFIG_SYS_POST_I2C) |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 271 | |
| 272 | #endif |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 273 | /* |
| 274 | * Init Memory Controller: |
| 275 | */ |
wdenk | 2c9b05d | 2003-09-10 22:30:53 +0000 | [diff] [blame] | 276 | #define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */ |
| 277 | #define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */ |
| 278 | /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ |
| 279 | #define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 280 | |
wdenk | da55c6e | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 281 | #define CONFIG_BOARD_EARLY_INIT_F 1 |
David Müller | a24c878 | 2011-12-22 13:38:21 +0100 | [diff] [blame] | 282 | #define CONFIG_BOARD_EARLY_INIT_R |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 283 | |
| 284 | /* Peripheral Bus Mapping */ |
| 285 | #define PER_PLD_ADDR 0xF4000000 /* smallest window is 1MByte 0x10 0000*/ |
| 286 | #define PER_UART0_ADDR 0xF4100000 /* smallest window is 1MByte 0x10 0000*/ |
| 287 | #define PER_UART1_ADDR 0xF4200000 /* smallest window is 1MByte 0x10 0000*/ |
| 288 | |
| 289 | #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 290 | #define CONFIG_PORT_ADDR PER_PLD_ADDR + 5 |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 291 | |
| 292 | |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 293 | /*----------------------------------------------------------------------- |
| 294 | * Definitions for initial stack pointer and data area (in On Chip SRAM) |
| 295 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 296 | #define CONFIG_SYS_TEMP_STACK_OCM 1 |
| 297 | #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 |
| 298 | #define CONFIG_SYS_OCM_DATA_SIZE 0x1000 |
| 299 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */ |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 300 | #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */ |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 301 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 302 | /* reserve some memory for POST and BOOT limit info */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 303 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 32) |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 304 | |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 305 | #ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 306 | #define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12) |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 307 | #endif |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 308 | |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 309 | /*********************************************************************** |
| 310 | * External peripheral base address |
| 311 | ***********************************************************************/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 312 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000 |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 313 | |
| 314 | /*********************************************************************** |
| 315 | * Last Stage Init |
| 316 | ***********************************************************************/ |
| 317 | #define CONFIG_LAST_STAGE_INIT |
| 318 | /************************************************************ |
| 319 | * Ethernet Stuff |
| 320 | ***********************************************************/ |
Ben Warren | 3a918a6 | 2008-10-27 23:50:15 -0700 | [diff] [blame] | 321 | #define CONFIG_PPC4xx_EMAC |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 322 | #define CONFIG_MII 1 /* MII PHY management */ |
| 323 | #define CONFIG_PHY_ADDR 1 /* PHY address */ |
wdenk | e97d3d9 | 2004-02-23 22:22:28 +0000 | [diff] [blame] | 324 | #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ |
| 325 | #define CONFIG_PHY_CMD_DELAY 40 /* Intel LXT971A needs this */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 326 | /************************************************************ |
| 327 | * RTC |
| 328 | ***********************************************************/ |
| 329 | #define CONFIG_RTC_MC146818 |
| 330 | #undef CONFIG_WATCHDOG /* watchdog disabled */ |
| 331 | |
| 332 | /************************************************************ |
| 333 | * IDE/ATA stuff |
| 334 | ************************************************************/ |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 335 | #if defined(CONFIG_MIP405T) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 336 | #define CONFIG_SYS_IDE_MAXBUS 1 /* MIP405T has only one IDE bus */ |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 337 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 338 | #define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */ |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 339 | #endif |
| 340 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 341 | #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 342 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 343 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */ |
| 344 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */ |
| 345 | #define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */ |
| 346 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ |
| 347 | #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ |
| 348 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 349 | |
| 350 | #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ |
| 351 | #undef CONFIG_IDE_LED /* no led for ide supported */ |
| 352 | #define CONFIG_IDE_RESET /* reset for ide supported... */ |
| 353 | #define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */ |
wdenk | 2c9b05d | 2003-09-10 22:30:53 +0000 | [diff] [blame] | 354 | #define CONFIG_SUPPORT_VFAT |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 355 | /************************************************************ |
| 356 | * ATAPI support (experimental) |
| 357 | ************************************************************/ |
| 358 | #define CONFIG_ATAPI /* enable ATAPI Support */ |
| 359 | |
| 360 | /************************************************************ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 361 | * DISK Partition support |
| 362 | ************************************************************/ |
| 363 | #define CONFIG_DOS_PARTITION |
| 364 | #define CONFIG_MAC_PARTITION |
| 365 | #define CONFIG_ISO_PARTITION /* Experimental */ |
| 366 | |
| 367 | /************************************************************ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 368 | * Keyboard support |
| 369 | ************************************************************/ |
| 370 | #undef CONFIG_ISA_KEYBOARD |
| 371 | |
| 372 | /************************************************************ |
| 373 | * Video support |
| 374 | ************************************************************/ |
| 375 | #define CONFIG_VIDEO /*To enable video controller support */ |
| 376 | #define CONFIG_VIDEO_CT69000 |
| 377 | #define CONFIG_CFB_CONSOLE |
| 378 | #define CONFIG_VIDEO_LOGO |
| 379 | #define CONFIG_CONSOLE_EXTRA_INFO |
| 380 | #define CONFIG_VGA_AS_SINGLE_DEVICE |
| 381 | #define CONFIG_VIDEO_SW_CURSOR |
| 382 | #undef CONFIG_VIDEO_ONBOARD |
| 383 | /************************************************************ |
| 384 | * USB support EXPERIMENTAL |
| 385 | ************************************************************/ |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 386 | #if !defined(CONFIG_MIP405T) |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 387 | #define CONFIG_USB_UHCI |
| 388 | #define CONFIG_USB_KEYBOARD |
| 389 | #define CONFIG_USB_STORAGE |
| 390 | |
| 391 | /* Enable needed helper functions */ |
Jean-Christophe PLAGNIOL-VILLARD | 2a7a031 | 2009-05-16 12:14:54 +0200 | [diff] [blame] | 392 | #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 393 | #endif |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 394 | /************************************************************ |
| 395 | * Debug support |
| 396 | ************************************************************/ |
Jon Loeliger | 446e1f5 | 2007-07-08 14:14:17 -0500 | [diff] [blame] | 397 | #if defined(CONFIG_CMD_KGDB) |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 398 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 399 | #endif |
| 400 | |
| 401 | /************************************************************ |
wdenk | 4ea537d | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 402 | * support BZIP2 compression |
| 403 | ************************************************************/ |
| 404 | #define CONFIG_BZIP2 1 |
| 405 | |
| 406 | /************************************************************ |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 407 | * Ident |
| 408 | ************************************************************/ |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 409 | |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 410 | #define VERSION_TAG "released" |
wdenk | e39c284 | 2003-06-04 15:05:30 +0000 | [diff] [blame] | 411 | #if !defined(CONFIG_MIP405T) |
| 412 | #define CONFIG_ISO_STRING "MEV-10072-001" |
| 413 | #else |
| 414 | #define CONFIG_ISO_STRING "MEV-10082-001" |
| 415 | #endif |
| 416 | |
| 417 | #if !defined(CONFIG_BOOT_PCI) |
| 418 | #define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG |
| 419 | #else |
| 420 | #define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, PCI_BOOT Version" |
| 421 | #endif |
wdenk | 7d393ae | 2002-10-25 21:08:05 +0000 | [diff] [blame] | 422 | |
| 423 | |
| 424 | #endif /* __CONFIG_H */ |