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Marian Balakowiczc952aed2006-05-09 11:54:44 +02001/*
2 * Configuation settings for the Freescale M5271EVB
3 *
4 * Based on MC5272C3 and r5200 board configs
5 * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
6 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
7 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Marian Balakowiczc952aed2006-05-09 11:54:44 +02009 */
10
11/*
12 * board/config.h - configuration options, board specific
13 */
14
15#ifndef _M5271EVB_H
16#define _M5271EVB_H
17
Marian Balakowiczc952aed2006-05-09 11:54:44 +020018/*
19 * High Level Configuration Options (easy to change)
20 */
21#define CONFIG_MCF52x2 /* define processor family */
22#define CONFIG_M5271 /* define processor type */
23#define CONFIG_M5271EVB /* define board type */
24
TsiChungLiew1692b482007-08-15 20:32:06 -050025#define CONFIG_MCFTMR
Marian Balakowiczc952aed2006-05-09 11:54:44 +020026
TsiChungLiew1692b482007-08-15 20:32:06 -050027#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020028#define CONFIG_SYS_UART_PORT (0)
TsiChung Liewbd05c6d2008-08-15 16:50:07 +000029#define CONFIG_BAUDRATE 115200
Marian Balakowiczc952aed2006-05-09 11:54:44 +020030
31#undef CONFIG_WATCHDOG /* disable watchdog */
32
Marian Balakowiczc952aed2006-05-09 11:54:44 +020033/* Configuration for environment
34 * Environment is embedded in u-boot in the second sector of the flash
35 */
36#ifndef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020037#define CONFIG_ENV_OFFSET 0x4000
Marian Balakowiczc952aed2006-05-09 11:54:44 +020038#else
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020039#define CONFIG_ENV_ADDR 0xffe04000
Wolfgang Denk4ed40bb2007-09-16 17:10:04 +020040#endif
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020041#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +020042#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020043#define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */
Marian Balakowiczc952aed2006-05-09 11:54:44 +020044
Jon Loeliger446e1f52007-07-08 14:14:17 -050045/*
Jon Loeligered26c742007-07-10 09:10:49 -050046 * BOOTP options
47 */
48#define CONFIG_BOOTP_BOOTFILESIZE
49#define CONFIG_BOOTP_BOOTPATH
50#define CONFIG_BOOTP_GATEWAY
51#define CONFIG_BOOTP_HOSTNAME
52
Jon Loeligered26c742007-07-10 09:10:49 -050053/*
Jon Loeliger446e1f52007-07-08 14:14:17 -050054 * Command line configuration.
55 */
56#include <config_cmd_default.h>
Marian Balakowiczc952aed2006-05-09 11:54:44 +020057
TsiChung Liew0ee47d42010-03-11 22:12:53 -060058#define CONFIG_CMD_CACHE
Jon Loeliger446e1f52007-07-08 14:14:17 -050059#define CONFIG_CMD_PING
60#define CONFIG_CMD_NET
TsiChungLiew1692b482007-08-15 20:32:06 -050061#define CONFIG_CMD_MII
62#define CONFIG_CMD_ELF
63#define CONFIG_CMD_FLASH
64#define CONFIG_CMD_I2C
65#define CONFIG_CMD_MEMORY
66#define CONFIG_CMD_MISC
Jon Loeliger446e1f52007-07-08 14:14:17 -050067
68#undef CONFIG_CMD_LOADS
Richard Retanubun567e1152009-01-23 14:07:05 -050069#define CONFIG_CMD_LOADB
70#define CONFIG_CMDLINE_EDITING 1 /* enables command line history */
71#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
Jon Loeliger446e1f52007-07-08 14:14:17 -050072
TsiChungLiew1692b482007-08-15 20:32:06 -050073#define CONFIG_MCFFEC
74#ifdef CONFIG_MCFFEC
TsiChungLiew1692b482007-08-15 20:32:06 -050075# define CONFIG_MII 1
TsiChung Liewb3162452008-03-30 01:22:13 -050076# define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020077# define CONFIG_SYS_DISCOVER_PHY
78# define CONFIG_SYS_RX_ETH_BUFFER 8
79# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew1692b482007-08-15 20:32:06 -050080
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020081# define CONFIG_SYS_FEC0_PINMUX 0
82# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
Wolfgang Denka1be4762008-05-20 16:00:29 +020083# define MCFFEC_TOUT_LOOP 50000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020084/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
85# ifndef CONFIG_SYS_DISCOVER_PHY
TsiChungLiew1692b482007-08-15 20:32:06 -050086# define FECDUPLEX FULL
87# define FECSPEED _100BASET
88# else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
90# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew1692b482007-08-15 20:32:06 -050091# endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020092# endif /* CONFIG_SYS_DISCOVER_PHY */
TsiChungLiew1692b482007-08-15 20:32:06 -050093#endif
94
95/* I2C */
Heiko Schocherf2850742012-10-24 13:48:22 +020096#define CONFIG_SYS_I2C
97#define CONFIG_SYS_I2C_FSL
98#define CONFIG_SYS_FSL_I2C_SPEED 80000
99#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
100#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200101#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
TsiChungLiew1692b482007-08-15 20:32:06 -0500102
Richard Retanubun567e1152009-01-23 14:07:05 -0500103#define CONFIG_BOOTDELAY 1 /* autoboot after 1 seconds */
TsiChungLiew1692b482007-08-15 20:32:06 -0500104#define CONFIG_BOOTFILE "u-boot.bin"
105#ifdef CONFIG_MCFFEC
106# define CONFIG_NET_RETRY_COUNT 5
107# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
108# define CONFIG_IPADDR 192.162.1.2
109# define CONFIG_NETMASK 255.255.255.0
110# define CONFIG_SERVERIP 192.162.1.1
111# define CONFIG_GATEWAYIP 192.162.1.1
112# define CONFIG_OVERWRITE_ETHADDR_ONCE
113#endif /* FEC_ENET */
114
Richard Retanubun567e1152009-01-23 14:07:05 -0500115#define CONFIG_HOSTNAME M5271EVB
TsiChungLiew1692b482007-08-15 20:32:06 -0500116#define CONFIG_EXTRA_ENV_SETTINGS \
117 "netdev=eth0\0" \
118 "loadaddr=10000\0" \
Richard Retanubun567e1152009-01-23 14:07:05 -0500119 "uboot=u-boot.bin\0" \
120 "load=tftp $loadaddr $uboot\0" \
TsiChungLiew1692b482007-08-15 20:32:06 -0500121 "upd=run load; run prog\0" \
Richard Retanubun567e1152009-01-23 14:07:05 -0500122 "prog=prot off ffe00000 ffe3ffff;" \
123 "era ffe00000 ffe3ffff;" \
124 "cp.b $loadaddr ffe00000 $filesize;" \
TsiChungLiew1692b482007-08-15 20:32:06 -0500125 "save\0" \
126 ""
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200127
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200128#define CONFIG_SYS_LONGHELP /* undef to save memory */
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200129
Jon Loeliger446e1f52007-07-08 14:14:17 -0500130#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200131#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200132#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200134#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200135#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
136#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
137#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200138
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200139#define CONFIG_SYS_LOAD_ADDR 0x00100000
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200140
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200141#define CONFIG_SYS_MEMTEST_START 0x400
142#define CONFIG_SYS_MEMTEST_END 0x380000
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200143
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200144#define CONFIG_SYS_HZ 1000000
Richard Retanubun567e1152009-01-23 14:07:05 -0500145
146/* Clock configuration
147 * The external oscillator is a 25.000 MHz
148 * CONFIG_SYS_CLK for ColdFire V2 sets cpu_clk (not bus_clk)
149 * bus_clk = (cpu_clk/2) (fixed ratio)
150 *
151 * If CONFIG_SYS_CLK is changed. the CONFIG_SYS_MCF_SYNCR must be updated to
152 * match the new clock speed. Max cpu_clk is 150 MHz.
153 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200154#define CONFIG_SYS_CLK 100000000
Richard Retanubun567e1152009-01-23 14:07:05 -0500155#define CONFIG_SYS_MCF_SYNCR (MCF_SYNCR_MFD_4X | MCF_SYNCR_RFD_DIV1)
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200156
157/*
158 * Low Level Configuration Settings
159 * (address mappings, register initial values, etc.)
160 * You should know what you are doing if you make changes here.
161 */
162
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200163#define CONFIG_SYS_MBAR 0x40000000 /* Register Base Addrs */
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200164
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200165/*
166 * Definitions for initial stack pointer and data area (in DPRAM)
167 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200168#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200169#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
Wolfgang Denk0191e472010-10-26 14:34:52 +0200170#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200171#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200172
173/*
174 * Start addresses for the final memory configuration
175 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200176 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200177 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200178#define CONFIG_SYS_SDRAM_BASE 0x00000000
179#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
180#define CONFIG_SYS_FLASH_BASE 0xffe00000
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200181
182#ifdef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200183#define CONFIG_SYS_MONITOR_BASE 0x20000
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200184#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200185#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200186#endif
187
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188#define CONFIG_SYS_MONITOR_LEN 0x40000
189#define CONFIG_SYS_MALLOC_LEN (256 << 10)
190#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200191
192/*
193 * For booting Linux, the board info and command line data
194 * have to be in the first 8 MB of memory, since this is
195 * the maximum mapped by the Linux kernel during initialization ??
196 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200197#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200198
199/* FLASH organization */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200200#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
201#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
202#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200203
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200205#define CONFIG_FLASH_CFI_DRIVER 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200206#define CONFIG_SYS_FLASH_SIZE 0x200000
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200207
208/* Cache Configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209#define CONFIG_SYS_CACHELINE_SIZE 16
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200210
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600211#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200212 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600213#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200214 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600215#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
216#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
217 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
218 CF_ACR_EN | CF_ACR_SM_ALL)
219#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
220 CF_CACR_DISD | CF_CACR_INVI | \
221 CF_CACR_CEIB | CF_CACR_DCM | \
222 CF_CACR_EUSP)
223
Richard Retanubun567e1152009-01-23 14:07:05 -0500224/* Chip Select 0 : Boot Flash */
225#define CONFIG_SYS_CS0_BASE 0xFFE00000
226#define CONFIG_SYS_CS0_MASK 0x001F0001
227#define CONFIG_SYS_CS0_CTRL 0x00001980
228
229/* Chip Select 1 : External SRAM */
230#define CONFIG_SYS_CS1_BASE 0x30000000
231#define CONFIG_SYS_CS1_MASK 0x00070001
232#define CONFIG_SYS_CS1_CTRL 0x00001900
Marian Balakowiczc952aed2006-05-09 11:54:44 +0200233
TsiChungLiew1692b482007-08-15 20:32:06 -0500234#endif /* _M5271EVB_H */