blob: 14dde950a1834ccf9d22cf2a2ee1e5c0a4ca7c29 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Choufb798b12015-10-09 13:46:34 +08002/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Thomas Choufb798b12015-10-09 13:46:34 +08004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Mugunthan V N6f89d042016-01-16 21:33:58 +05309#include <dm/lists.h>
10#include <dm/device-internal.h>
Philipp Tomsich617fd622017-09-11 22:04:10 +020011#include <dm/root.h>
Zakharov Vlad36901a42016-12-09 17:18:32 +030012#include <clk.h>
Thomas Choufb798b12015-10-09 13:46:34 +080013#include <errno.h>
14#include <timer.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070015#include <linux/err.h>
Thomas Choufb798b12015-10-09 13:46:34 +080016
Bin Mengf786c642015-11-13 00:11:15 -080017DECLARE_GLOBAL_DATA_PTR;
18
Thomas Choufb798b12015-10-09 13:46:34 +080019/*
Bin Meng8a7b8642015-11-13 00:11:14 -080020 * Implement a timer uclass to work with lib/time.c. The timer is usually
Bin Mengab841b62015-11-24 13:31:17 -070021 * a 32/64 bits free-running up counter. The get_rate() method is used to get
Thomas Choufb798b12015-10-09 13:46:34 +080022 * the input clock frequency of the timer. The get_count() method is used
Bin Mengab841b62015-11-24 13:31:17 -070023 * to get the current 64 bits count value. If the hardware is counting down,
Thomas Choufb798b12015-10-09 13:46:34 +080024 * the value should be inversed inside the method. There may be no real
25 * tick, and no timer interrupt.
26 */
27
Simon Glass04cb14c2016-02-24 09:14:48 -070028int notrace timer_get_count(struct udevice *dev, u64 *count)
Thomas Choufb798b12015-10-09 13:46:34 +080029{
30 const struct timer_ops *ops = device_get_ops(dev);
31
32 if (!ops->get_count)
33 return -ENOSYS;
34
35 return ops->get_count(dev, count);
36}
37
Simon Glass04cb14c2016-02-24 09:14:48 -070038unsigned long notrace timer_get_rate(struct udevice *dev)
Thomas Choufb798b12015-10-09 13:46:34 +080039{
Simon Glass04cb14c2016-02-24 09:14:48 -070040 struct timer_dev_priv *uc_priv = dev->uclass_priv;
Thomas Choufb798b12015-10-09 13:46:34 +080041
42 return uc_priv->clock_rate;
43}
44
Bin Mengf786c642015-11-13 00:11:15 -080045static int timer_pre_probe(struct udevice *dev)
46{
Philipp Tomsich163796c2017-07-28 17:19:58 +020047#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Bin Mengf786c642015-11-13 00:11:15 -080048 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Zakharov Vlad36901a42016-12-09 17:18:32 +030049 struct clk timer_clk;
50 int err;
51 ulong ret;
Bin Mengf786c642015-11-13 00:11:15 -080052
Bin Mengfe5eb092019-07-05 09:23:15 -070053 /* It is possible that a timer device has a null ofnode */
54 if (!dev_of_valid(dev))
55 return 0;
56
Zakharov Vlad36901a42016-12-09 17:18:32 +030057 err = clk_get_by_index(dev, 0, &timer_clk);
58 if (!err) {
59 ret = clk_get_rate(&timer_clk);
60 if (IS_ERR_VALUE(ret))
61 return ret;
62 uc_priv->clock_rate = ret;
Philipp Tomsich617fd622017-09-11 22:04:10 +020063 } else {
64 uc_priv->clock_rate =
65 dev_read_u32_default(dev, "clock-frequency", 0);
66 }
Philipp Tomsich163796c2017-07-28 17:19:58 +020067#endif
Bin Mengf786c642015-11-13 00:11:15 -080068
69 return 0;
70}
71
Stephen Warren023ddfe2016-01-06 10:33:03 -070072static int timer_post_probe(struct udevice *dev)
73{
74 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
75
76 if (!uc_priv->clock_rate)
77 return -EINVAL;
78
79 return 0;
80}
81
Bin Mengab841b62015-11-24 13:31:17 -070082u64 timer_conv_64(u32 count)
83{
84 /* increment tbh if tbl has rolled over */
85 if (count < gd->timebase_l)
86 gd->timebase_h++;
87 gd->timebase_l = count;
88 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
89}
90
Mugunthan V N6f89d042016-01-16 21:33:58 +053091int notrace dm_timer_init(void)
92{
Mugunthan V N6f89d042016-01-16 21:33:58 +053093 struct udevice *dev = NULL;
Philipp Tomsich617fd622017-09-11 22:04:10 +020094 __maybe_unused ofnode node;
Mugunthan V N6f89d042016-01-16 21:33:58 +053095 int ret;
96
97 if (gd->timer)
98 return 0;
99
Philipp Tomsich63cf24a2017-09-11 22:04:11 +0200100 /*
101 * Directly access gd->dm_root to suppress error messages, if the
102 * virtual root driver does not yet exist.
103 */
104 if (gd->dm_root == NULL)
105 return -EAGAIN;
106
Philipp Tomsich163796c2017-07-28 17:19:58 +0200107#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Mugunthan V N6f89d042016-01-16 21:33:58 +0530108 /* Check for a chosen timer to be used for tick */
Philipp Tomsich617fd622017-09-11 22:04:10 +0200109 node = ofnode_get_chosen_node("tick-timer");
110
111 if (ofnode_valid(node) &&
112 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
113 /*
114 * If the timer is not marked to be bound before
115 * relocation, bind it anyway.
116 */
Bin Meng9a9b0742018-10-10 22:06:58 -0700117 if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
Philipp Tomsich617fd622017-09-11 22:04:10 +0200118 ret = device_probe(dev);
119 if (ret)
120 return ret;
121 }
122 }
Philipp Tomsich163796c2017-07-28 17:19:58 +0200123#endif
Philipp Tomsich617fd622017-09-11 22:04:10 +0200124
125 if (!dev) {
126 /* Fall back to the first available timer */
Simon Glassc7298e72016-02-11 13:23:26 -0700127 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
Mugunthan V N6f89d042016-01-16 21:33:58 +0530128 if (ret)
129 return ret;
Mugunthan V N6f89d042016-01-16 21:33:58 +0530130 }
131
132 if (dev) {
133 gd->timer = dev;
134 return 0;
135 }
136
137 return -ENODEV;
138}
139
Thomas Choufb798b12015-10-09 13:46:34 +0800140UCLASS_DRIVER(timer) = {
141 .id = UCLASS_TIMER,
142 .name = "timer",
Bin Mengf786c642015-11-13 00:11:15 -0800143 .pre_probe = timer_pre_probe,
Mugunthan V N5d0f01f2015-12-24 16:08:06 +0530144 .flags = DM_UC_FLAG_SEQ_ALIAS,
Stephen Warren023ddfe2016-01-06 10:33:03 -0700145 .post_probe = timer_post_probe,
Thomas Choufb798b12015-10-09 13:46:34 +0800146 .per_device_auto_alloc_size = sizeof(struct timer_dev_priv),
147};