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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Marek Vasut0b907502015-12-04 01:36:36 +01002/*
Marek Vasut4a7629a2015-12-04 02:55:37 +01003 * Designware DWC2 on-chip full/high speed USB device controllers
Marek Vasut0b907502015-12-04 01:36:36 +01004 * Copyright (C) 2005 for Samsung Electronics
Marek Vasut0b907502015-12-04 01:36:36 +01005 */
6
Marek Vasut4811c662015-12-04 02:32:22 +01007#ifndef __DWC2_UDC_OTG_PRIV__
8#define __DWC2_UDC_OTG_PRIV__
Marek Vasut0b907502015-12-04 01:36:36 +01009
Masahiro Yamada56a931c2016-09-21 11:28:55 +090010#include <linux/errno.h>
Marek Vasut0b907502015-12-04 01:36:36 +010011#include <linux/sizes.h>
12#include <linux/usb/ch9.h>
13#include <linux/usb/gadget.h>
14#include <linux/list.h>
Marek Vasutf1be9cb2015-12-04 02:51:20 +010015#include <usb/dwc2_udc.h>
Marek Vasut0b907502015-12-04 01:36:36 +010016
17/*-------------------------------------------------------------------------*/
18/* DMA bounce buffer size, 16K is enough even for mass storage */
19#define DMA_BUFFER_SIZE (16*SZ_1K)
20
21#define EP0_FIFO_SIZE 64
22#define EP_FIFO_SIZE 512
23#define EP_FIFO_SIZE2 1024
24/* ep0-control, ep1in-bulk, ep2out-bulk, ep3in-int */
Marek Vasutcb9c5d02015-12-04 02:44:33 +010025#define DWC2_MAX_ENDPOINTS 4
Marek Vasut0b907502015-12-04 01:36:36 +010026
27#define WAIT_FOR_SETUP 0
28#define DATA_STATE_XMIT 1
29#define DATA_STATE_NEED_ZLP 2
30#define WAIT_FOR_OUT_STATUS 3
31#define DATA_STATE_RECV 4
32#define WAIT_FOR_COMPLETE 5
33#define WAIT_FOR_OUT_COMPLETE 6
34#define WAIT_FOR_IN_COMPLETE 7
35#define WAIT_FOR_NULL_COMPLETE 8
36
37#define TEST_J_SEL 0x1
38#define TEST_K_SEL 0x2
39#define TEST_SE0_NAK_SEL 0x3
40#define TEST_PACKET_SEL 0x4
41#define TEST_FORCE_ENABLE_SEL 0x5
42
43/* ************************************************************************* */
44/* IO
45 */
46
47enum ep_type {
48 ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
49};
50
Marek Vasut5b309f72015-12-04 01:48:57 +010051struct dwc2_ep {
Marek Vasut0b907502015-12-04 01:36:36 +010052 struct usb_ep ep;
53 struct dwc2_udc *dev;
54
55 const struct usb_endpoint_descriptor *desc;
56 struct list_head queue;
57 unsigned long pio_irqs;
58 int len;
59 void *dma_buf;
60
61 u8 stopped;
62 u8 bEndpointAddress;
63 u8 bmAttributes;
64
65 enum ep_type ep_type;
66 int fifo_num;
67};
68
Marek Vasut32f931c2015-12-04 01:51:07 +010069struct dwc2_request {
Marek Vasut0b907502015-12-04 01:36:36 +010070 struct usb_request req;
71 struct list_head queue;
72};
73
74struct dwc2_udc {
75 struct usb_gadget gadget;
76 struct usb_gadget_driver *driver;
77
Marek Vasut6939aca2015-12-04 02:23:29 +010078 struct dwc2_plat_otg_data *pdata;
Marek Vasut0b907502015-12-04 01:36:36 +010079
80 int ep0state;
Marek Vasutcb9c5d02015-12-04 02:44:33 +010081 struct dwc2_ep ep[DWC2_MAX_ENDPOINTS];
Marek Vasut0b907502015-12-04 01:36:36 +010082
83 unsigned char usb_address;
84
85 unsigned req_pending:1, req_std:1;
86};
87
Marek Vasut0b907502015-12-04 01:36:36 +010088#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN) == USB_DIR_IN)
89#define ep_index(EP) ((EP)->bEndpointAddress&0xF)
90#define ep_maxpacket(EP) ((EP)->ep.maxpacket)
91
Marek Vasut6f1c6f52015-12-04 02:21:41 +010092void otg_phy_init(struct dwc2_udc *dev);
93void otg_phy_off(struct dwc2_udc *dev);
Marek Vasut0b907502015-12-04 01:36:36 +010094
Marek Vasut4811c662015-12-04 02:32:22 +010095#endif /* __DWC2_UDC_OTG_PRIV__ */