Chris Brandt | 1f3b667 | 2017-08-23 14:53:59 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Device Tree Source extras for U-Boot for the GR Peach board |
| 4 | * |
| 5 | * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com> |
| 6 | */ |
| 7 | |
| 8 | #include "r7s72100-gr-peach.dts" |
| 9 | |
| 10 | / { |
| 11 | aliases { |
| 12 | spi0 = &rpc; |
| 13 | }; |
| 14 | |
| 15 | soc { |
| 16 | u-boot,dm-pre-reloc; |
| 17 | }; |
| 18 | |
| 19 | leds { |
| 20 | led1 { |
| 21 | label = "peach:bottom:red"; |
| 22 | }; |
| 23 | |
| 24 | led-red { |
| 25 | label = "peach:tri:red"; |
| 26 | gpios = <&port6 13 GPIO_ACTIVE_HIGH>; |
| 27 | }; |
| 28 | |
| 29 | led-green { |
| 30 | label = "peach:tri:green"; |
| 31 | gpios = <&port6 14 GPIO_ACTIVE_HIGH>; |
| 32 | }; |
| 33 | |
| 34 | led-blue { |
| 35 | label = "peach:tri:blue"; |
| 36 | gpios = <&port6 15 GPIO_ACTIVE_HIGH>; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | rpc: rpc@0xee200000 { |
| 41 | compatible = "renesas,rpc-r7s72100", "renesas,rpc"; |
| 42 | reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>; |
| 43 | bank-width = <2>; |
| 44 | num-cs = <1>; |
| 45 | status = "okay"; |
| 46 | spi-max-frequency = <50000000>; |
| 47 | #address-cells = <1>; |
| 48 | #size-cells = <0>; |
| 49 | |
| 50 | flash0: spi-flash@0 { |
| 51 | #address-cells = <1>; |
| 52 | #size-cells = <1>; |
| 53 | compatible = "jedec,spi-nor"; |
| 54 | spi-max-frequency = <50000000>; |
| 55 | spi-tx-bus-width = <1>; |
| 56 | spi-rx-bus-width = <1>; |
| 57 | reg = <0>; |
| 58 | status = "okay"; |
| 59 | }; |
| 60 | }; |
| 61 | }; |
| 62 | |
| 63 | &ostm0 { |
| 64 | u-boot,dm-pre-reloc; |
| 65 | }; |
| 66 | |
| 67 | &pinctrl { |
| 68 | u-boot,dm-pre-reloc; |
| 69 | }; |
| 70 | |
| 71 | &scif2 { |
| 72 | u-boot,dm-pre-reloc; |
| 73 | clock = <66666666>; /* ToDo: Replace by DM clock driver */ |
| 74 | }; |
| 75 | |
| 76 | &scif2_pins { |
| 77 | u-boot,dm-pre-reloc; |
| 78 | }; |