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Meenakshi Aggarwal8a03b0d2020-12-04 20:17:28 +05301// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * NXP LX2162AQDS device tree source for the SERDES block #1 - protocol 18
4 *
5 * Some assumptions are made:
6 * * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4)
7 * * mezzanine card M13/M8 is connected to IO SLOT6 (25g-aui for DPMAC 5,6)
8 *
9 * Copyright 2020 NXP
10 *
11 */
12
13#include "fsl-lx2160a-qds.dtsi"
14
15&dpmac3 {
16 status = "okay";
17 phy-handle = <&aquantia_phy1>;
18 phy-connection-type = "usxgmii";
19};
20
21&dpmac4 {
22 status = "okay";
23 phy-handle = <&aquantia_phy2>;
24 phy-connection-type = "usxgmii";
25};
26
27&dpmac5 {
28 status = "okay";
29 phy-handle = <&inphi_phy0>;
30 phy-connection-type = "25g-aui";
31};
32
33&dpmac6 {
34 status = "okay";
35 phy-handle = <&inphi_phy1>;
36 phy-connection-type = "25g-aui";
37};
38
39&emdio1_slot1 {
40 aquantia_phy1: ethernet-phy@4 {
41 compatible = "ethernet-phy-ieee802.3-c45";
42 reg = <0x0>;
43 };
44
45 aquantia_phy2: ethernet-phy@5 {
46 compatible = "ethernet-phy-ieee802.3-c45";
47 reg = <0x1>;
48 };
49};
50
51&emdio1_slot6 {
52 inphi_phy0: ethernet-phy@0 {
53 compatible = "ethernet-phy-id0210.7440";
54 reg = <0x0>;
55 };
56
57 inphi_phy1: ethernet-phy@1 {
58 compatible = "ethernet-phy-id0210.7440";
59 reg = <0x1>;
60 };
61};