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git01.mediatek.com / filogic / uboot / 400b06f41eb28b34e3142b64ad949ed0bf693fc6 / . / arch / arm / dts / am335x-draco.dts
blob: f8faa8f7c4fa280730eccb000ce066366efbdad2 [file] [log] [blame]
Heiko Schocher107ef972016-06-13 15:16:01 +0200[diff] [blame]1/*
2 * Support for Siemens DRACO board
3 *
4 * Copyright (C) 2014 - Lukas Stockmann <lukas.stockmann@siemens.com>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12
13#include "am33xx.dtsi"
14#include "am335x-draco.dtsi"
15#include <dt-bindings/input/input.h>
16
17/ {
18 model = "Siemens DRACO";
19 compatible = "siemens,draco", "ti,am33xx";
20
21 /* ethernet alias is needed for the MAC address passing from U-Boot */
22 aliases {
23 ethernet0 = &cpsw_emac0;
24 mdio-gpio0 = &mdio0;
25 };
26
27 gpio-keys {
28 compatible = "gpio-keys";
29 button0 {
30 label = "button0";
31 gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_F1>; /* button0 */
33 };
34 button1 {
35 label = "button1";
36 gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
37 linux,code = <KEY_F2>; /* button1 */
38 };
39 };
40
41 ocp {
42 debugss: debugss@4b000000 {
43 compatible = "ti,debugss";
44 ti,hwmods = "debugss";
45 reg = <0x4b000000 1000000>;
46 status = "disabled";
47 };
48 };
49};
50
51&am33xx_pinmux {
52 pinctrl-names = "default";
53 pinctrl-0 = <&gpio_mux_pins>;
54
55 gpio_mux_pins: gpio_mux_pins {
56 pinctrl-single,pins = <
57 0x1d0 (PIN_INPUT | MUX_MODE0) /* tms jtag */
58 0x1d4 (PIN_INPUT | MUX_MODE0) /* tdi jtag */
59 0x1d8 (PIN_OUTPUT | MUX_MODE0) /* tdo jtag */
60 0x1dc (PIN_INPUT | MUX_MODE0) /* tck jtag */
61 0x1e0 (PIN_INPUT | MUX_MODE0) /* trstn jtag */
62 >;
63 };
64
65 cpsw_default: cpsw_default {
66 pinctrl-single,pins = <
67 0x0E8 (PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_plck FIX STO should be a OUTPUT driven high*/
68 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
69 0x114 (PIN_OUTPUT | MUX_MODE1) /* mii1_txen.mii1_txen */
70 0x124 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd1.mii1_txd1 */
71 0x128 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd0.mii1_txd0 */
72 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.mii1_rxd1 */
73 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.mii1_rxd0 */
74 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
75 >;
76 };
77
78 cpsw_sleep: cpsw_sleep {
79 pinctrl-single,pins = <
80 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
81 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
82 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
83 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
84 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
85 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
86 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
87 >;
88 };
89
90 davinci_mdio_default: davinci_mdio_default {
91 pinctrl-single,pins = <
92 /* MDIO */
93 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
94 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
95 >;
96 };
97
98 davinci_mdio_sleep: davinci_mdio_sleep {
99 pinctrl-single,pins = <
100 /* MDIO reset value */
101 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
102 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
103 >;
104 };
105
106 gpio_mdio_default: gpio_mdio_default {
107 pinctrl-single,pins = <
108 /* MDIO via GPIO */
109 0x148 (PIN_INPUT | MUX_MODE7) /* mdio_data.mdio_data GPIO0_0 */
110 0x14c (PIN_OUTPUT | MUX_MODE7) /* mdio_clk.mdio_clk GPIO0_1 */
111 >;
112 };
113};
114
115&mac {
116 pinctrl-names = "default", "sleep";
117 pinctrl-0 = <&cpsw_default>;
118 pinctrl-1 = <&cpsw_sleep>;
119 slaves = <1>; /* use only one emac if */
120
121 mdio0: gpio {
122 compatible = "virtual,mdio-gpio";
123 pinctrl-names = "default";
124 pinctrl-0 = <&gpio_mdio_default>;
125
126 #address-cells = <1>;
127 #size-cells = <0>;
128 gpios = <&gpio0 1 GPIO_ACTIVE_HIGH /* MDIO-CLK */
129 &gpio0 0 GPIO_ACTIVE_HIGH>; /* MDIO-DATA */
130
131 phy0: ethernet-phy@1 {
132 reg = <0>;
133 };
134 };
135};
136
137/* Disable davinci/am335x mdio interface on this platform */
138&davinci_mdio {
139 pinctrl-names = "default", "sleep";
140 pinctrl-0 = <&davinci_mdio_default>;
141 pinctrl-1 = <&davinci_mdio_sleep>;
142 status = "disabled";
143};
144
145&cpsw_emac0 {
Grygorii Strashkoa6f37dc2019-08-31 10:30:34 +0300[diff] [blame]146 phy-handle = <&phy0>;
Heiko Schocher107ef972016-06-13 15:16:01 +0200[diff] [blame]147 phy-mode = "rmii";
148};
149
150&phy_sel {
151 rmii-clock-ext;
152};