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git01.mediatek.com / filogic / uboot / 3ff6cd7c3ac7c28a82eb1280779ae10821f13bdc / . / include / configs / dragonboard410c.h
blob: 6474e57b29abdc44ae165d496dc1a2416a5f00bb [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]2/*
3 * Board configuration file for Dragonboard 410C
4 *
5 * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]6 */
7
8#ifndef __CONFIGS_DRAGONBOARD410C_H
9#define __CONFIGS_DRAGONBOARD410C_H
10
11#include <linux/sizes.h>
12#include <asm/arch/sysmap-apq8016.h>
13
Stephan Gerhold2279dde2021-07-07 11:06:02 +0200[diff] [blame]14/* Build new ELF image from u-boot.bin (U-Boot + appended DTB) */
15#define CONFIG_REMAKE_ELF
16
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]17/* Physical Memory Map */
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]18#define PHYS_SDRAM_1 0x80000000
Stephan Gerhold3ff6cd72021-07-14 10:56:24 +0200[diff] [blame^]19/* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */
20#define PHYS_SDRAM_1_SIZE SZ_1G
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]21#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]22#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
23#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000)
Jorge Ramirez-Ortiz2212f632018-01-10 11:34:34 +0100[diff] [blame]24#define CONFIG_SYS_BOOTM_LEN SZ_64M
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]25
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]26/* UART */
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]27
28/* Generic Timer Definitions */
29#define COUNTER_FREQUENCY 19000000
30
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]31/* Fixup - in init code we switch from device to host mode,
32 * it has to be done after each HCD reset */
33#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
34
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]35/* BOOTP options */
36#define CONFIG_BOOTP_BOOTFILESIZE
37
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]38#define BOOT_TARGET_DEVICES(func) \
39 func(USB, usb, 0) \
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]40 func(MMC, mmc, 1) \
Ricardo Salveti de Araujo1ff62292016-07-03 13:59:01 -0300[diff] [blame]41 func(MMC, mmc, 0) \
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]42 func(DHCP, dhcp, na)
43
44#include <config_distro_bootcmd.h>
45
46/* Does what recovery does */
47#define REFLASH(file, part) \
48"part start mmc 0 "#part" start && "\
49"part size mmc 0 "#part" size && "\
50"tftp $loadaddr "#file" && " \
51"mmc write $loadaddr $start $size && "
52
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]53#define CONFIG_ENV_REFLASH \
54"mmc dev 0 && "\
55"usb start && "\
56"dhcp && "\
57"tftp $loadaddr dragonboard/rescue/gpt_both0.bin && "\
58"mmc write $loadaddr 0 43 && " \
59"mmc rescan && "\
60REFLASH(dragonboard/rescue/NON-HLOS.bin, 1)\
61REFLASH(dragonboard/rescue/sbl1.mbn, 2)\
62REFLASH(dragonboard/rescue/rpm.mbn, 3)\
63REFLASH(dragonboard/rescue/tz.mbn, 4)\
64REFLASH(dragonboard/rescue/hyp.mbn, 5)\
65REFLASH(dragonboard/rescue/sec.dat, 6)\
66REFLASH(dragonboard/rescue/emmc_appsboot.mbn, 7)\
67REFLASH(dragonboard/u-boot.img, 8)\
68"usb stop &&"\
69"echo Reflash completed"
70
71/* Environment */
72#define CONFIG_EXTRA_ENV_SETTINGS \
73 "reflash="CONFIG_ENV_REFLASH"\0"\
74 "loadaddr=0x81000000\0" \
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]75 "initrd_high=0xffffffffffffffff\0" \
76 "linux_image=Image\0" \
Andreas Färberce302982016-04-13 14:16:22 +0200[diff] [blame]77 "kernel_addr_r=0x81000000\0"\
Rob Clark7ed446a2018-01-10 11:34:40 +0100[diff] [blame]78 "fdtfile=qcom/apq8016-sbc.dtb\0" \
Andreas Färberce302982016-04-13 14:16:22 +0200[diff] [blame]79 "fdt_addr_r=0x83000000\0"\
80 "ramdisk_addr_r=0x84000000\0"\
Ricardo Salveti de Araujo88044532016-07-03 14:16:03 -0300[diff] [blame]81 "scriptaddr=0x90000000\0"\
82 "pxefile_addr_r=0x90100000\0"\
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]83 BOOTENV
84
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]85/* Size of malloc() pool */
86#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
87
88/* Monitor Command Prompt */
89#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Mateusz Kulikowskiee5e70d2016-03-31 23:12:33 +0200[diff] [blame]90#define CONFIG_SYS_MAXARGS 64 /* max command args */
91
92#endif