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git01.mediatek.com / filogic / uboot / 3f9b23ae4c55efb37c5db4892c5007f634e8f92a / . / configs / ba10_tv_box_defconfig
blob: 66c444fc750734f2581f5c4875114de6193ea22f [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SUNXI=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]3CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox"
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]4CONFIG_SPL=y
Tom Rinib937b2e2016-06-13 09:45:14 -0400[diff] [blame]5CONFIG_MACH_SUN4I=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]6CONFIG_DRAM_CLK=384
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]7CONFIG_DRAM_EMR1=4
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]8CONFIG_USB0_VBUS_PIN="PB9"
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]9CONFIG_USB2_VBUS_PIN="PH12"
Hans de Goede80cb62d2015-08-05 17:05:29 +0200[diff] [blame]10CONFIG_VIDEO_COMPOSITE=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]11# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]12CONFIG_SPL_STACK=0x8000
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]13CONFIG_SPL_I2C=y
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]14CONFIG_SYS_PBSIZE=1024
Tom Rini8825ec42021-08-17 17:59:47 -0400[diff] [blame]15CONFIG_SYS_I2C_MVTWSI=y
Tom Rinia6e29232021-08-18 23:12:32 -0400[diff] [blame]16CONFIG_SYS_I2C_SLAVE=0x7f
17CONFIG_SYS_I2C_SPEED=400000
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]18CONFIG_MII=y
Mylène Josserand43ef1842017-04-02 12:59:07 +0200[diff] [blame]19CONFIG_SUN4I_EMAC=y
Tom Rini10e87172015-06-30 16:51:15 -0400[diff] [blame]20CONFIG_USB_EHCI_HCD=y
Tom Rini7fc96ef2019-02-07 14:53:03 -0500[diff] [blame]21CONFIG_USB_OHCI_HCD=y
Paul Kocialkowskie16ab872015-08-04 17:04:08 +0200[diff] [blame]22CONFIG_USB_MUSB_HOST=y