Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 3f7f8e6c6e31a4d87dc08aeaacd0fe3aad3d4e50 / . / configs / cgtqmx6eval_defconfig
blob: fd4e3077acfaa932f3c4662f08228772b4de30e0 [file] [log] [blame]
Otavio Salvadorc102b9e2015-11-19 19:02:38 -0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_MX6=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x17800000
Simon Glass0bdfc3e2016-09-12 23:18:39 -0600[diff] [blame]4CONFIG_SPL_GPIO_SUPPORT=y
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]5CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]6CONFIG_SPL_LIBGENERIC_SUPPORT=y
Otavio Salvadorc102b9e2015-11-19 19:02:38 -0200[diff] [blame]7CONFIG_TARGET_CGTQMX6EVAL=y
Simon Glassbd58f1d2016-09-12 23:18:44 -0600[diff] [blame]8CONFIG_SPL_MMC_SUPPORT=y
Simon Glasse076d6f2016-09-12 23:18:56 -0600[diff] [blame]9CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]10CONFIG_NR_DRAM_BANKS=1
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]11CONFIG_SPL=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]12CONFIG_SPL_LIBDISK_SUPPORT=y
Simon Glass219d6122016-09-12 23:18:57 -0600[diff] [blame]13CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassb24fdca2016-09-12 23:18:58 -0600[diff] [blame]14CONFIG_SPL_SPI_SUPPORT=y
Fabio Estevambf8e7272017-11-15 17:04:03 -0200[diff] [blame]15CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
Tom Rinib937b2e2016-06-13 09:45:14 -0400[diff] [blame]16CONFIG_BOOTDELAY=3
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]17# CONFIG_CONSOLE_MUX is not set
18CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Simon Glassac3ee422016-10-17 20:12:59 -0600[diff] [blame]19CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]20CONFIG_SUPPORT_RAW_INITRD=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]21CONFIG_MISC_INIT_R=y
Philipp Tomsichb3027472018-11-30 22:13:25 +0100[diff] [blame]22CONFIG_BOUNCE_BUFFER=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]23CONFIG_BOARD_EARLY_INIT_F=y
Simon Goldschmidtcc4078c2018-09-30 14:31:53 +0200[diff] [blame]24CONFIG_SPL_TEXT_BASE=0x00908000
Tien Fong Chee6091dd12019-01-23 14:20:05 +0800[diff] [blame]25CONFIG_SPL_FS_EXT4=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]26CONFIG_SPL_I2C_SUPPORT=y
Marek Vasute2542252018-04-07 16:05:27 +0200[diff] [blame]27CONFIG_SPL_SPI_LOAD=y
Hannes Schmelzer38df9972019-08-22 15:41:46 +0200[diff] [blame]28CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]29CONFIG_SPL_WATCHDOG_SUPPORT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]30CONFIG_HUSH_PARSER=y
Simon Glassc08ebf62016-02-22 22:55:40 -0700[diff] [blame]31CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]32CONFIG_CMD_BOOTZ=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]33CONFIG_CMD_DFU=y
Otavio Salvadorc102b9e2015-11-19 19:02:38 -0200[diff] [blame]34# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]35CONFIG_CMD_GPIO=y
36CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]37CONFIG_CMD_MMC=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]38CONFIG_CMD_SATA=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]39CONFIG_CMD_SF=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]40CONFIG_CMD_USB=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]41CONFIG_CMD_USB_MASS_STORAGE=y
Otavio Salvadorc102b9e2015-11-19 19:02:38 -0200[diff] [blame]42# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]43CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]44CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]45CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]46CONFIG_CMD_CACHE=y
47CONFIG_CMD_EXT2=y
48CONFIG_CMD_EXT4=y
49CONFIG_CMD_EXT4_WRITE=y
50CONFIG_CMD_FAT=y
51CONFIG_CMD_FS_GENERIC=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]52CONFIG_ENV_IS_IN_SPI_FLASH=y
Alex Kiernana410d6e2018-04-01 16:37:53 +0000[diff] [blame]53CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
Tuomas Tynkkynen745edca2017-12-08 15:36:18 +0200[diff] [blame]54CONFIG_DWC_AHSATA=y
Tom Rini265c7da2016-09-19 13:31:30 -0400[diff] [blame]55CONFIG_DFU_MMC=y
56CONFIG_DFU_SF=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]57CONFIG_USB_FUNCTION_FASTBOOT=y
58CONFIG_FASTBOOT_BUF_ADDR=0x12000000
Adam Ford01836582019-08-14 07:23:43 -0500[diff] [blame]59CONFIG_FSL_USDHC=y
Vignesh Re57ea112019-02-05 11:29:10 +0530[diff] [blame]60CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]61CONFIG_SF_DEFAULT_MODE=0
62CONFIG_SF_DEFAULT_SPEED=20000000
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]63CONFIG_PHYLIB=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]64CONFIG_MII=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]65CONFIG_SPI=y
Tuomas Tynkkynend3958792018-02-07 02:42:19 +0200[diff] [blame]66CONFIG_MXC_SPI=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]67CONFIG_USB=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]68CONFIG_USB_STORAGE=y
Simon Glass049f06a2016-10-17 20:13:01 -0600[diff] [blame]69CONFIG_USB_KEYBOARD=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]70CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]71CONFIG_USB_GADGET=y
Maxime Ripard7f78b9d2017-09-07 08:58:08 +0200[diff] [blame]72CONFIG_USB_GADGET_MANUFACTURER="Congatec"
73CONFIG_USB_GADGET_VENDOR_NUM=0x0525
74CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]75CONFIG_CI_UDC=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]76CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]77CONFIG_USB_ETHER_ASIX=y
Anatolij Gustschine6a7ef52019-03-18 23:29:33 +0100[diff] [blame]78CONFIG_VIDEO_IPUV3=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]79CONFIG_VIDEO=y
Simon Glass706605f2016-10-17 20:12:51 -0600[diff] [blame]80# CONFIG_VIDEO_SW_CURSOR is not set
Simon Glassa66c5412016-02-22 22:55:42 -0700[diff] [blame]81CONFIG_OF_LIBFDT=y