Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Texas Instruments Incorporated. |
| 4 | * Aneesh V <aneesh@ti.com> |
| 5 | * Steve Sakoman <steve@sakoman.com> |
| 6 | * |
| 7 | * Configuration settings for the TI SDP4430 board. |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | #ifndef __CONFIG_H |
| 29 | #define __CONFIG_H |
| 30 | |
| 31 | /* |
| 32 | * High Level Configuration Options |
| 33 | */ |
| 34 | #define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */ |
| 35 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ |
| 36 | #define CONFIG_OMAP44XX 1 /* which is a 44XX */ |
| 37 | #define CONFIG_OMAP4430 1 /* which is in a 4430 */ |
| 38 | #define CONFIG_4430SDP 1 /* working with SDP */ |
Steve Sakoman | 9bb65b5 | 2010-07-15 13:43:10 -0700 | [diff] [blame] | 39 | #define CONFIG_ARCH_CPU_INIT |
Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 40 | |
| 41 | /* Get CPU defs */ |
| 42 | #include <asm/arch/cpu.h> |
| 43 | #include <asm/arch/omap4.h> |
| 44 | |
| 45 | /* Display CPU and Board Info */ |
| 46 | #define CONFIG_DISPLAY_CPUINFO 1 |
| 47 | #define CONFIG_DISPLAY_BOARDINFO 1 |
| 48 | |
| 49 | /* Keep L2 Cache Disabled */ |
| 50 | #define CONFIG_L2_OFF 1 |
| 51 | |
| 52 | /* Clock Defines */ |
| 53 | #define V_OSCK 38400000 /* Clock output from T2 */ |
| 54 | #define V_SCLK V_OSCK |
| 55 | |
| 56 | #undef CONFIG_USE_IRQ /* no support for IRQs */ |
| 57 | #define CONFIG_MISC_INIT_R |
| 58 | |
| 59 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 60 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 61 | #define CONFIG_INITRD_TAG 1 |
| 62 | #define CONFIG_REVISION_TAG 1 |
| 63 | |
| 64 | /* |
| 65 | * Size of malloc() pool |
| 66 | * Total Size Environment - 256k |
| 67 | * Malloc - add 256k |
| 68 | */ |
| 69 | #define CONFIG_ENV_SIZE (256 << 10) |
| 70 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) |
| 71 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */ |
| 72 | /* initial data */ |
| 73 | /* Vector Base */ |
| 74 | #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE |
| 75 | |
| 76 | /* |
| 77 | * Hardware drivers |
| 78 | */ |
| 79 | |
| 80 | /* |
| 81 | * serial port - NS16550 compatible |
| 82 | */ |
| 83 | #define V_NS16550_CLK 48000000 |
| 84 | |
| 85 | #define CONFIG_SYS_NS16550 |
| 86 | #define CONFIG_SYS_NS16550_SERIAL |
| 87 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 88 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 89 | #define CONFIG_CONS_INDEX 3 |
| 90 | #define CONFIG_SYS_NS16550_COM3 UART3_BASE |
| 91 | |
| 92 | #define CONFIG_ENV_IS_NOWHERE |
| 93 | #define CONFIG_ENV_OVERWRITE |
| 94 | #define CONFIG_BAUDRATE 115200 |
| 95 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
| 96 | 115200} |
| 97 | |
| 98 | /* I2C */ |
| 99 | #define CONFIG_HARD_I2C 1 |
| 100 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 101 | #define CONFIG_SYS_I2C_SLAVE 1 |
| 102 | #define CONFIG_SYS_I2C_BUS 0 |
| 103 | #define CONFIG_SYS_I2C_BUS_SELECT 1 |
| 104 | #define CONFIG_DRIVER_OMAP34XX_I2C 1 |
| 105 | #define CONFIG_I2C_MULTI_BUS 1 |
| 106 | |
Steve Sakoman | f8f7c95 | 2010-07-15 12:53:42 -0700 | [diff] [blame] | 107 | /* TWL6030 */ |
| 108 | #define CONFIG_TWL6030_POWER 1 |
| 109 | |
Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 110 | /* MMC */ |
| 111 | #define CONFIG_MMC 1 |
| 112 | #define CONFIG_OMAP3_MMC 1 |
| 113 | #define CONFIG_SYS_MMC_SET_DEV 1 |
| 114 | #define CONFIG_DOS_PARTITION 1 |
| 115 | |
Steve Sakoman | 69c50e8 | 2010-06-25 12:44:33 -0700 | [diff] [blame] | 116 | /* USB */ |
| 117 | #define CONFIG_MUSB_UDC 1 |
| 118 | #define CONFIG_USB_OMAP3 1 |
| 119 | |
| 120 | /* USB device configuration */ |
| 121 | #define CONFIG_USB_DEVICE 1 |
| 122 | #define CONFIG_USB_TTY 1 |
| 123 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
| 124 | /* Change these to suit your needs */ |
| 125 | #define CONFIG_USBD_VENDORID 0x0451 |
| 126 | #define CONFIG_USBD_PRODUCTID 0x5678 |
| 127 | #define CONFIG_USBD_MANUFACTURER "Texas Instruments" |
| 128 | #define CONFIG_USBD_PRODUCT_NAME "SDP4430" |
| 129 | |
Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 130 | /* Flash */ |
| 131 | #define CONFIG_SYS_NO_FLASH 1 |
| 132 | |
| 133 | /* commands to include */ |
| 134 | #include <config_cmd_default.h> |
| 135 | |
| 136 | /* Enabled commands */ |
| 137 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ |
| 138 | #define CONFIG_CMD_FAT /* FAT support */ |
| 139 | #define CONFIG_CMD_I2C /* I2C serial bus support */ |
| 140 | #define CONFIG_CMD_MMC /* MMC support */ |
| 141 | |
| 142 | /* Disabled commands */ |
| 143 | #undef CONFIG_CMD_NET |
| 144 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
| 145 | #undef CONFIG_CMD_IMLS /* List all found images */ |
| 146 | |
| 147 | /* |
| 148 | * Enabling relocation of u-boot by default |
| 149 | * Relocation can be skipped if u-boot is copied to the TEXT_BASE |
| 150 | */ |
| 151 | #undef CONFIG_SKIP_RELOCATE_UBOOT |
| 152 | |
| 153 | /* |
| 154 | * Environment setup |
| 155 | */ |
| 156 | |
Steve Sakoman | 9abea22 | 2010-07-07 15:25:25 -0700 | [diff] [blame] | 157 | #define CONFIG_BOOTDELAY 3 |
| 158 | |
Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 159 | /* allow overwriting serial config and ethaddr */ |
| 160 | #define CONFIG_ENV_OVERWRITE |
| 161 | |
| 162 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 163 | "loadaddr=0x82000000\0" \ |
| 164 | "console=ttyS2,115200n8\0" \ |
Steve Sakoman | 69c50e8 | 2010-06-25 12:44:33 -0700 | [diff] [blame] | 165 | "usbtty=cdc_acm\0" \ |
Steve Sakoman | 9abea22 | 2010-07-07 15:25:25 -0700 | [diff] [blame] | 166 | "vram=16M\0" \ |
Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 167 | "mmcdev=1\0" \ |
| 168 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
| 169 | "mmcrootfstype=ext3 rootwait\0" \ |
| 170 | "mmcargs=setenv bootargs console=${console} " \ |
Steve Sakoman | 9abea22 | 2010-07-07 15:25:25 -0700 | [diff] [blame] | 171 | "vram=${vram} " \ |
Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 172 | "root=${mmcroot} " \ |
| 173 | "rootfstype=${mmcrootfstype}\0" \ |
| 174 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 175 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ |
| 176 | "source ${loadaddr}\0" \ |
| 177 | "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ |
| 178 | "mmcboot=echo Booting from mmc${mmcdev} ...; " \ |
| 179 | "run mmcargs; " \ |
| 180 | "bootm ${loadaddr}\0" \ |
| 181 | |
| 182 | #define CONFIG_BOOTCOMMAND \ |
| 183 | "if mmc init ${mmcdev}; then " \ |
| 184 | "if run loadbootscript; then " \ |
| 185 | "run bootscript; " \ |
| 186 | "else " \ |
| 187 | "if run loaduimage; then " \ |
| 188 | "run mmcboot; " \ |
Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 189 | "fi; " \ |
| 190 | "fi; " \ |
| 191 | "fi" |
| 192 | |
| 193 | #define CONFIG_AUTO_COMPLETE 1 |
| 194 | |
| 195 | /* |
| 196 | * Miscellaneous configurable options |
| 197 | */ |
| 198 | |
| 199 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 200 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
| 201 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| 202 | #define CONFIG_SYS_PROMPT "OMAP4430 SDP # " |
| 203 | #define CONFIG_SYS_CBSIZE 256 |
| 204 | /* Print Buffer Size */ |
| 205 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 206 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 207 | #define CONFIG_SYS_MAXARGS 16 |
| 208 | /* Boot Argument Buffer Size */ |
| 209 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 210 | |
| 211 | /* |
| 212 | * memtest setup |
| 213 | */ |
| 214 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
| 215 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) |
| 216 | |
| 217 | /* Default load address */ |
| 218 | #define CONFIG_SYS_LOAD_ADDR 0x80000000 |
| 219 | |
| 220 | /* Use General purpose timer 1 */ |
Steve Sakoman | 58657e6 | 2010-07-20 14:56:07 -0700 | [diff] [blame] | 221 | #define CONFIG_SYS_TIMERBASE GPT2_BASE |
Steve Sakoman | 1b3dd5d | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 222 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
| 223 | #define CONFIG_SYS_HZ 1000 |
| 224 | |
| 225 | /* |
| 226 | * Stack sizes |
| 227 | * |
| 228 | * The stack sizes are set up in start.S using the settings below |
| 229 | */ |
| 230 | #define CONFIG_STACKSIZE (128 << 10) /* Regular stack */ |
| 231 | #ifdef CONFIG_USE_IRQ |
| 232 | #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack */ |
| 233 | #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack */ |
| 234 | #endif |
| 235 | |
| 236 | /* |
| 237 | * SDRAM Memory Map |
| 238 | * Even though we use two CS all the memory |
| 239 | * is mapped to one contiguous block |
| 240 | */ |
| 241 | #define CONFIG_NR_DRAM_BANKS 1 |
| 242 | |
| 243 | #endif /* __CONFIG_H */ |