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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChung Liew3cdc00a2008-08-11 13:41:49 +00002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang8d8dac92012-03-26 21:49:08 +00006 * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
TsiChung Liew3cdc00a2008-08-11 13:41:49 +00007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChung Liew3cdc00a2008-08-11 13:41:49 +00008 */
9
10#include <common.h>
Simon Glass0ffd9db2019-12-28 10:45:06 -070011#include <init.h>
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000012#include <spi.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060013#include <asm/global_data.h>
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000014#include <asm/immap.h>
Alison Wang8d8dac92012-03-26 21:49:08 +000015#include <asm/io.h>
Simon Glassdbd79542020-05-10 11:40:11 -060016#include <linux/delay.h>
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000017
18DECLARE_GLOBAL_DATA_PTR;
19
20int checkboard(void)
21{
22 /*
23 * need to to:
24 * Check serial flash size. if 2mb evb, else 8mb demo
25 */
26 puts("Board: ");
27 puts("Freescale M54451 EVB\n");
28 return 0;
29};
30
Simon Glassd35f3382017-04-06 12:47:05 -060031int dram_init(void)
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000032{
33 u32 dramsize;
34#ifdef CONFIG_CF_SBF
35 /*
36 * Serial Boot: The dram is already initialized in start.S
37 * only require to return DRAM size
38 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020039 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000040#else
Alison Wang8d8dac92012-03-26 21:49:08 +000041 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
42 gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000043 u32 i;
44
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000046
Alison Wang8d8dac92012-03-26 21:49:08 +000047 if ((in_be32(&sdram->sdcfg1) == CONFIG_SYS_SDRAM_CFG1) &&
48 (in_be32(&sdram->sdcfg2) == CONFIG_SYS_SDRAM_CFG2))
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000049 return dramsize;
50
51 for (i = 0x13; i < 0x20; i++) {
52 if (dramsize == (1 << i))
53 break;
54 }
55 i--;
56
Alison Wang8d8dac92012-03-26 21:49:08 +000057 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000058
Alison Wang8d8dac92012-03-26 21:49:08 +000059 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000060
Alison Wang8d8dac92012-03-26 21:49:08 +000061 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
62 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000063
64 udelay(200);
65
66 /* Issue PALL */
Alison Wang8d8dac92012-03-26 21:49:08 +000067 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000068 __asm__("nop");
69
70 /* Perform two refresh cycles */
Alison Wang8d8dac92012-03-26 21:49:08 +000071 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000072 __asm__("nop");
Alison Wang8d8dac92012-03-26 21:49:08 +000073 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000074 __asm__("nop");
75
76 /* Issue LEMR */
Alison Wang8d8dac92012-03-26 21:49:08 +000077 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000078 __asm__("nop");
Alison Wang8d8dac92012-03-26 21:49:08 +000079 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000080 __asm__("nop");
81
Alison Wang8d8dac92012-03-26 21:49:08 +000082 out_be32(&sdram->sdcr,
83 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000000);
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000084
85 udelay(100);
86#endif
Simon Glass39f90ba2017-03-31 08:40:25 -060087 gd->ram_size = dramsize;
88
89 return 0;
TsiChung Liew3cdc00a2008-08-11 13:41:49 +000090};
91
92int testdram(void)
93{
94 /* TODO: XXX XXX XXX */
95 printf("DRAM test not implemented!\n");
96
97 return (0);
98}