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Stefano Babic6ec4b952012-10-10 21:11:46 +00001/*
2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
3 *
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5 *
6 * Configuration for the woodburn board.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __WOODBURN_COMMON_CONFIG_H
25#define __WOODBURN_COMMON_CONFIG_H
26
27#include <asm/arch/imx-regs.h>
28
29 /* High Level Configuration Options */
30#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
31#define CONFIG_MX35
32#define CONFIG_MX35_HCLK_FREQ 24000000
33
34#define CONFIG_SYS_DCACHE_OFF
35#define CONFIG_SYS_CACHELINE_SIZE 32
36
37#define CONFIG_DISPLAY_CPUINFO
38
39/* Only in case the value is not present in mach-types.h */
40#ifndef MACH_TYPE_FLEA3
41#define MACH_TYPE_FLEA3 3668
42#endif
43
44#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
45
46/* This is required to setup the ESDC controller */
47
48#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
49#define CONFIG_REVISION_TAG
50#define CONFIG_SETUP_MEMORY_TAGS
51#define CONFIG_INITRD_TAG
52
53/*
54 * Size of malloc() pool
55 */
56#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
57
58/*
59 * Hardware drivers
60 */
61#define CONFIG_HARD_I2C
62#define CONFIG_I2C_MXC
63#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
64#define CONFIG_SYS_I2C_SPEED 100000
65#define CONFIG_MXC_SPI
66#define CONFIG_MXC_GPIO
67
68/* PMIC Controller */
Stefano Babicaba29e42012-12-08 12:02:45 +010069#define CONFIG_POWER
70#define CONFIG_POWER_I2C
71#define CONFIG_POWER_FSL
Stefano Babic6ec4b952012-10-10 21:11:46 +000072#define CONFIG_PMIC_FSL_MC13892
Stefano Babic6ec4b952012-10-10 21:11:46 +000073#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
74#define CONFIG_RTC_MC13XXX
75
76
77/* mmc driver */
78#define CONFIG_MMC
79#define CONFIG_GENERIC_MMC
80#define CONFIG_FSL_ESDHC
81#define CONFIG_SYS_FSL_ESDHC_ADDR 0
82#define CONFIG_SYS_FSL_ESDHC_NUM 1
83
84/*
85 * UART (console)
86 */
87#define CONFIG_MXC_UART
88#define CONFIG_MXC_UART_BASE UART1_BASE
89
90/* allow to overwrite serial and ethaddr */
91#define CONFIG_ENV_OVERWRITE
92#define CONFIG_CONS_INDEX 1
93#define CONFIG_BAUDRATE 115200
94
95/*
96 * Command definition
97 */
98
99#include <config_cmd_default.h>
100
101#define CONFIG_CMD_PING
102#define CONFIG_CMD_DATE
103#define CONFIG_CMD_DHCP
104#define CONFIG_BOOTP_SUBNETMASK
105#define CONFIG_BOOTP_GATEWAY
106#define CONFIG_BOOTP_DNS
107
108#define CONFIG_CMD_NAND
109#define CONFIG_CMD_CACHE
110
111#define CONFIG_CMD_I2C
112#define CONFIG_CMD_SPI
113#define CONFIG_CMD_MII
114#define CONFIG_CMD_NET
115
116#define CONFIG_CMD_MMC
117#define CONFIG_DOS_PARTITION
118#define CONFIG_EFI_PARTITION
119#define CONFIG_CMD_EXT2
120#define CONFIG_CMD_FAT
121
122#define CONFIG_CMD_GPIO
123#define CONFIG_MXC_GPIO
124
125#define CONFIG_NET_RETRY_COUNT 100
126
127#define CONFIG_BOOTDELAY 3
128
129#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
130
131
132/*
133 * Ethernet on SOC (FEC)
134 */
135#define CONFIG_FEC_MXC
136#define IMX_FEC_BASE FEC_BASE_ADDR
137#define CONFIG_PHYLIB
138#define CONFIG_PHY_MICREL
139#define CONFIG_FEC_MXC_PHYADDR 0x1
140
141#define CONFIG_MII
142#define CONFIG_DISCOVER_PHY
143
144#define CONFIG_ARP_TIMEOUT 200UL
145
146/*
147 * Miscellaneous configurable options
148 */
149#define CONFIG_SYS_LONGHELP /* undef to save memory */
150#define CONFIG_SYS_PROMPT "woodburn U-Boot > "
151#define CONFIG_CMDLINE_EDITING
152#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
153
154#define CONFIG_AUTO_COMPLETE
155#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
156/* Print Buffer Size */
157#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
158#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
159#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
160
161#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
162#define CONFIG_SYS_MEMTEST_END 0x10000
163
164#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
165
166#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
167
168#define CONFIG_SYS_HZ 1000
169
170
171/*
172 * Stack sizes
173 *
174 * The stack sizes are set up in start.S using the settings below
175 */
176#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
177
178/*
179 * Physical Memory Map
180 */
181#define CONFIG_NR_DRAM_BANKS 1
182#define PHYS_SDRAM_1 CSD0_BASE_ADDR
183#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
184
185#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
186
187#define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \
188 IRAM_BASE_ADDR - \
189 GENERATED_GBL_DATA_SIZE)
190#define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \
191 CONFIG_SYS_GBL_DATA_OFFSET)
192
193/*
194 * MTD Command for mtdparts
195 */
196#define CONFIG_CMD_MTDPARTS
197#define CONFIG_MTD_DEVICE
198#define CONFIG_FLASH_CFI_MTD
199#define CONFIG_MTD_PARTITIONS
200#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
201#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \
202 "32m(rootfb)," \
203 "64m(pcache)," \
204 "64m(app1)," \
205 "10m(app2),-(spool);" \
206 "physmap-flash.0:512k(u-boot),64k(env1)," \
207 "64k(env2),3776k(kernel1),3776k(kernel2)"
208
209/*
210 * FLASH and environment organization
211 */
212#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
213#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
214#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
215/* Monitor at beginning of flash */
216#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
217#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
218
219#define CONFIG_ENV_SECT_SIZE (128 * 1024)
220#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
221
222/* Address and size of Redundant Environment Sector */
223#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
224#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
225
226#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
227 CONFIG_SYS_MONITOR_LEN)
228
229#define CONFIG_ENV_IS_IN_FLASH
230
231/*
232 * CFI FLASH driver setup
233 */
234#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
235#define CONFIG_FLASH_CFI_DRIVER
236
237/* A non-standard buffered write algorithm */
238#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
239#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
240
241/*
242 * NAND FLASH driver setup
243 */
244#define CONFIG_NAND_MXC
245#define CONFIG_NAND_MXC_V1_1
246#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
247#define CONFIG_SYS_MAX_NAND_DEVICE 1
248#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
249#define CONFIG_MXC_NAND_HWECC
250#define CONFIG_SYS_NAND_LARGEPAGE
251
252#if 0
253#define CONFIG_MTD_DEBUG
254#define CONFIG_MTD_DEBUG_VERBOSE 7
255#endif
256#define CONFIG_SYS_NAND_ONFI_DETECTION
257
258/*
259 * Default environment and default scripts
260 * to update uboot and load kernel
261 */
262#define xstr(s) str(s)
263#define str(s) #s
264
265#define CONFIG_HOSTNAME woodburn
266#define CONFIG_EXTRA_ENV_SETTINGS \
267 "netdev=eth0\0" \
268 "nfsargs=setenv bootargs root=/dev/nfs rw " \
269 "nfsroot=${serverip}:${rootpath}\0" \
270 "ramargs=setenv bootargs root=/dev/ram rw\0" \
271 "addip_sta=setenv bootargs ${bootargs} " \
272 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
273 ":${hostname}:${netdev}:off panic=1\0" \
274 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
275 "addip=if test -n ${ipdyn};then run addip_dyn;" \
276 "else run addip_sta;fi\0" \
277 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
278 "addtty=setenv bootargs ${bootargs}" \
279 " console=ttymxc0,${baudrate}\0" \
280 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
281 "loadaddr=80800000\0" \
282 "kernel_addr_r=80800000\0" \
283 "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
284 "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
285 "ramdisk_file=" xstr(CONFIG_HOSTNAME) "/uRamdisk\0" \
286 "flash_self=run ramargs addip addtty addmtd addmisc;" \
287 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
288 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
289 "bootm ${kernel_addr}\0" \
290 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
291 "run nfsargs addip addtty addmtd addmisc;" \
292 "bootm ${kernel_addr_r}\0" \
293 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
294 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
295 "net_self=if run net_self_load;then " \
296 "run ramargs addip addtty addmtd addmisc;" \
297 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
298 "else echo Images not loades;fi\0" \
299 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
300 "load=tftp ${loadaddr} ${u-boot}\0" \
301 "uboot_addr=" xstr(CONFIG_SYS_MONITOR_BASE) "\0" \
302 "update=protect off ${uboot_addr} +80000;" \
303 "erase ${uboot_addr} +80000;" \
304 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
305 "upd=if run load;then echo Updating u-boot;if run update;" \
306 "then echo U-Boot updated;" \
307 "else echo Error updating u-boot !;" \
308 "echo Board without bootloader !!;" \
309 "fi;" \
310 "else echo U-Boot not downloaded..exiting;fi\0" \
311 "bootcmd=run net_nfs\0"
312
313#endif /* __CONFIG_H */