Rajeshwari Birje | 194fa0a | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 1 | |
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 2 | /* |
Hatim RV | 793ed48 | 2012-12-11 00:52:48 +0000 | [diff] [blame] | 3 | * Copyright (C) 2012 Samsung Electronics |
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 4 | * |
Hatim RV | 793ed48 | 2012-12-11 00:52:48 +0000 | [diff] [blame] | 5 | * Configuration settings for the SAMSUNG EXYNOS5250 board. |
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 8 | */ |
9 | |||||
Rajeshwari Birje | 194fa0a | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 10 | #ifndef __CONFIG_5250_H |
11 | #define __CONFIG_5250_H | ||||
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 12 | |
Simon Glass | be16500 | 2014-10-07 22:01:44 -0600 | [diff] [blame] | 13 | #include <configs/exynos5-common.h> |
Chander Kashyap | d440993 | 2013-07-25 18:28:52 +0530 | [diff] [blame] | 14 | #define CONFIG_EXYNOS5250 |
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 15 | |
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 16 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
17 | #define CONFIG_SYS_TEXT_BASE 0x43E00000 | ||||
18 | |||||
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 19 | /* MACH_TYPE_SMDK5250 macro will be removed once added to mach-types */ |
20 | #define MACH_TYPE_SMDK5250 3774 | ||||
21 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5250 | ||||
22 | |||||
Akshay Saraswat | e272842 | 2014-06-18 17:54:00 +0530 | [diff] [blame] | 23 | #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) |
24 | |||||
Rajeshwari Shinde | e44ebd0 | 2012-07-03 20:02:53 +0000 | [diff] [blame] | 25 | #define CONFIG_SPL_TEXT_BASE 0x02023400 |
Rajeshwari Shinde | e44ebd0 | 2012-07-03 20:02:53 +0000 | [diff] [blame] | 26 | |
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 27 | #define CONFIG_IRAM_STACK 0x02050000 |
28 | |||||
Rajeshwari Shinde | bed2442 | 2013-07-04 12:29:17 +0530 | [diff] [blame] | 29 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK |
Chander Kashyap | ed2e25a | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 30 | |
Rajeshwari Birje | 194fa0a | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 31 | /* I2C */ |
32 | #define CONFIG_MAX_I2C_NUM 8 | ||||
Simon Glass | 9f68f8e | 2012-12-05 14:46:45 +0000 | [diff] [blame] | 33 | |
Ajay Kumar | ca67ee2 | 2013-01-08 20:42:26 +0000 | [diff] [blame] | 34 | /* Display */ |
35 | #define CONFIG_LCD | ||||
Ajay Kumar | 11575ae | 2013-01-10 21:06:10 +0000 | [diff] [blame] | 36 | #ifdef CONFIG_LCD |
Ajay Kumar | ca67ee2 | 2013-01-08 20:42:26 +0000 | [diff] [blame] | 37 | #define CONFIG_EXYNOS_FB |
38 | #define CONFIG_EXYNOS_DP | ||||
Ajay Kumar | ca67ee2 | 2013-01-08 20:42:26 +0000 | [diff] [blame] | 39 | #define LCD_BPP LCD_COLOR16 |
Ajay Kumar | 11575ae | 2013-01-10 21:06:10 +0000 | [diff] [blame] | 40 | #endif |
Michael Pratt | f260792 | 2014-06-18 17:54:02 +0530 | [diff] [blame] | 41 | |
42 | /* DRAM Memory Banks */ | ||||
43 | #define CONFIG_NR_DRAM_BANKS 8 | ||||
44 | #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ | ||||
45 | |||||
Rajeshwari Birje | 194fa0a | 2013-12-26 09:44:26 +0530 | [diff] [blame] | 46 | #endif /* __CONFIG_5250_H */ |