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git01.mediatek.com / filogic / uboot / 3edc347d52391b9cf98655473bfca797b1f03311 / . / arch / arm / mach-tegra / tegra124 / funcmux.c
blob: e7ad85fde2d01f251eccf12b2d32558d070a7236 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]2/*
3 * (C) Copyright 2013
4 * NVIDIA Corporation <www.nvidia.com>
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]5 */
6
7/* Tegra124 high-level function multiplexing */
8
9#include <common.h>
Simon Glass0f2af882020-05-10 11:40:05 -0600[diff] [blame]10#include <log.h>
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]11#include <asm/arch/clock.h>
12#include <asm/arch/funcmux.h>
13#include <asm/arch/pinmux.h>
14
15int funcmux_select(enum periph_id id, int config)
16{
17 int bad_config = config != FUNCMUX_DEFAULT;
18
19 switch (id) {
20 case PERIPH_ID_UART4:
21 switch (config) {
22 case FUNCMUX_UART4_GPIO: /* TXD,RXD,CTS,RTS */
Stephen Warren6685f042014-03-21 12:29:01 -0600[diff] [blame]23 pinmux_set_func(PMUX_PINGRP_PJ7, PMUX_FUNC_UARTD);
24 pinmux_set_func(PMUX_PINGRP_PB0, PMUX_FUNC_UARTD);
25 pinmux_set_func(PMUX_PINGRP_PB1, PMUX_FUNC_UARTD);
26 pinmux_set_func(PMUX_PINGRP_PK7, PMUX_FUNC_UARTD);
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]27
Stephen Warren6685f042014-03-21 12:29:01 -0600[diff] [blame]28 pinmux_set_io(PMUX_PINGRP_PJ7, PMUX_PIN_OUTPUT);
29 pinmux_set_io(PMUX_PINGRP_PB0, PMUX_PIN_INPUT);
30 pinmux_set_io(PMUX_PINGRP_PB1, PMUX_PIN_INPUT);
31 pinmux_set_io(PMUX_PINGRP_PK7, PMUX_PIN_OUTPUT);
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]32
Stephen Warren6685f042014-03-21 12:29:01 -0600[diff] [blame]33 pinmux_tristate_disable(PMUX_PINGRP_PJ7);
34 pinmux_tristate_disable(PMUX_PINGRP_PB0);
35 pinmux_tristate_disable(PMUX_PINGRP_PB1);
36 pinmux_tristate_disable(PMUX_PINGRP_PK7);
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]37 break;
38 }
39 break;
40
41 case PERIPH_ID_UART1:
42 switch (config) {
43 case FUNCMUX_UART1_KBC:
Stephen Warren6685f042014-03-21 12:29:01 -0600[diff] [blame]44 pinmux_set_func(PMUX_PINGRP_KB_ROW9_PS1,
45 PMUX_FUNC_UARTA);
46 pinmux_set_func(PMUX_PINGRP_KB_ROW10_PS2,
47 PMUX_FUNC_UARTA);
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]48
Stephen Warren6685f042014-03-21 12:29:01 -0600[diff] [blame]49 pinmux_set_io(PMUX_PINGRP_KB_ROW9_PS1, PMUX_PIN_OUTPUT);
50 pinmux_set_io(PMUX_PINGRP_KB_ROW10_PS2, PMUX_PIN_INPUT);
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]51
Stephen Warren6685f042014-03-21 12:29:01 -0600[diff] [blame]52 pinmux_tristate_disable(PMUX_PINGRP_KB_ROW9_PS1);
53 pinmux_tristate_disable(PMUX_PINGRP_KB_ROW10_PS2);
Tom Warren8981bff2014-01-24 12:46:15 -0700[diff] [blame]54 break;
55 }
56 break;
57
58 /* Add other periph IDs here as needed */
59
60 default:
61 debug("%s: invalid periph_id %d", __func__, id);
62 return -1;
63 }
64
65 if (bad_config) {
66 debug("%s: invalid config %d for periph_id %d", __func__,
67 config, id);
68 return -1;
69 }
70 return 0;
71}