Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. |
| 4 | * |
| 5 | * Configuration settings for the Boundary Devices Nitrogen6X |
| 6 | * and Freescale i.MX6Q Sabre Lite boards. |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_H |
| 10 | #define __CONFIG_H |
| 11 | |
Eric Nelson | 062772c | 2013-11-26 17:40:30 -0700 | [diff] [blame] | 12 | #include "mx6_common.h" |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 13 | |
Troy Kisky | 760327c | 2013-09-25 18:41:18 -0700 | [diff] [blame] | 14 | #define CONFIG_USBD_HS |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 15 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 16 | #define CONFIG_MXC_UART_BASE UART2_BASE |
| 17 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 18 | /* MMC Configs */ |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 19 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 20 | #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| 21 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 22 | /* |
| 23 | * SATA Configs |
| 24 | */ |
| 25 | #ifdef CONFIG_CMD_SATA |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 26 | #define CONFIG_DWC_AHSATA_PORT_ID 0 |
| 27 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR |
| 28 | #define CONFIG_LBA48 |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 29 | #endif |
| 30 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 31 | #define IMX_FEC_BASE ENET_BASE_ADDR |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 32 | #define CONFIG_FEC_MXC_PHYADDR 6 |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 33 | |
| 34 | /* USB Configs */ |
Troy Kisky | ed72a9e | 2013-10-10 15:27:59 -0700 | [diff] [blame] | 35 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 36 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 37 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 38 | #define CONFIG_MXC_USB_FLAGS 0 |
| 39 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 40 | /* Framebuffer and LCD */ |
Eric Nelson | 89f2be5 | 2015-04-16 11:31:33 -0700 | [diff] [blame] | 41 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) |
Pardeep Kumar Singla | c1fa130 | 2013-07-25 12:12:13 -0500 | [diff] [blame] | 42 | #define CONFIG_IMX_HDMI |
Eric Benard | 7f63c14 | 2014-04-04 19:05:53 +0200 | [diff] [blame] | 43 | #define CONFIG_IMX_VIDEO_SKIP |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 44 | |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 45 | #ifdef CONFIG_CMD_MMC |
| 46 | #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 47 | #else |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 48 | #define DISTRO_BOOT_DEV_MMC(func) |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 49 | #endif |
| 50 | |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 51 | #ifdef CONFIG_CMD_SATA |
| 52 | #define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0) |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 53 | #else |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 54 | #define DISTRO_BOOT_DEV_SATA(func) |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 55 | #endif |
| 56 | |
Diego Rondini | 4e7394d | 2014-10-02 12:16:41 -0700 | [diff] [blame] | 57 | #ifdef CONFIG_USB_STORAGE |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 58 | #define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0) |
Diego Rondini | 4e7394d | 2014-10-02 12:16:41 -0700 | [diff] [blame] | 59 | #else |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 60 | #define DISTRO_BOOT_DEV_USB(func) |
Diego Rondini | 4e7394d | 2014-10-02 12:16:41 -0700 | [diff] [blame] | 61 | #endif |
| 62 | |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 63 | #ifdef CONFIG_CMD_PXE |
| 64 | #define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na) |
| 65 | #else |
| 66 | #define DISTRO_BOOT_DEV_PXE(func) |
| 67 | #endif |
| 68 | |
| 69 | #ifdef CONFIG_CMD_DHCP |
| 70 | #define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na) |
| 71 | #else |
| 72 | #define DISTRO_BOOT_DEV_DHCP(func) |
| 73 | #endif |
| 74 | |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 75 | #define BOOT_TARGET_DEVICES(func) \ |
| 76 | DISTRO_BOOT_DEV_MMC(func) \ |
| 77 | DISTRO_BOOT_DEV_SATA(func) \ |
| 78 | DISTRO_BOOT_DEV_USB(func) \ |
| 79 | DISTRO_BOOT_DEV_PXE(func) \ |
| 80 | DISTRO_BOOT_DEV_DHCP(func) |
| 81 | |
| 82 | #include <config_distro_bootcmd.h> |
Simon Glass | fb64e36 | 2020-05-10 11:40:09 -0600 | [diff] [blame] | 83 | #include <linux/stringify.h> |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 84 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 85 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Fabio Estevam | 1fd6092 | 2013-07-26 11:37:17 -0300 | [diff] [blame] | 86 | "console=ttymxc1\0" \ |
| 87 | "fdt_high=0xffffffff\0" \ |
| 88 | "initrd_high=0xffffffff\0" \ |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 89 | "fdt_addr_r=0x18000000\0" \ |
Tom Rini | 431e9ca | 2021-08-24 20:41:03 -0400 | [diff] [blame] | 90 | "fdtfile=" __stringify(CONFIG_DEFAULT_DEVICE_TREE) ".dtb\0" \ |
Tom Rini | 9004ee0 | 2021-08-23 10:25:30 -0400 | [diff] [blame] | 91 | "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
| 92 | "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
| 93 | "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 94 | "ramdisk_addr_r=0x13000000\0" \ |
| 95 | "ramdiskaddr=0x13000000\0" \ |
Fabio Estevam | 1fd6092 | 2013-07-26 11:37:17 -0300 | [diff] [blame] | 96 | "ip_dyn=yes\0" \ |
Gary Bisson | d3919c0 | 2017-01-12 12:18:44 +0100 | [diff] [blame] | 97 | "usb_pgood_delay=2000\0" \ |
Guillaume GARDET | 2ab7898 | 2018-04-18 17:04:58 +0200 | [diff] [blame] | 98 | BOOTENV |
Fabio Estevam | 1fd6092 | 2013-07-26 11:37:17 -0300 | [diff] [blame] | 99 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 100 | /* Miscellaneous configurable options */ |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 101 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 102 | /* Physical Memory Map */ |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 103 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 104 | |
| 105 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 106 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 107 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 108 | |
| 109 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 110 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 111 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 112 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 113 | |
Peter Robinson | 4b67150 | 2015-05-22 17:30:45 +0100 | [diff] [blame] | 114 | /* Environment organization */ |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 115 | |
Marek Vasut | 5230385 | 2013-12-14 05:55:29 +0100 | [diff] [blame] | 116 | /* |
| 117 | * PCI express |
| 118 | */ |
Marek Vasut | 5230385 | 2013-12-14 05:55:29 +0100 | [diff] [blame] | 119 | #ifdef CONFIG_CMD_PCI |
Marek Vasut | 5230385 | 2013-12-14 05:55:29 +0100 | [diff] [blame] | 120 | #define CONFIG_PCI_SCAN_SHOW |
| 121 | #define CONFIG_PCIE_IMX |
| 122 | #endif |
| 123 | |
Eric Nelson | e5b3a50 | 2013-03-11 08:44:53 +0000 | [diff] [blame] | 124 | #endif /* __CONFIG_H */ |