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wdenkbb1b8262003-03-27 12:09:35 +00001/*
wdenk8d5d28a2005-04-02 22:37:54 +00002 * (C) Copyright 2003-2005
wdenkbb1b8262003-03-27 12:09:35 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * This file contains the configuration parameters for the INCA-IP board.
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
32#define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
33
Shinya Kuribayashi9b844372011-02-05 18:33:36 +090034/*
35 * Clock for the MIPS core (MHz)
36 * allowed values: 100000000, 133000000, and 150000000 (default)
37 */
38#ifndef CONFIG_CPU_CLOCK_RATE
39#define CONFIG_CPU_CLOCK_RATE 150000000
wdenk5d841732003-08-17 18:55:18 +000040#endif
wdenkbb1b8262003-03-27 12:09:35 +000041
wdenk67f13362003-12-27 19:24:54 +000042#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
wdenkbb1b8262003-03-27 12:09:35 +000043
wdenkb02744a2003-04-05 00:53:31 +000044#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
wdenkbb1b8262003-03-27 12:09:35 +000045
wdenkb02744a2003-04-05 00:53:31 +000046#define CONFIG_BAUDRATE 115200
wdenkbb1b8262003-03-27 12:09:35 +000047
48/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020049#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
wdenkbb1b8262003-03-27 12:09:35 +000050
wdenkb02744a2003-04-05 00:53:31 +000051#define CONFIG_TIMESTAMP /* Print image info with timestamp */
52
53#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk1baed662008-03-03 12:16:44 +010054 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenkb02744a2003-04-05 00:53:31 +000055 "echo"
56
57#undef CONFIG_BOOTARGS
58
59#define CONFIG_EXTRA_ENV_SETTINGS \
60 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010061 "nfsroot=${serverip}:${rootpath}\0" \
wdenkb02744a2003-04-05 00:53:31 +000062 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010063 "addip=setenv bootargs ${bootargs} " \
64 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
65 ":${hostname}:${netdev}:off\0" \
66 "addmisc=setenv bootargs ${bootargs} " \
67 "console=ttyS0,${baudrate} " \
68 "ethaddr=${ethaddr} " \
wdenkb02744a2003-04-05 00:53:31 +000069 "panic=1\0" \
70 "flash_nfs=run nfsargs addip addmisc;" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010071 "bootm ${kernel_addr}\0" \
wdenkb02744a2003-04-05 00:53:31 +000072 "flash_self=run ramargs addip addmisc;" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010073 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
74 "net_nfs=tftp 80500000 ${bootfile};" \
wdenkb02744a2003-04-05 00:53:31 +000075 "run nfsargs addip addmisc;bootm\0" \
76 "rootpath=/opt/eldk/mips_4KC\0" \
77 "bootfile=/tftpboot/INCA/uImage\0" \
78 "kernel_addr=B0040000\0" \
79 "ramdisk_addr=B0100000\0" \
80 "u-boot=/tftpboot/INCA/u-boot.bin\0" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010081 "load=tftp 80500000 ${u-boot}\0" \
wdenkb02744a2003-04-05 00:53:31 +000082 "update=protect off 1:0-2;era 1:0-2;" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010083 "cp.b 80500000 B0000000 ${filesize}\0" \
wdenkb02744a2003-04-05 00:53:31 +000084 ""
85#define CONFIG_BOOTCOMMAND "run flash_self"
86
Jon Loeliger860435b2007-07-04 22:32:32 -050087
88/*
Jon Loeliger140b69c2007-07-10 09:38:02 -050089 * BOOTP options
90 */
91#define CONFIG_BOOTP_BOOTFILESIZE
92#define CONFIG_BOOTP_BOOTPATH
93#define CONFIG_BOOTP_GATEWAY
94#define CONFIG_BOOTP_HOSTNAME
95
96
97/*
Jon Loeliger860435b2007-07-04 22:32:32 -050098 * Command line configuration.
99 */
100#include <config_cmd_default.h>
101
102#define CONFIG_CMD_ASKENV
103#define CONFIG_CMD_DHCP
104#define CONFIG_CMD_ELF
105#define CONFIG_CMD_JFFS2
106#define CONFIG_CMD_NFS
107#define CONFIG_CMD_PING
108#define CONFIG_CMD_SNTP
109
wdenkbb1b8262003-03-27 12:09:35 +0000110
111/*
112 * Miscellaneous configurable options
113 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200114#define CONFIG_SYS_LONGHELP /* undef to save memory */
115#define CONFIG_SYS_PROMPT "INCA-IP # " /* Monitor Command Prompt */
116#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
117#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
118#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
wdenkbb1b8262003-03-27 12:09:35 +0000119
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200120#define CONFIG_SYS_MALLOC_LEN 128*1024
wdenkb02744a2003-04-05 00:53:31 +0000121
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200122#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
wdenkb02744a2003-04-05 00:53:31 +0000123
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200124#define CONFIG_SYS_MIPS_TIMER_FREQ (incaip_get_cpuclk() / 2)
Shinya Kuribayashi5d374e02008-06-05 22:29:00 +0900125
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200126#define CONFIG_SYS_HZ 1000
wdenkb02744a2003-04-05 00:53:31 +0000127
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200128#define CONFIG_SYS_SDRAM_BASE 0x80000000
wdenkb02744a2003-04-05 00:53:31 +0000129
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130#define CONFIG_SYS_LOAD_ADDR 0x80100000 /* default load address */
wdenkbb1b8262003-03-27 12:09:35 +0000131
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132#define CONFIG_SYS_MEMTEST_START 0x80100000
133#define CONFIG_SYS_MEMTEST_END 0x80800000
wdenkbb1b8262003-03-27 12:09:35 +0000134
135/*-----------------------------------------------------------------------
136 * FLASH and environment organization
137 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200138#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
139#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
wdenkbb1b8262003-03-27 12:09:35 +0000140
141#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */
142#define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */
143
144/* The following #defines are needed to get flash environment right */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200145#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146#define CONFIG_SYS_MONITOR_LEN (192 << 10)
wdenkbb1b8262003-03-27 12:09:35 +0000147
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200148#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
wdenkbb1b8262003-03-27 12:09:35 +0000149
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200150#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenkbb1b8262003-03-27 12:09:35 +0000151
152/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200153#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
154#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenkbb1b8262003-03-27 12:09:35 +0000155
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200156#define CONFIG_ENV_IS_IN_FLASH 1
wdenkbb1b8262003-03-27 12:09:35 +0000157
158/* Address and size of Primary Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200159#define CONFIG_ENV_ADDR 0xB0030000
160#define CONFIG_ENV_SIZE 0x10000
wdenkbb1b8262003-03-27 12:09:35 +0000161
162#define CONFIG_FLASH_16BIT
163
164#define CONFIG_NR_DRAM_BANKS 1
165
166#define CONFIG_INCA_IP_SWITCH
167#define CONFIG_NET_MULTI
wdenkdb82c8e2004-02-26 23:01:04 +0000168#define CONFIG_INCA_IP_SWITCH_AMDIX
wdenkbb1b8262003-03-27 12:09:35 +0000169
Wolfgang Denk47f57792005-08-08 01:03:24 +0200170/*
171 * JFFS2 partitions
172 */
173/* No command line, one static partition, use all space on the device */
Stefan Roeseb1423dd2009-03-19 13:30:36 +0100174#undef CONFIG_CMD_MTDPARTS
Wolfgang Denk47f57792005-08-08 01:03:24 +0200175#define CONFIG_JFFS2_DEV "nor1"
176#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
177#define CONFIG_JFFS2_PART_OFFSET 0x00000000
178
179/* mtdparts command line support */
180/*
Stefan Roeseb1423dd2009-03-19 13:30:36 +0100181#define CONFIG_CMD_MTDPARTS
Wolfgang Denk47f57792005-08-08 01:03:24 +0200182#define MTDIDS_DEFAULT "nor0=INCA-IP Bank 0"
183#define MTDPARTS_DEFAULT "mtdparts=INCA-IP Bank 0:192k(uboot)," \
184 "64k(env)," \
185 "768k(linux)," \
186 "1m@3m(rootfs)," \
187 "768k(linux2)," \
188 "3m@5m(rootfs2)"
189*/
wdenkdf28aa02003-12-12 00:02:26 +0000190
wdenkbb1b8262003-03-27 12:09:35 +0000191/*-----------------------------------------------------------------------
192 * Cache Configuration
193 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200194#define CONFIG_SYS_DCACHE_SIZE 4096
195#define CONFIG_SYS_ICACHE_SIZE 4096
196#define CONFIG_SYS_CACHELINE_SIZE 16
wdenkbb1b8262003-03-27 12:09:35 +0000197
198#endif /* __CONFIG_H */