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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Wenyou Yang11fd15d2015-11-02 10:57:09 +08002/*
3 * Copyright (C) 2015 Atmel Corporation
4 * Wenyou.Yang <wenyou.yang@atmel.com>
Wenyou Yang11fd15d2015-11-02 10:57:09 +08005 */
6
7#include <common.h>
Wenyou Yang83e88a42016-08-10 10:51:05 +08008#include <clk.h>
9#include <dm.h>
Wenyou Yang11fd15d2015-11-02 10:57:09 +080010#include <malloc.h>
11#include <sdhci.h>
12#include <asm/arch/clk.h>
13
14#define ATMEL_SDHC_MIN_FREQ 400000
Ludovic Desrochese5a07b82017-11-17 14:51:27 +080015#define ATMEL_SDHC_GCK_RATE 240000000
Wenyou Yang11fd15d2015-11-02 10:57:09 +080016
Wenyou Yang83e88a42016-08-10 10:51:05 +080017#ifndef CONFIG_DM_MMC
Wenyou Yang11fd15d2015-11-02 10:57:09 +080018int atmel_sdhci_init(void *regbase, u32 id)
19{
20 struct sdhci_host *host;
21 u32 max_clk, min_clk = ATMEL_SDHC_MIN_FREQ;
22
23 host = (struct sdhci_host *)calloc(1, sizeof(struct sdhci_host));
24 if (!host) {
25 printf("%s: sdhci_host calloc failed\n", __func__);
26 return -ENOMEM;
27 }
28
29 host->name = "atmel_sdhci";
30 host->ioaddr = regbase;
Wenyou Yang4fadd972017-05-11 08:25:12 +080031 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
Wenyou Yang11fd15d2015-11-02 10:57:09 +080032 max_clk = at91_get_periph_generated_clk(id);
33 if (!max_clk) {
34 printf("%s: Failed to get the proper clock\n", __func__);
35 free(host);
36 return -ENODEV;
37 }
Stefan Herbrechtsmeierbc47e0e2017-01-17 15:58:48 +010038 host->max_clk = max_clk;
Wenyou Yang11fd15d2015-11-02 10:57:09 +080039
Stefan Herbrechtsmeierbc47e0e2017-01-17 15:58:48 +010040 add_sdhci(host, 0, min_clk);
Wenyou Yang11fd15d2015-11-02 10:57:09 +080041
42 return 0;
43}
Wenyou Yang83e88a42016-08-10 10:51:05 +080044
45#else
46
47DECLARE_GLOBAL_DATA_PTR;
48
49struct atmel_sdhci_plat {
50 struct mmc_config cfg;
51 struct mmc mmc;
52};
53
Wenyou Yang83e88a42016-08-10 10:51:05 +080054static int atmel_sdhci_probe(struct udevice *dev)
55{
56 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
57 struct atmel_sdhci_plat *plat = dev_get_platdata(dev);
58 struct sdhci_host *host = dev_get_priv(dev);
59 u32 max_clk;
Wenyou Yang83e88a42016-08-10 10:51:05 +080060 struct clk clk;
61 int ret;
62
Wenyou Yang038dff82016-09-27 11:00:34 +080063 ret = clk_get_by_index(dev, 0, &clk);
Wenyou Yang83e88a42016-08-10 10:51:05 +080064 if (ret)
65 return ret;
66
67 ret = clk_enable(&clk);
68 if (ret)
69 return ret;
70
71 host->name = dev->name;
Masahiro Yamada1096ae12020-07-17 14:36:46 +090072 host->ioaddr = dev_read_addr_ptr(dev);
Wenyou Yang83e88a42016-08-10 10:51:05 +080073
Wenyou Yang4fadd972017-05-11 08:25:12 +080074 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
Simon Glassdd79d6e2017-01-17 16:52:55 -070075 host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
Wenyou Yang83e88a42016-08-10 10:51:05 +080076 "bus-width", 4);
77
Wenyou Yang038dff82016-09-27 11:00:34 +080078 ret = clk_get_by_index(dev, 1, &clk);
Wenyou Yang83e88a42016-08-10 10:51:05 +080079 if (ret)
80 return ret;
81
Ludovic Desrochese5a07b82017-11-17 14:51:27 +080082 ret = clk_set_rate(&clk, ATMEL_SDHC_GCK_RATE);
Wenyou Yang83e88a42016-08-10 10:51:05 +080083 if (ret)
84 return ret;
85
86 max_clk = clk_get_rate(&clk);
87 if (!max_clk)
88 return -EINVAL;
89
Stefan Herbrechtsmeierbc47e0e2017-01-17 15:58:48 +010090 host->max_clk = max_clk;
Peng Fan9a8f4992019-08-06 02:47:47 +000091 host->mmc = &plat->mmc;
92 host->mmc->dev = dev;
Stefan Herbrechtsmeierbc47e0e2017-01-17 15:58:48 +010093
94 ret = sdhci_setup_cfg(&plat->cfg, host, 0, ATMEL_SDHC_MIN_FREQ);
Wenyou Yang83e88a42016-08-10 10:51:05 +080095 if (ret)
96 return ret;
97
Wenyou Yang83e88a42016-08-10 10:51:05 +080098 host->mmc->priv = host;
99 upriv->mmc = host->mmc;
100
101 clk_free(&clk);
102
103 return sdhci_probe(dev);
104}
105
106static int atmel_sdhci_bind(struct udevice *dev)
107{
108 struct atmel_sdhci_plat *plat = dev_get_platdata(dev);
Wenyou Yang83e88a42016-08-10 10:51:05 +0800109
Masahiro Yamadacdb67f32016-09-06 22:17:32 +0900110 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
Wenyou Yang83e88a42016-08-10 10:51:05 +0800111}
112
113static const struct udevice_id atmel_sdhci_ids[] = {
114 { .compatible = "atmel,sama5d2-sdhci" },
Sandeep Sheriker Mallikarjuncba5eb62019-09-27 13:08:36 +0000115 { .compatible = "microchip,sam9x60-sdhci" },
Eugen Hristev3e742992020-08-27 12:04:41 +0300116 { .compatible = "microchip,sama7g5-sdhci" },
Wenyou Yang83e88a42016-08-10 10:51:05 +0800117 { }
118};
119
120U_BOOT_DRIVER(atmel_sdhci_drv) = {
121 .name = "atmel_sdhci",
122 .id = UCLASS_MMC,
123 .of_match = atmel_sdhci_ids,
124 .ops = &sdhci_ops,
125 .bind = atmel_sdhci_bind,
126 .probe = atmel_sdhci_probe,
127 .priv_auto_alloc_size = sizeof(struct sdhci_host),
128 .platdata_auto_alloc_size = sizeof(struct atmel_sdhci_plat),
129};
130#endif