Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Board functions for Siemens CORVUS (AT91SAM9G45) based board |
| 4 | * (C) Copyright 2013 Siemens AG |
| 5 | * |
| 6 | * Based on: |
| 7 | * U-Boot file: board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c |
| 8 | * (C) Copyright 2007-2008 |
| 9 | * Stelian Pop <stelian@popies.net> |
| 10 | * Lead Tech Design <www.leadtechdesign.com> |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 11 | */ |
| 12 | |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 13 | #include <common.h> |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 14 | #include <dm.h> |
Simon Glass | 8e16b1e | 2019-12-28 10:45:05 -0700 | [diff] [blame] | 15 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 16 | #include <log.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 17 | #include <asm/global_data.h> |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 18 | #include <asm/io.h> |
| 19 | #include <asm/arch/at91sam9g45_matrix.h> |
| 20 | #include <asm/arch/at91sam9_smc.h> |
| 21 | #include <asm/arch/at91_common.h> |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 22 | #include <asm/arch/at91_rstc.h> |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 23 | #include <asm/arch/atmel_serial.h> |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 24 | #include <asm/arch/gpio.h> |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 25 | #include <asm/gpio.h> |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 26 | #include <asm/arch/clk.h> |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 27 | #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) |
| 28 | #include <net.h> |
| 29 | #endif |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 30 | #ifndef CONFIG_DM_ETH |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 31 | #include <netdev.h> |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 32 | #endif |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 33 | #include <spi.h> |
| 34 | |
Heiko Schocher | 08c5df2 | 2015-08-21 11:28:20 +0200 | [diff] [blame] | 35 | #ifdef CONFIG_USB_GADGET_ATMEL_USBA |
| 36 | #include <asm/arch/atmel_usba_udc.h> |
| 37 | #endif |
| 38 | |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 39 | DECLARE_GLOBAL_DATA_PTR; |
| 40 | |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 41 | static void corvus_request_gpio(void) |
| 42 | { |
| 43 | gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena"); |
| 44 | gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy"); |
| 45 | gpio_request(AT91_PIN_PD7, "d0"); |
| 46 | gpio_request(AT91_PIN_PD8, "d1"); |
| 47 | gpio_request(AT91_PIN_PA12, "d2"); |
| 48 | gpio_request(AT91_PIN_PA13, "d3"); |
| 49 | gpio_request(AT91_PIN_PA15, "d4"); |
| 50 | gpio_request(AT91_PIN_PB7, "recovery button"); |
| 51 | gpio_request(AT91_PIN_PD1, "USB0"); |
| 52 | gpio_request(AT91_PIN_PD3, "USB1"); |
| 53 | gpio_request(AT91_PIN_PB18, "SPICS1"); |
| 54 | gpio_request(AT91_PIN_PB3, "SPICS0"); |
Tom Rini | 2719b95 | 2022-03-30 18:07:18 -0400 | [diff] [blame] | 55 | gpio_request(AT91_PIN_PD31, "red led"); /* this is the user1 led */ |
| 56 | gpio_request(AT91_PIN_PD0, "green led"); /* this is the user2 led */ |
| 57 | } |
| 58 | |
| 59 | void red_led_on(void) |
| 60 | { |
| 61 | gpio_set_value(AT91_PIN_PD31, 1); |
| 62 | } |
| 63 | |
| 64 | void red_led_off(void) |
| 65 | { |
| 66 | gpio_set_value(AT91_PIN_PD31, 0); |
| 67 | } |
| 68 | |
| 69 | void green_led_on(void) |
| 70 | { |
| 71 | gpio_set_value(AT91_PIN_PD0, 0); |
| 72 | } |
| 73 | |
| 74 | void green_led_off(void) |
| 75 | { |
| 76 | gpio_set_value(AT91_PIN_PD0, 1); |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 77 | } |
| 78 | |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 79 | static void corvus_nand_hw_init(void) |
| 80 | { |
| 81 | struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
| 82 | struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 83 | unsigned long csa; |
| 84 | |
| 85 | /* Enable CS3 */ |
| 86 | csa = readl(&matrix->ebicsa); |
| 87 | csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA; |
| 88 | writel(csa, &matrix->ebicsa); |
| 89 | |
| 90 | /* Configure SMC CS3 for NAND/SmartMedia */ |
Heiko Schocher | 22ab132 | 2014-11-18 11:53:53 +0100 | [diff] [blame] | 91 | writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | |
| 92 | AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 93 | &smc->cs[3].setup); |
Heiko Schocher | 22ab132 | 2014-11-18 11:53:53 +0100 | [diff] [blame] | 94 | writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) | |
| 95 | AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4), |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 96 | &smc->cs[3].pulse); |
Heiko Schocher | 22ab132 | 2014-11-18 11:53:53 +0100 | [diff] [blame] | 97 | writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 98 | &smc->cs[3].cycle); |
| 99 | writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
| 100 | AT91_SMC_MODE_EXNW_DISABLE | |
| 101 | #ifdef CONFIG_SYS_NAND_DBW_16 |
| 102 | AT91_SMC_MODE_DBW_16 | |
| 103 | #else /* CONFIG_SYS_NAND_DBW_8 */ |
| 104 | AT91_SMC_MODE_DBW_8 | |
| 105 | #endif |
| 106 | AT91_SMC_MODE_TDF_CYCLE(3), |
| 107 | &smc->cs[3].mode); |
| 108 | |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 109 | at91_periph_clk_enable(ATMEL_ID_PIOC); |
Heiko Schocher | 22ab132 | 2014-11-18 11:53:53 +0100 | [diff] [blame] | 110 | at91_periph_clk_enable(ATMEL_ID_PIOA); |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 111 | |
| 112 | /* Enable NandFlash */ |
| 113 | at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
Heiko Schocher | 22ab132 | 2014-11-18 11:53:53 +0100 | [diff] [blame] | 114 | at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 115 | } |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 116 | |
| 117 | #if defined(CONFIG_SPL_BUILD) |
| 118 | #include <spl.h> |
| 119 | #include <nand.h> |
| 120 | |
Heiko Schocher | 8189a08 | 2015-08-21 11:28:19 +0200 | [diff] [blame] | 121 | void spl_board_init(void) |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 122 | { |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 123 | corvus_request_gpio(); |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 124 | /* |
| 125 | * For on the sam9m10g45ek board, the chip wm9711 stay in the test |
| 126 | * mode, so it need do some action to exit mode. |
| 127 | */ |
| 128 | at91_set_gpio_output(AT91_PIN_PD7, 0); |
| 129 | at91_set_gpio_output(AT91_PIN_PD8, 0); |
| 130 | at91_set_pio_pullup(AT91_PIO_PORTD, 7, 1); |
| 131 | at91_set_pio_pullup(AT91_PIO_PORTD, 8, 1); |
| 132 | at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1); |
| 133 | at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1); |
| 134 | at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); |
| 135 | |
| 136 | corvus_nand_hw_init(); |
| 137 | |
| 138 | /* Configure recovery button PINs */ |
| 139 | at91_set_gpio_input(AT91_PIN_PB7, 1); |
| 140 | |
| 141 | /* check if button is pressed */ |
| 142 | if (at91_get_gpio_value(AT91_PIN_PB7) == 0) { |
| 143 | u32 boot_device; |
| 144 | |
| 145 | debug("Recovery button pressed\n"); |
| 146 | boot_device = spl_boot_device(); |
| 147 | switch (boot_device) { |
| 148 | #ifdef CONFIG_SPL_NAND_SUPPORT |
| 149 | case BOOT_DEVICE_NAND: |
| 150 | nand_init(); |
| 151 | spl_nand_erase_one(0, 0); |
| 152 | break; |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 153 | #endif |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 154 | } |
| 155 | } |
| 156 | } |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 157 | |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 158 | #include <asm/arch/atmel_mpddrc.h> |
Wenyou Yang | aa0a58d | 2016-02-01 18:12:15 +0800 | [diff] [blame] | 159 | static void ddr2_conf(struct atmel_mpddrc_config *ddr2) |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 160 | { |
| 161 | ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); |
| 162 | |
| 163 | ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | |
| 164 | ATMEL_MPDDRC_CR_NR_ROW_14 | |
| 165 | ATMEL_MPDDRC_CR_DIC_DS | |
| 166 | ATMEL_MPDDRC_CR_DQMS_SHARED | |
| 167 | ATMEL_MPDDRC_CR_CAS_DDR_CAS3); |
| 168 | ddr2->rtr = 0x24b; |
| 169 | |
| 170 | ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */ |
| 171 | 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |/* 2*7.5 = 15 ns */ |
| 172 | 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */ |
| 173 | 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | /* 8*7.5 = 75 ns */ |
| 174 | 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | /* 2*7.5 = 15 ns */ |
| 175 | 1 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | /* 1*7.5= 7.5 ns*/ |
| 176 | 1 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | /* 1 clk cycle */ |
| 177 | 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); /* 2 clk cycles */ |
| 178 | |
| 179 | ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ |
| 180 | 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET | |
| 181 | 16 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET | |
| 182 | 14 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET); |
| 183 | |
| 184 | ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | |
| 185 | 0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET | |
| 186 | 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET | |
| 187 | 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET); |
| 188 | } |
| 189 | |
| 190 | void mem_init(void) |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 191 | { |
Wenyou Yang | aa0a58d | 2016-02-01 18:12:15 +0800 | [diff] [blame] | 192 | struct atmel_mpddrc_config ddr2; |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 193 | |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 194 | ddr2_conf(&ddr2); |
| 195 | |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 196 | at91_system_clk_enable(AT91_PMC_DDR); |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 197 | |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 198 | /* DDRAM2 Controller initialize */ |
Erik van Luijk | 59d780a | 2015-08-13 15:43:18 +0200 | [diff] [blame] | 199 | ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 200 | } |
| 201 | #endif |
| 202 | |
| 203 | #ifdef CONFIG_CMD_USB |
| 204 | static void taurus_usb_hw_init(void) |
| 205 | { |
| 206 | at91_periph_clk_enable(ATMEL_ID_PIODE); |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 207 | |
| 208 | at91_set_gpio_output(AT91_PIN_PD1, 0); |
| 209 | at91_set_gpio_output(AT91_PIN_PD3, 0); |
| 210 | } |
| 211 | #endif |
| 212 | |
| 213 | #ifdef CONFIG_MACB |
| 214 | static void corvus_macb_hw_init(void) |
| 215 | { |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 216 | /* Enable clock */ |
Heiko Schocher | 25d74a3 | 2014-10-31 08:31:06 +0100 | [diff] [blame] | 217 | at91_periph_clk_enable(ATMEL_ID_EMAC); |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 218 | |
| 219 | /* |
| 220 | * Disable pull-up on: |
| 221 | * RXDV (PA15) => PHY normal mode (not Test mode) |
| 222 | * ERX0 (PA12) => PHY ADDR0 |
| 223 | * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0 |
| 224 | * |
| 225 | * PHY has internal pull-down |
| 226 | */ |
| 227 | at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0); |
| 228 | at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0); |
| 229 | at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0); |
| 230 | |
| 231 | at91_phy_reset(); |
| 232 | |
| 233 | /* Re-enable pull-up */ |
| 234 | at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); |
| 235 | at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1); |
| 236 | at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1); |
| 237 | |
| 238 | /* And the pins. */ |
| 239 | at91_macb_hw_init(); |
| 240 | } |
| 241 | #endif |
| 242 | |
| 243 | int board_early_init_f(void) |
| 244 | { |
| 245 | at91_seriald_hw_init(); |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 246 | corvus_request_gpio(); |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 247 | return 0; |
| 248 | } |
| 249 | |
Heiko Schocher | 08c5df2 | 2015-08-21 11:28:20 +0200 | [diff] [blame] | 250 | #ifdef CONFIG_USB_GADGET_ATMEL_USBA |
| 251 | /* from ./arch/arm/mach-at91/armv7/sama5d3_devices.c */ |
| 252 | void at91_udp_hw_init(void) |
| 253 | { |
Heiko Schocher | 08c5df2 | 2015-08-21 11:28:20 +0200 | [diff] [blame] | 254 | /* Enable UPLL clock */ |
Wenyou Yang | 0c25229 | 2016-02-02 11:11:54 +0800 | [diff] [blame] | 255 | at91_upll_clk_enable(); |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 256 | |
Heiko Schocher | 08c5df2 | 2015-08-21 11:28:20 +0200 | [diff] [blame] | 257 | /* Enable UDPHS clock */ |
| 258 | at91_periph_clk_enable(ATMEL_ID_UDPHS); |
| 259 | } |
| 260 | #endif |
| 261 | |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 262 | int board_init(void) |
| 263 | { |
| 264 | /* address of boot parameters */ |
| 265 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
| 266 | |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 267 | /* we have to request the gpios again after relocation */ |
| 268 | corvus_request_gpio(); |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 269 | #ifdef CONFIG_CMD_NAND |
| 270 | corvus_nand_hw_init(); |
| 271 | #endif |
| 272 | #ifdef CONFIG_ATMEL_SPI |
| 273 | at91_spi0_hw_init(1 << 4); |
| 274 | #endif |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 275 | #ifdef CONFIG_MACB |
| 276 | corvus_macb_hw_init(); |
| 277 | #endif |
| 278 | #ifdef CONFIG_CMD_USB |
| 279 | taurus_usb_hw_init(); |
| 280 | #endif |
Heiko Schocher | 08c5df2 | 2015-08-21 11:28:20 +0200 | [diff] [blame] | 281 | #ifdef CONFIG_USB_GADGET_ATMEL_USBA |
| 282 | at91_udp_hw_init(); |
| 283 | usba_udc_probe(&pdata); |
| 284 | #endif |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 285 | return 0; |
| 286 | } |
| 287 | |
| 288 | int dram_init(void) |
| 289 | { |
| 290 | gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, |
| 291 | CONFIG_SYS_SDRAM_SIZE); |
| 292 | return 0; |
| 293 | } |
| 294 | |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 295 | #ifndef CONFIG_DM_ETH |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 296 | int board_eth_init(struct bd_info *bis) |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 297 | { |
| 298 | int rc = 0; |
| 299 | #ifdef CONFIG_MACB |
| 300 | rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00); |
| 301 | #endif |
| 302 | return rc; |
| 303 | } |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 304 | #endif |
Heiko Schocher | 3757e97 | 2013-12-02 07:47:23 +0100 | [diff] [blame] | 305 | |
| 306 | /* SPI chip select control */ |
| 307 | int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
| 308 | { |
| 309 | return bus == 0 && cs < 2; |
| 310 | } |
| 311 | |
| 312 | void spi_cs_activate(struct spi_slave *slave) |
| 313 | { |
| 314 | switch (slave->cs) { |
| 315 | case 1: |
| 316 | at91_set_gpio_output(AT91_PIN_PB18, 0); |
| 317 | break; |
| 318 | case 0: |
| 319 | default: |
| 320 | at91_set_gpio_output(AT91_PIN_PB3, 0); |
| 321 | break; |
| 322 | } |
| 323 | } |
| 324 | |
| 325 | void spi_cs_deactivate(struct spi_slave *slave) |
| 326 | { |
| 327 | switch (slave->cs) { |
| 328 | case 1: |
| 329 | at91_set_gpio_output(AT91_PIN_PB18, 1); |
| 330 | break; |
| 331 | case 0: |
| 332 | default: |
| 333 | at91_set_gpio_output(AT91_PIN_PB3, 1); |
| 334 | break; |
| 335 | } |
| 336 | } |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 337 | |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 338 | static struct atmel_serial_plat at91sam9260_serial_plat = { |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 339 | .base_addr = ATMEL_BASE_DBGU, |
| 340 | }; |
| 341 | |
Simon Glass | 1d8364a | 2020-12-28 20:34:54 -0700 | [diff] [blame] | 342 | U_BOOT_DRVINFO(at91sam9260_serial) = { |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 343 | .name = "serial_atmel", |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 344 | .plat = &at91sam9260_serial_plat, |
Heiko Schocher | 914aff1 | 2016-05-25 07:23:45 +0200 | [diff] [blame] | 345 | }; |