blob: a9087df32b9b405a6502137932ac32145e2687a8 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassad8f8ab2015-06-23 15:38:42 -06002/*
3 * Copyright (c) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Simon Glassad8f8ab2015-06-23 15:38:42 -06005 */
6
7#include <common.h>
8#include <dm.h>
9#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Masahiro Yamada75f82d02018-03-05 01:20:11 +090011#include <linux/libfdt.h>
Simon Glassad8f8ab2015-06-23 15:38:42 -060012#include <malloc.h>
13#include <mapmem.h>
14#include <regmap.h>
Paul Burton39776032016-09-08 07:47:35 +010015#include <asm/io.h>
Simon Glasseeeb5192017-05-18 20:09:10 -060016#include <dm/of_addr.h>
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +053017#include <dm/devres.h>
Simon Glasseeeb5192017-05-18 20:09:10 -060018#include <linux/ioport.h>
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +053019#include <linux/compat.h>
20#include <linux/err.h>
Paul Burton39776032016-09-08 07:47:35 +010021
Simon Glassad8f8ab2015-06-23 15:38:42 -060022DECLARE_GLOBAL_DATA_PTR;
23
Mario Six0aa52992018-10-04 09:00:42 +020024/**
25 * regmap_alloc() - Allocate a regmap with a given number of ranges.
26 *
27 * @count: Number of ranges to be allocated for the regmap.
Pratyush Yadav1c9867c2020-09-24 10:04:12 +053028 *
29 * The default regmap width is set to REGMAP_SIZE_32. Callers can override it
30 * if they need.
31 *
Mario Six0aa52992018-10-04 09:00:42 +020032 * Return: A pointer to the newly allocated regmap, or NULL on error.
33 */
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +090034static struct regmap *regmap_alloc(int count)
Simon Glass30d73e82016-07-04 11:58:21 -060035{
36 struct regmap *map;
Pratyush Yadav279cad82020-09-24 10:04:11 +053037 size_t size = sizeof(*map) + sizeof(map->ranges[0]) * count;
Simon Glass30d73e82016-07-04 11:58:21 -060038
Pratyush Yadav279cad82020-09-24 10:04:11 +053039 map = calloc(1, size);
Simon Glass30d73e82016-07-04 11:58:21 -060040 if (!map)
41 return NULL;
Simon Glass30d73e82016-07-04 11:58:21 -060042 map->range_count = count;
Pratyush Yadav1c9867c2020-09-24 10:04:12 +053043 map->width = REGMAP_SIZE_32;
Simon Glass30d73e82016-07-04 11:58:21 -060044
45 return map;
46}
47
Simon Glassb9443452016-07-04 11:57:59 -060048#if CONFIG_IS_ENABLED(OF_PLATDATA)
Simon Glass1b1fe412017-08-29 14:15:50 -060049int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
Simon Glassb9443452016-07-04 11:57:59 -060050 struct regmap **mapp)
51{
Simon Glassb6114332016-07-04 11:58:22 -060052 struct regmap_range *range;
53 struct regmap *map;
54
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +090055 map = regmap_alloc(count);
Simon Glassb6114332016-07-04 11:58:22 -060056 if (!map)
57 return -ENOMEM;
58
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +090059 for (range = map->ranges; count > 0; reg += 2, range++, count--) {
Simon Glassb6114332016-07-04 11:58:22 -060060 range->start = *reg;
61 range->size = reg[1];
62 }
63
64 *mapp = map;
65
Simon Glassb9443452016-07-04 11:57:59 -060066 return 0;
67}
68#else
Mario Six5159c0c2018-10-15 09:24:07 +020069/**
70 * init_range() - Initialize a single range of a regmap
71 * @node: Device node that will use the map in question
72 * @range: Pointer to a regmap_range structure that will be initialized
73 * @addr_len: The length of the addr parts of the reg property
74 * @size_len: The length of the size parts of the reg property
75 * @index: The index of the range to initialize
76 *
77 * This function will read the necessary 'reg' information from the device tree
78 * (the 'addr' part, and the 'length' part), and initialize the range in
79 * quesion.
80 *
81 * Return: 0 if OK, -ve on error
82 */
83static int init_range(ofnode node, struct regmap_range *range, int addr_len,
84 int size_len, int index)
85{
86 fdt_size_t sz;
87 struct resource r;
88
89 if (of_live_active()) {
90 int ret;
91
92 ret = of_address_to_resource(ofnode_to_np(node),
93 index, &r);
94 if (ret) {
95 debug("%s: Could not read resource of range %d (ret = %d)\n",
96 ofnode_get_name(node), index, ret);
97 return ret;
98 }
99
100 range->start = r.start;
101 range->size = r.end - r.start + 1;
102 } else {
103 int offset = ofnode_to_offset(node);
104
105 range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob, offset,
106 "reg", index,
107 addr_len, size_len,
108 &sz, true);
109 if (range->start == FDT_ADDR_T_NONE) {
110 debug("%s: Could not read start of range %d\n",
111 ofnode_get_name(node), index);
112 return -EINVAL;
113 }
114
115 range->size = sz;
116 }
117
118 return 0;
119}
120
Faiz Abbas52742f42019-06-11 00:43:33 +0530121int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index)
122{
123 struct regmap *map;
124 int addr_len, size_len;
125 int ret;
126
127 addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
128 if (addr_len < 0) {
129 debug("%s: Error while reading the addr length (ret = %d)\n",
130 ofnode_get_name(node), addr_len);
131 return addr_len;
132 }
133
134 size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
135 if (size_len < 0) {
136 debug("%s: Error while reading the size length: (ret = %d)\n",
137 ofnode_get_name(node), size_len);
138 return size_len;
139 }
140
141 map = regmap_alloc(1);
142 if (!map)
143 return -ENOMEM;
144
145 ret = init_range(node, map->ranges, addr_len, size_len, index);
146 if (ret)
Faiz Abbas4bba4132019-11-11 15:29:05 +0530147 goto err;
Faiz Abbas52742f42019-06-11 00:43:33 +0530148
149 if (ofnode_read_bool(node, "little-endian"))
150 map->endianness = REGMAP_LITTLE_ENDIAN;
151 else if (ofnode_read_bool(node, "big-endian"))
152 map->endianness = REGMAP_BIG_ENDIAN;
153 else if (ofnode_read_bool(node, "native-endian"))
154 map->endianness = REGMAP_NATIVE_ENDIAN;
155 else /* Default: native endianness */
156 map->endianness = REGMAP_NATIVE_ENDIAN;
157
158 *mapp = map;
159
Faiz Abbas4bba4132019-11-11 15:29:05 +0530160 return 0;
161err:
162 regmap_uninit(map);
163
Faiz Abbas52742f42019-06-11 00:43:33 +0530164 return ret;
165}
166
Pratyush Yadav7eb24762020-09-24 10:04:14 +0530167int regmap_init_mem_range(ofnode node, ulong r_start, ulong r_size,
168 struct regmap **mapp)
169{
170 struct regmap *map;
171 struct regmap_range *range;
172
173 map = regmap_alloc(1);
174 if (!map)
175 return -ENOMEM;
176
177 range = &map->ranges[0];
178 range->start = r_start;
179 range->size = r_size;
180
181 if (ofnode_read_bool(node, "little-endian"))
182 map->endianness = REGMAP_LITTLE_ENDIAN;
183 else if (ofnode_read_bool(node, "big-endian"))
184 map->endianness = REGMAP_BIG_ENDIAN;
185 else if (ofnode_read_bool(node, "native-endian"))
186 map->endianness = REGMAP_NATIVE_ENDIAN;
187 else /* Default: native endianness */
188 map->endianness = REGMAP_NATIVE_ENDIAN;
189
190 *mapp = map;
191 return 0;
192}
193
Masahiro Yamadae4873e32018-04-19 12:14:03 +0900194int regmap_init_mem(ofnode node, struct regmap **mapp)
Simon Glassad8f8ab2015-06-23 15:38:42 -0600195{
Simon Glassad8f8ab2015-06-23 15:38:42 -0600196 struct regmap_range *range;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600197 struct regmap *map;
198 int count;
199 int addr_len, size_len, both_len;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600200 int len;
Jean-Jacques Hiblot024611b2017-02-13 16:17:48 +0100201 int index;
Faiz Abbas4bba4132019-11-11 15:29:05 +0530202 int ret;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600203
Masahiro Yamadae4873e32018-04-19 12:14:03 +0900204 addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
Mario Six12321162018-10-04 09:00:43 +0200205 if (addr_len < 0) {
206 debug("%s: Error while reading the addr length (ret = %d)\n",
207 ofnode_get_name(node), addr_len);
208 return addr_len;
209 }
210
Masahiro Yamadae4873e32018-04-19 12:14:03 +0900211 size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
Mario Six12321162018-10-04 09:00:43 +0200212 if (size_len < 0) {
213 debug("%s: Error while reading the size length: (ret = %d)\n",
214 ofnode_get_name(node), size_len);
215 return size_len;
216 }
217
Simon Glassad8f8ab2015-06-23 15:38:42 -0600218 both_len = addr_len + size_len;
Mario Six12321162018-10-04 09:00:43 +0200219 if (!both_len) {
220 debug("%s: Both addr and size length are zero\n",
221 ofnode_get_name(node));
222 return -EINVAL;
223 }
Simon Glassad8f8ab2015-06-23 15:38:42 -0600224
Masahiro Yamadae4873e32018-04-19 12:14:03 +0900225 len = ofnode_read_size(node, "reg");
Mario Six6e96ba22018-10-15 09:24:08 +0200226 if (len < 0) {
227 debug("%s: Error while reading reg size (ret = %d)\n",
228 ofnode_get_name(node), len);
Simon Glasseeeb5192017-05-18 20:09:10 -0600229 return len;
Mario Six6e96ba22018-10-15 09:24:08 +0200230 }
Simon Glasseeeb5192017-05-18 20:09:10 -0600231 len /= sizeof(fdt32_t);
Simon Glassad8f8ab2015-06-23 15:38:42 -0600232 count = len / both_len;
Mario Six6e96ba22018-10-15 09:24:08 +0200233 if (!count) {
234 debug("%s: Not enough data in reg property\n",
235 ofnode_get_name(node));
Simon Glassad8f8ab2015-06-23 15:38:42 -0600236 return -EINVAL;
Mario Six6e96ba22018-10-15 09:24:08 +0200237 }
Simon Glassad8f8ab2015-06-23 15:38:42 -0600238
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +0900239 map = regmap_alloc(count);
Simon Glassad8f8ab2015-06-23 15:38:42 -0600240 if (!map)
241 return -ENOMEM;
242
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +0900243 for (range = map->ranges, index = 0; count > 0;
Simon Glasseeeb5192017-05-18 20:09:10 -0600244 count--, range++, index++) {
Faiz Abbas4bba4132019-11-11 15:29:05 +0530245 ret = init_range(node, range, addr_len, size_len, index);
Mario Six5159c0c2018-10-15 09:24:07 +0200246 if (ret)
Faiz Abbas4bba4132019-11-11 15:29:05 +0530247 goto err;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600248 }
249
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200250 if (ofnode_read_bool(node, "little-endian"))
251 map->endianness = REGMAP_LITTLE_ENDIAN;
252 else if (ofnode_read_bool(node, "big-endian"))
253 map->endianness = REGMAP_BIG_ENDIAN;
254 else if (ofnode_read_bool(node, "native-endian"))
255 map->endianness = REGMAP_NATIVE_ENDIAN;
256 else /* Default: native endianness */
257 map->endianness = REGMAP_NATIVE_ENDIAN;
258
Simon Glassad8f8ab2015-06-23 15:38:42 -0600259 *mapp = map;
260
261 return 0;
Faiz Abbas4bba4132019-11-11 15:29:05 +0530262err:
263 regmap_uninit(map);
264
265 return ret;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600266}
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +0530267
268static void devm_regmap_release(struct udevice *dev, void *res)
269{
270 regmap_uninit(*(struct regmap **)res);
271}
272
273struct regmap *devm_regmap_init(struct udevice *dev,
274 const struct regmap_bus *bus,
275 void *bus_context,
276 const struct regmap_config *config)
277{
278 int rc;
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530279 struct regmap **mapp, *map;
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +0530280
281 mapp = devres_alloc(devm_regmap_release, sizeof(struct regmap *),
282 __GFP_ZERO);
283 if (unlikely(!mapp))
284 return ERR_PTR(-ENOMEM);
285
286 rc = regmap_init_mem(dev_ofnode(dev), mapp);
287 if (rc)
288 return ERR_PTR(rc);
289
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530290 map = *mapp;
Pratyush Yadav3b94e5d2020-09-24 10:04:13 +0530291 if (config) {
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530292 map->width = config->width;
Pratyush Yadav3b94e5d2020-09-24 10:04:13 +0530293 map->reg_offset_shift = config->reg_offset_shift;
294 }
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530295
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +0530296 devres_add(dev, mapp);
297 return *mapp;
298}
Simon Glassb9443452016-07-04 11:57:59 -0600299#endif
Simon Glassad8f8ab2015-06-23 15:38:42 -0600300
301void *regmap_get_range(struct regmap *map, unsigned int range_num)
302{
303 struct regmap_range *range;
304
305 if (range_num >= map->range_count)
306 return NULL;
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +0900307 range = &map->ranges[range_num];
Simon Glassad8f8ab2015-06-23 15:38:42 -0600308
309 return map_sysmem(range->start, range->size);
310}
311
312int regmap_uninit(struct regmap *map)
313{
Simon Glassad8f8ab2015-06-23 15:38:42 -0600314 free(map);
315
316 return 0;
317}
Paul Burton39776032016-09-08 07:47:35 +0100318
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200319static inline u8 __read_8(u8 *addr, enum regmap_endianness_t endianness)
320{
321 return readb(addr);
322}
323
324static inline u16 __read_16(u16 *addr, enum regmap_endianness_t endianness)
325{
326 switch (endianness) {
327 case REGMAP_LITTLE_ENDIAN:
328 return in_le16(addr);
329 case REGMAP_BIG_ENDIAN:
330 return in_be16(addr);
331 case REGMAP_NATIVE_ENDIAN:
332 return readw(addr);
333 }
334
335 return readw(addr);
336}
337
338static inline u32 __read_32(u32 *addr, enum regmap_endianness_t endianness)
339{
340 switch (endianness) {
341 case REGMAP_LITTLE_ENDIAN:
342 return in_le32(addr);
343 case REGMAP_BIG_ENDIAN:
344 return in_be32(addr);
345 case REGMAP_NATIVE_ENDIAN:
346 return readl(addr);
347 }
348
349 return readl(addr);
350}
351
352#if defined(in_le64) && defined(in_be64) && defined(readq)
353static inline u64 __read_64(u64 *addr, enum regmap_endianness_t endianness)
354{
355 switch (endianness) {
356 case REGMAP_LITTLE_ENDIAN:
357 return in_le64(addr);
358 case REGMAP_BIG_ENDIAN:
359 return in_be64(addr);
360 case REGMAP_NATIVE_ENDIAN:
361 return readq(addr);
362 }
363
364 return readq(addr);
365}
366#endif
367
Mario Six2f009972018-10-15 09:24:11 +0200368int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
369 void *valp, size_t val_len)
Paul Burton39776032016-09-08 07:47:35 +0100370{
Mario Six2f009972018-10-15 09:24:11 +0200371 struct regmap_range *range;
Mario Sixa4fd59e2018-10-15 09:24:10 +0200372 void *ptr;
Paul Burton39776032016-09-08 07:47:35 +0100373
Mario Six2f009972018-10-15 09:24:11 +0200374 if (range_num >= map->range_count) {
375 debug("%s: range index %d larger than range count\n",
376 __func__, range_num);
377 return -ERANGE;
378 }
379 range = &map->ranges[range_num];
380
Pratyush Yadav3b94e5d2020-09-24 10:04:13 +0530381 offset <<= map->reg_offset_shift;
Mario Six2f009972018-10-15 09:24:11 +0200382 if (offset + val_len > range->size) {
383 debug("%s: offset/size combination invalid\n", __func__);
384 return -ERANGE;
385 }
Paul Burton39776032016-09-08 07:47:35 +0100386
Pratyush Yadav5c42d5d2020-05-26 17:35:57 +0530387 ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
388
Mario Sixa4fd59e2018-10-15 09:24:10 +0200389 switch (val_len) {
390 case REGMAP_SIZE_8:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200391 *((u8 *)valp) = __read_8(ptr, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200392 break;
393 case REGMAP_SIZE_16:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200394 *((u16 *)valp) = __read_16(ptr, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200395 break;
396 case REGMAP_SIZE_32:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200397 *((u32 *)valp) = __read_32(ptr, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200398 break;
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200399#if defined(in_le64) && defined(in_be64) && defined(readq)
Mario Sixa4fd59e2018-10-15 09:24:10 +0200400 case REGMAP_SIZE_64:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200401 *((u64 *)valp) = __read_64(ptr, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200402 break;
403#endif
404 default:
405 debug("%s: regmap size %zu unknown\n", __func__, val_len);
406 return -EINVAL;
407 }
Mario Six2f009972018-10-15 09:24:11 +0200408
Paul Burton39776032016-09-08 07:47:35 +0100409 return 0;
410}
411
Mario Six2f009972018-10-15 09:24:11 +0200412int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t val_len)
413{
414 return regmap_raw_read_range(map, 0, offset, valp, val_len);
415}
416
Mario Sixa4fd59e2018-10-15 09:24:10 +0200417int regmap_read(struct regmap *map, uint offset, uint *valp)
Paul Burton39776032016-09-08 07:47:35 +0100418{
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530419 return regmap_raw_read(map, offset, valp, map->width);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200420}
421
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200422static inline void __write_8(u8 *addr, const u8 *val,
423 enum regmap_endianness_t endianness)
424{
425 writeb(*val, addr);
426}
427
428static inline void __write_16(u16 *addr, const u16 *val,
429 enum regmap_endianness_t endianness)
430{
431 switch (endianness) {
432 case REGMAP_NATIVE_ENDIAN:
433 writew(*val, addr);
434 break;
435 case REGMAP_LITTLE_ENDIAN:
436 out_le16(addr, *val);
437 break;
438 case REGMAP_BIG_ENDIAN:
439 out_be16(addr, *val);
440 break;
441 }
442}
443
444static inline void __write_32(u32 *addr, const u32 *val,
445 enum regmap_endianness_t endianness)
446{
447 switch (endianness) {
448 case REGMAP_NATIVE_ENDIAN:
449 writel(*val, addr);
450 break;
451 case REGMAP_LITTLE_ENDIAN:
452 out_le32(addr, *val);
453 break;
454 case REGMAP_BIG_ENDIAN:
455 out_be32(addr, *val);
456 break;
457 }
458}
459
460#if defined(out_le64) && defined(out_be64) && defined(writeq)
461static inline void __write_64(u64 *addr, const u64 *val,
462 enum regmap_endianness_t endianness)
463{
464 switch (endianness) {
465 case REGMAP_NATIVE_ENDIAN:
466 writeq(*val, addr);
467 break;
468 case REGMAP_LITTLE_ENDIAN:
469 out_le64(addr, *val);
470 break;
471 case REGMAP_BIG_ENDIAN:
472 out_be64(addr, *val);
473 break;
474 }
475}
476#endif
477
Mario Six2f009972018-10-15 09:24:11 +0200478int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset,
479 const void *val, size_t val_len)
Mario Sixa4fd59e2018-10-15 09:24:10 +0200480{
Mario Six2f009972018-10-15 09:24:11 +0200481 struct regmap_range *range;
Mario Sixa4fd59e2018-10-15 09:24:10 +0200482 void *ptr;
Paul Burton39776032016-09-08 07:47:35 +0100483
Mario Six2f009972018-10-15 09:24:11 +0200484 if (range_num >= map->range_count) {
485 debug("%s: range index %d larger than range count\n",
486 __func__, range_num);
487 return -ERANGE;
488 }
489 range = &map->ranges[range_num];
490
Pratyush Yadav3b94e5d2020-09-24 10:04:13 +0530491 offset <<= map->reg_offset_shift;
Mario Six2f009972018-10-15 09:24:11 +0200492 if (offset + val_len > range->size) {
493 debug("%s: offset/size combination invalid\n", __func__);
494 return -ERANGE;
495 }
Mario Sixa4fd59e2018-10-15 09:24:10 +0200496
Pratyush Yadav5c42d5d2020-05-26 17:35:57 +0530497 ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
498
Mario Sixa4fd59e2018-10-15 09:24:10 +0200499 switch (val_len) {
500 case REGMAP_SIZE_8:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200501 __write_8(ptr, val, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200502 break;
503 case REGMAP_SIZE_16:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200504 __write_16(ptr, val, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200505 break;
506 case REGMAP_SIZE_32:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200507 __write_32(ptr, val, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200508 break;
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200509#if defined(out_le64) && defined(out_be64) && defined(writeq)
Mario Sixa4fd59e2018-10-15 09:24:10 +0200510 case REGMAP_SIZE_64:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200511 __write_64(ptr, val, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200512 break;
513#endif
514 default:
515 debug("%s: regmap size %zu unknown\n", __func__, val_len);
516 return -EINVAL;
517 }
Paul Burton39776032016-09-08 07:47:35 +0100518
519 return 0;
520}
Neil Armstrong5444ec62018-04-27 11:56:14 +0200521
Mario Six2f009972018-10-15 09:24:11 +0200522int regmap_raw_write(struct regmap *map, uint offset, const void *val,
523 size_t val_len)
524{
525 return regmap_raw_write_range(map, 0, offset, val, val_len);
526}
527
Mario Sixa4fd59e2018-10-15 09:24:10 +0200528int regmap_write(struct regmap *map, uint offset, uint val)
529{
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530530 return regmap_raw_write(map, offset, &val, map->width);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200531}
532
Neil Armstrong5444ec62018-04-27 11:56:14 +0200533int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val)
534{
535 uint reg;
536 int ret;
537
538 ret = regmap_read(map, offset, &reg);
539 if (ret)
540 return ret;
541
542 reg &= ~mask;
543
Simon Glass56bed2a2019-10-11 16:16:49 -0600544 return regmap_write(map, offset, reg | (val & mask));
Neil Armstrong5444ec62018-04-27 11:56:14 +0200545}