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Priyanka Jainfd45ca02018-11-28 13:04:27 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lubb32e682021-06-03 10:51:19 +08003 * Copyright 2018-2021 NXP
Priyanka Jainfd45ca02018-11-28 13:04:27 +00004 */
5
6#ifndef __LX2_COMMON_H
7#define __LX2_COMMON_H
8
9#include <asm/arch/stream_id_lsch3.h>
10#include <asm/arch/config.h>
11#include <asm/arch/soc.h>
12
Priyanka Jainfd45ca02018-11-28 13:04:27 +000013#define CONFIG_SYS_FLASH_BASE 0x20000000
14
Priyanka Jainfd45ca02018-11-28 13:04:27 +000015/* DDR */
Priyanka Jainfd45ca02018-11-28 13:04:27 +000016#define CONFIG_VERY_BIG_RAM
17#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
18#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
19#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
20#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
21#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
Priyanka Jainfd45ca02018-11-28 13:04:27 +000022#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
23#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
24#define SPD_EEPROM_ADDRESS1 0x51
25#define SPD_EEPROM_ADDRESS2 0x52
26#define SPD_EEPROM_ADDRESS3 0x53
27#define SPD_EEPROM_ADDRESS4 0x54
28#define SPD_EEPROM_ADDRESS5 0x55
29#define SPD_EEPROM_ADDRESS6 0x56
30#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
Priyanka Jainfd45ca02018-11-28 13:04:27 +000031#define CONFIG_SYS_MONITOR_LEN (936 * 1024)
32
33/* Miscellaneous configurable options */
Priyanka Jainfd45ca02018-11-28 13:04:27 +000034
35/* SMP Definitinos */
Michael Wallef056e0f2020-06-01 21:53:26 +020036#define CPU_RELEASE_ADDR secondary_boot_addr
Priyanka Jainfd45ca02018-11-28 13:04:27 +000037
38/* Generic Timer Definitions */
39/*
40 * This is not an accurate number. It is used in start.S. The frequency
41 * will be udpated later when get_bus_freq(0) is available.
42 */
43
Priyanka Jainfd45ca02018-11-28 13:04:27 +000044
Priyanka Jainfd45ca02018-11-28 13:04:27 +000045/* Serial Port */
Priyanka Jainfd45ca02018-11-28 13:04:27 +000046#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4)
47#define CONFIG_SYS_SERIAL0 0x21c0000
48#define CONFIG_SYS_SERIAL1 0x21d0000
49#define CONFIG_SYS_SERIAL2 0x21e0000
50#define CONFIG_SYS_SERIAL3 0x21f0000
51/*below might needs to be removed*/
52#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
53 (void *)CONFIG_SYS_SERIAL1, \
54 (void *)CONFIG_SYS_SERIAL2, \
55 (void *)CONFIG_SYS_SERIAL3 }
Priyanka Jainfd45ca02018-11-28 13:04:27 +000056
57/* MC firmware */
58#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000
59#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
60#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
61#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
62#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
63
Priyanka Jainfd45ca02018-11-28 13:04:27 +000064/*
65 * Carve out a DDR region which will not be used by u-boot/Linux
66 *
67 * It will be used by MC and Debug Server. The MC region must be
68 * 512MB aligned, so the min size to hide is 512MB.
69 */
70#ifdef CONFIG_FSL_MC_ENET
Meenakshi Aggarwal67f195c2019-02-27 14:41:02 +053071#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
Priyanka Jainfd45ca02018-11-28 13:04:27 +000072#endif
73
74/* I2C bus multiplexer */
75#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
76#define I2C_MUX_CH_DEFAULT 0x8
77
78/* RTC */
79#define RTC
80#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
81
82/* EEPROM */
Priyanka Jainfd45ca02018-11-28 13:04:27 +000083#define CONFIG_SYS_I2C_EEPROM_NXID
84#define CONFIG_SYS_EEPROM_BUS_NUM 0
Priyanka Jainfd45ca02018-11-28 13:04:27 +000085
86/* Qixis */
Priyanka Jainfd45ca02018-11-28 13:04:27 +000087#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
88
Priyanka Jainfd45ca02018-11-28 13:04:27 +000089/* USB */
Priyanka Jainfd45ca02018-11-28 13:04:27 +000090
Tom Rini8c70baa2021-12-14 13:36:40 -050091#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
Priyanka Jainfd45ca02018-11-28 13:04:27 +000092
93#define CONFIG_HWCONFIG
94#define HWCONFIG_BUFFER_SIZE 128
95
Priyanka Jainfd45ca02018-11-28 13:04:27 +000096/* Initial environment variables */
Kuldeep Singh3e78c332020-03-12 15:13:00 +053097#define XSPI_MC_INIT_CMD \
98 "sf probe 0:0 && " \
99 "sf read 0x80640000 0x640000 0x80000 && " \
Priyanka Jain5fde1642021-08-18 12:37:03 +0530100 "sf read $fdt_addr_r 0xf00000 0x100000 && " \
Kuldeep Singh3e78c332020-03-12 15:13:00 +0530101 "env exists secureboot && " \
102 "esbc_validate 0x80640000 && " \
103 "esbc_validate 0x80680000; " \
104 "sf read 0x80a00000 0xa00000 0x300000 && " \
105 "sf read 0x80e00000 0xe00000 0x100000; " \
106 "fsl_mc start mc 0x80a00000 0x80e00000\0"
Priyanka Jainfd45ca02018-11-28 13:04:27 +0000107
108#define SD_MC_INIT_CMD \
Pankaj Bansal1972a532019-07-17 10:33:54 +0000109 "mmc read 0x80a00000 0x5000 0x1200;" \
110 "mmc read 0x80e00000 0x7000 0x800;" \
Priyanka Jain5fde1642021-08-18 12:37:03 +0530111 "mmc read $fdt_addr_r 0x7800 0x800;" \
Udit Agarwalf34581e2018-12-14 04:43:32 +0000112 "env exists secureboot && " \
Priyanka Singhe29ef972020-01-22 10:31:22 +0000113 "mmc read 0x80640000 0x3200 0x20 && " \
114 "mmc read 0x80680000 0x3400 0x20 && " \
115 "esbc_validate 0x80640000 && " \
116 "esbc_validate 0x80680000 ;" \
Pankaj Bansal1972a532019-07-17 10:33:54 +0000117 "fsl_mc start mc 0x80a00000 0x80e00000\0"
Priyanka Jainfd45ca02018-11-28 13:04:27 +0000118
Meenakshi Aggarwale181a3d2020-04-27 19:56:40 +0530119#define SD2_MC_INIT_CMD \
120 "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
121 "mmc read 0x80e00000 0x7000 0x800;" \
Priyanka Jain5fde1642021-08-18 12:37:03 +0530122 "mmc read $fdt_addr_r 0x7800 0x800;" \
Meenakshi Aggarwale181a3d2020-04-27 19:56:40 +0530123 "env exists secureboot && " \
124 "mmc read 0x80640000 0x3200 0x20 && " \
125 "mmc read 0x80680000 0x3400 0x20 && " \
126 "esbc_validate 0x80640000 && " \
127 "esbc_validate 0x80680000 ;" \
128 "fsl_mc start mc 0x80a00000 0x80e00000\0"
129
Priyanka Jain16744062019-01-24 05:22:18 +0000130#define EXTRA_ENV_SETTINGS \
131 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
132 "ramdisk_addr=0x800000\0" \
133 "ramdisk_size=0x2000000\0" \
134 "fdt_high=0xa0000000\0" \
135 "initrd_high=0xffffffffffffffff\0" \
Priyanka Jain16744062019-01-24 05:22:18 +0000136 "kernel_start=0x1000000\0" \
Priyanka Singhe29ef972020-01-22 10:31:22 +0000137 "kernelheader_start=0x600000\0" \
Priyanka Jain16744062019-01-24 05:22:18 +0000138 "scriptaddr=0x80000000\0" \
139 "scripthdraddr=0x80080000\0" \
140 "fdtheader_addr_r=0x80100000\0" \
141 "kernelheader_addr_r=0x80200000\0" \
142 "kernel_addr_r=0x81000000\0" \
143 "kernelheader_size=0x40000\0" \
144 "fdt_addr_r=0x90000000\0" \
145 "load_addr=0xa0000000\0" \
146 "kernel_size=0x2800000\0" \
147 "kernel_addr_sd=0x8000\0" \
Priyanka Singhe29ef972020-01-22 10:31:22 +0000148 "kernelhdr_addr_sd=0x3000\0" \
Manish Tomarebef67f2020-11-05 14:08:56 +0530149 "kernel_size_sd=0x14000\0" \
Udit Agarwal11e1a572019-11-20 08:49:06 +0000150 "kernelhdr_size_sd=0x20\0" \
Priyanka Jain16744062019-01-24 05:22:18 +0000151 "console=ttyAMA0,38400n8\0" \
152 BOOTENV \
153 "mcmemsize=0x70000000\0" \
154 XSPI_MC_INIT_CMD \
Priyanka Jain16744062019-01-24 05:22:18 +0000155 "scan_dev_for_boot_part=" \
156 "part list ${devtype} ${devnum} devplist; " \
157 "env exists devplist || setenv devplist 1; " \
158 "for distro_bootpart in ${devplist}; do " \
159 "if fstype ${devtype} " \
160 "${devnum}:${distro_bootpart} " \
161 "bootfstype; then " \
162 "run scan_dev_for_boot; " \
163 "fi; " \
164 "done\0" \
Priyanka Jain16744062019-01-24 05:22:18 +0000165 "boot_a_script=" \
166 "load ${devtype} ${devnum}:${distro_bootpart} " \
167 "${scriptaddr} ${prefix}${script}; " \
168 "env exists secureboot && load ${devtype} " \
169 "${devnum}:${distro_bootpart} " \
170 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
171 "&& esbc_validate ${scripthdraddr};" \
172 "source ${scriptaddr}\0"
173
174#define XSPI_NOR_BOOTCOMMAND \
Kuldeep Singh3e78c332020-03-12 15:13:00 +0530175 "sf probe 0:0; " \
176 "sf read 0x806c0000 0x6c0000 0x40000; " \
177 "env exists mcinitcmd && env exists secureboot" \
178 " && esbc_validate 0x806c0000; " \
179 "sf read 0x80d00000 0xd00000 0x100000; " \
Priyanka Jain16744062019-01-24 05:22:18 +0000180 "env exists mcinitcmd && " \
Kuldeep Singh3e78c332020-03-12 15:13:00 +0530181 "fsl_mc lazyapply dpl 0x80d00000; " \
Priyanka Jain16744062019-01-24 05:22:18 +0000182 "run distro_bootcmd;run xspi_bootcmd; " \
183 "env exists secureboot && esbc_halt;"
184
185#define SD_BOOTCOMMAND \
186 "env exists mcinitcmd && mmcinfo; " \
Pankaj Bansal1972a532019-07-17 10:33:54 +0000187 "mmc read 0x80d00000 0x6800 0x800; " \
Priyanka Jain16744062019-01-24 05:22:18 +0000188 "env exists mcinitcmd && env exists secureboot " \
Priyanka Singhe29ef972020-01-22 10:31:22 +0000189 " && mmc read 0x806C0000 0x3600 0x20 " \
190 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
Pankaj Bansal1972a532019-07-17 10:33:54 +0000191 "&& fsl_mc lazyapply dpl 0x80d00000;" \
Priyanka Jain16744062019-01-24 05:22:18 +0000192 "run distro_bootcmd;run sd_bootcmd;" \
193 "env exists secureboot && esbc_halt;"
194
Meenakshi Aggarwalbebebab2020-02-19 23:30:45 +0530195#define SD2_BOOTCOMMAND \
Meenakshi Aggarwale181a3d2020-04-27 19:56:40 +0530196 "mmc dev 1; env exists mcinitcmd && mmcinfo; " \
Meenakshi Aggarwalbebebab2020-02-19 23:30:45 +0530197 "mmc read 0x80d00000 0x6800 0x800; " \
198 "env exists mcinitcmd && env exists secureboot " \
Meenakshi Aggarwale181a3d2020-04-27 19:56:40 +0530199 " && mmc read 0x806C0000 0x3600 0x20 " \
200 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
Meenakshi Aggarwalbebebab2020-02-19 23:30:45 +0530201 "&& fsl_mc lazyapply dpl 0x80d00000;" \
202 "run distro_bootcmd;run sd2_bootcmd;" \
203 "env exists secureboot && esbc_halt;"
204
Daniel Klauerd7daa552022-02-09 15:53:41 +0100205#ifdef CONFIG_CMD_USB
206#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
207#else
208#define BOOT_TARGET_DEVICES_USB(func)
209#endif
210
211#ifdef CONFIG_MMC
212#define BOOT_TARGET_DEVICES_MMC(func, instance) func(MMC, mmc, instance)
213#else
214#define BOOT_TARGET_DEVICES_MMC(func)
215#endif
216
217#ifdef CONFIG_SCSI
218#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
219#else
220#define BOOT_TARGET_DEVICES_SCSI(func)
221#endif
222
223#ifdef CONFIG_CMD_DHCP
224#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
225#else
226#define BOOT_TARGET_DEVICES_DHCP(func)
227#endif
228
Priyanka Jain16744062019-01-24 05:22:18 +0000229#define BOOT_TARGET_DEVICES(func) \
Daniel Klauerd7daa552022-02-09 15:53:41 +0100230 BOOT_TARGET_DEVICES_USB(func) \
231 BOOT_TARGET_DEVICES_MMC(func, 0) \
232 BOOT_TARGET_DEVICES_MMC(func, 1) \
233 BOOT_TARGET_DEVICES_SCSI(func) \
234 BOOT_TARGET_DEVICES_DHCP(func)
Priyanka Jain16744062019-01-24 05:22:18 +0000235#include <config_distro_bootcmd.h>
236
Priyanka Jainfd45ca02018-11-28 13:04:27 +0000237#endif /* __LX2_COMMON_H */