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git01.mediatek.com / filogic / uboot / 3deb9896176a624051af30efd1b7713a3abc8cb1 / . / arch / arm / dts / exynos5250-pinctrl.dtsi
blob: 67755a1e08ffaa84992bd2dfb6fdb52f624e733c [file] [log] [blame]
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]1/*
2 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
8 * tree nodes are listed in this file.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/ {
16 pinctrl@11400000 {
17 gpa0: gpa0 {
18 gpio-controller;
19 #gpio-cells = <2>;
20
21 interrupt-controller;
22 #interrupt-cells = <2>;
23 };
24
25 gpa1: gpa1 {
26 gpio-controller;
27 #gpio-cells = <2>;
28
29 interrupt-controller;
30 #interrupt-cells = <2>;
31 };
32
33 gpa2: gpa2 {
34 gpio-controller;
35 #gpio-cells = <2>;
36
37 interrupt-controller;
38 #interrupt-cells = <2>;
39 };
40
41 gpb0: gpb0 {
42 gpio-controller;
43 #gpio-cells = <2>;
44
45 interrupt-controller;
46 #interrupt-cells = <2>;
47 };
48
49 gpb1: gpb1 {
50 gpio-controller;
51 #gpio-cells = <2>;
52
53 interrupt-controller;
54 #interrupt-cells = <2>;
55 };
56
57 gpb2: gpb2 {
58 gpio-controller;
59 #gpio-cells = <2>;
60
61 interrupt-controller;
62 #interrupt-cells = <2>;
63 };
64
65 gpb3: gpb3 {
66 gpio-controller;
67 #gpio-cells = <2>;
68
69 interrupt-controller;
70 #interrupt-cells = <2>;
71 };
72
73 gpc0: gpc0 {
74 gpio-controller;
75 #gpio-cells = <2>;
76
77 interrupt-controller;
78 #interrupt-cells = <2>;
79 };
80
81 gpc1: gpc1 {
82 gpio-controller;
83 #gpio-cells = <2>;
84
85 interrupt-controller;
86 #interrupt-cells = <2>;
87 };
88
89 gpc2: gpc2 {
90 gpio-controller;
91 #gpio-cells = <2>;
92
93 interrupt-controller;
94 #interrupt-cells = <2>;
95 };
96
97 gpc3: gpc3 {
98 gpio-controller;
99 #gpio-cells = <2>;
100
101 interrupt-controller;
102 #interrupt-cells = <2>;
103 };
104
105 gpd0: gpd0 {
106 gpio-controller;
107 #gpio-cells = <2>;
108
109 interrupt-controller;
110 #interrupt-cells = <2>;
111 };
112
113 gpd1: gpd1 {
114 gpio-controller;
115 #gpio-cells = <2>;
116
117 interrupt-controller;
118 #interrupt-cells = <2>;
119 };
120
121 gpy0: gpy0 {
122 gpio-controller;
123 #gpio-cells = <2>;
124 };
125
126 gpy1: gpy1 {
127 gpio-controller;
128 #gpio-cells = <2>;
129 };
130
131 gpy2: gpy2 {
132 gpio-controller;
133 #gpio-cells = <2>;
134 };
135
136 gpy3: gpy3 {
137 gpio-controller;
138 #gpio-cells = <2>;
139 };
140
141 gpy4: gpy4 {
142 gpio-controller;
143 #gpio-cells = <2>;
144 };
145
146 gpy5: gpy5 {
147 gpio-controller;
148 #gpio-cells = <2>;
149 };
150
151 gpy6: gpy6 {
152 gpio-controller;
153 #gpio-cells = <2>;
154 };
155
156 gpc4: gpc4 {
157 gpio-controller;
158 #gpio-cells = <2>;
159
160 interrupt-controller;
161 #interrupt-cells = <2>;
162 };
163
164 gpx0: gpx0 {
165 gpio-controller;
166 #gpio-cells = <2>;
167
168 interrupt-controller;
169 interrupt-parent = <&combiner>;
170 #interrupt-cells = <2>;
171 interrupts = <23 0>, <24 0>, <25 0>, <25 1>,
172 <26 0>, <26 1>, <27 0>, <27 1>;
173 };
174
175 gpx1: gpx1 {
176 gpio-controller;
177 #gpio-cells = <2>;
178
179 interrupt-controller;
180 interrupt-parent = <&combiner>;
181 #interrupt-cells = <2>;
182 interrupts = <28 0>, <28 1>, <29 0>, <29 1>,
183 <30 0>, <30 1>, <31 0>, <31 1>;
184 };
185
186 gpx2: gpx2 {
187 gpio-controller;
188 #gpio-cells = <2>;
189
190 interrupt-controller;
191 #interrupt-cells = <2>;
192 };
193
194 gpx3: gpx3 {
195 gpio-controller;
196 #gpio-cells = <2>;
197
198 interrupt-controller;
199 #interrupt-cells = <2>;
200 };
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]201 };
202
203 pinctrl@13400000 {
204 gpe0: gpe0 {
205 gpio-controller;
206 #gpio-cells = <2>;
207
208 interrupt-controller;
209 #interrupt-cells = <2>;
210 };
211
212 gpe1: gpe1 {
213 gpio-controller;
214 #gpio-cells = <2>;
215
216 interrupt-controller;
217 #interrupt-cells = <2>;
218 };
219
220 gpf0: gpf0 {
221 gpio-controller;
222 #gpio-cells = <2>;
223
224 interrupt-controller;
225 #interrupt-cells = <2>;
226 };
227
228 gpf1: gpf1 {
229 gpio-controller;
230 #gpio-cells = <2>;
231
232 interrupt-controller;
233 #interrupt-cells = <2>;
234 };
235
236 gpg0: gpg0 {
237 gpio-controller;
238 #gpio-cells = <2>;
239
240 interrupt-controller;
241 #interrupt-cells = <2>;
242 };
243
244 gpg1: gpg1 {
245 gpio-controller;
246 #gpio-cells = <2>;
247
248 interrupt-controller;
249 #interrupt-cells = <2>;
250 };
251
252 gpg2: gpg2 {
253 gpio-controller;
254 #gpio-cells = <2>;
255
256 interrupt-controller;
257 #interrupt-cells = <2>;
258 };
259
260 gph0: gph0 {
261 gpio-controller;
262 #gpio-cells = <2>;
263
264 interrupt-controller;
265 #interrupt-cells = <2>;
266 };
267
268 gph1: gph1 {
269 gpio-controller;
270 #gpio-cells = <2>;
271
272 interrupt-controller;
273 #interrupt-cells = <2>;
274 };
275
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]276 };
277
278 pinctrl@10d10000 {
279 gpv0: gpv0 {
280 gpio-controller;
281 #gpio-cells = <2>;
282
283 interrupt-controller;
284 #interrupt-cells = <2>;
285 };
286
287 gpv1: gpv1 {
288 gpio-controller;
289 #gpio-cells = <2>;
290
291 interrupt-controller;
292 #interrupt-cells = <2>;
293 };
294
295 gpv2: gpv2 {
296 gpio-controller;
297 #gpio-cells = <2>;
298
299 interrupt-controller;
300 #interrupt-cells = <2>;
301 };
302
303 gpv3: gpv3 {
304 gpio-controller;
305 #gpio-cells = <2>;
306
307 interrupt-controller;
308 #interrupt-cells = <2>;
309 };
310
311 gpv4: gpv4 {
312 gpio-controller;
313 #gpio-cells = <2>;
314
315 interrupt-controller;
316 #interrupt-cells = <2>;
317 };
318
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]319 };
320
321 pinctrl@03860000 {
322 gpz: gpz {
323 gpio-controller;
324 #gpio-cells = <2>;
325
326 interrupt-controller;
327 #interrupt-cells = <2>;
328 };
329
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]330 };
331};