| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems | ||||
| Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 4 | */ |
| 5 | |||||
| 6 | #ifndef _CONFIG_TB100_H_ | ||||
| 7 | #define _CONFIG_TB100_H_ | ||||
| 8 | |||||
| 9 | #include <linux/sizes.h> | ||||
| 10 | |||||
| 11 | /* | ||||
| Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 12 | * Memory configuration |
| 13 | */ | ||||
| Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 14 | |
| Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 15 | #define CFG_SYS_DDR_SDRAM_BASE 0x80000000 |
| 16 | #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE | ||||
| Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 17 | #define CFG_SYS_SDRAM_SIZE SZ_128M |
| Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 18 | |
| Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 19 | /* |
| 20 | * UART configuration | ||||
| 21 | */ | ||||
| Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 22 | #define CFG_SYS_NS16550_CLK 166666666 |
| Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 23 | |
| Alexey Brodkin | 9aea028 | 2014-05-21 14:39:32 +0400 | [diff] [blame] | 24 | #endif /* _CONFIG_TB100_H_ */ |