blob: 05f6d9fc1af45f96054a26c58de52c2902e69048 [file] [log] [blame]
Peter Pearsebc3936b2007-05-09 11:41:58 +01001/*
2 * (C) Copyright 2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * Configuation settings for the SMN42 board from Siemens.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * If we are developing, we might want to start u-boot from ram
31 * so we MUST NOT initialize critical regs like mem-timing ...
32 */
33#undef CONFIG_INIT_CRITICAL /* undef for developing */
34
35#undef CONFIG_SKIP_LOWLEVEL_INIT
36#undef CONFIG_SKIP_RELOCATE_UBOOT
37
38/*
39 * High Level Configuration Options
40 * (easy to change)
41 */
42#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
43#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
44#define CONFIG_LPC2292
Wolfgang Denka9d7acb2007-06-06 16:26:56 +020045#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
Peter Pearsebc3936b2007-05-09 11:41:58 +010046
47#undef CONFIG_USE_IRQ /* don't need them anymore */
48
49/*
50 * Size of malloc() pool
51 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
53#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
Peter Pearsebc3936b2007-05-09 11:41:58 +010054
55/*
56 * Hardware drivers
57 */
58
59/*
60 * select serial console configuration
61 */
Jean-Christophe PLAGNIOL-VILLARD3d2fdc82009-03-29 23:01:42 +020062#define CONFIG_LPC2292_SERIAL
Peter Pearsebc3936b2007-05-09 11:41:58 +010063#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
64
65/* allow to overwrite serial and ethaddr */
66#define CONFIG_ENV_OVERWRITE
67
68#define CONFIG_BAUDRATE 115200
69
Jon Loeliger7846bb22007-07-09 21:31:24 -050070/*
71 * BOOTP options
72 */
73#define CONFIG_BOOTP_SUBNETMASK
74#define CONFIG_BOOTP_GATEWAY
75#define CONFIG_BOOTP_HOSTNAME
76#define CONFIG_BOOTP_BOOTPATH
77#define CONFIG_BOOTP_BOOTFILESIZE
78
Peter Pearsebc3936b2007-05-09 11:41:58 +010079
80/* enable I2C and select the hardware/software driver */
Wolfgang Denka9d7acb2007-06-06 16:26:56 +020081#undef CONFIG_HARD_I2C /* I2C with hardware support */
Peter Pearsebc3936b2007-05-09 11:41:58 +010082#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
83/* this would be 0xAE if E0, E1 and E2 were pulled high */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020084#define CONFIG_SYS_I2C_SLAVE 0xA0
85#define CONFIG_SYS_I2C_EEPROM_ADDR (0xA0 >> 1)
86#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */
87#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */
88#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
Peter Pearsebc3936b2007-05-09 11:41:58 +010089/* not used but required by devices.c */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020090#define CONFIG_SYS_I2C_SPEED 10000
Peter Pearsebc3936b2007-05-09 11:41:58 +010091
92#ifdef CONFIG_SOFT_I2C
93/*
94 * Software (bit-bang) I2C driver configuration
95 */
96#define SCL 0x00000004 /* P0.2 */
97#define SDA 0x00000008 /* P0.3 */
98
99#define I2C_READ ((GET32(IO0PIN) & SDA) ? 1 : 0)
100#define I2C_SDA(x) { if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); }
101#define I2C_SCL(x) { if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); }
102#define I2C_DELAY { udelay(100); }
103#define I2C_ACTIVE { unsigned int i2ctmp; \
Wolfgang Denka9d7acb2007-06-06 16:26:56 +0200104 i2ctmp = GET32(IO0DIR); \
Peter Pearsebc3936b2007-05-09 11:41:58 +0100105 i2ctmp |= SDA; \
106 PUT32(IO0DIR, i2ctmp); }
107#define I2C_TRISTATE { unsigned int i2ctmp; \
Wolfgang Denka9d7acb2007-06-06 16:26:56 +0200108 i2ctmp = GET32(IO0DIR); \
Peter Pearsebc3936b2007-05-09 11:41:58 +0100109 i2ctmp &= ~SDA; \
110 PUT32(IO0DIR, i2ctmp); }
111#endif /* CONFIG_SOFT_I2C */
112
Jon Loeligerd866df32007-07-08 15:02:44 -0500113
Peter Pearsebc3936b2007-05-09 11:41:58 +0100114/*
Jon Loeligerd866df32007-07-08 15:02:44 -0500115 * Command line configuration.
Peter Pearsebc3936b2007-05-09 11:41:58 +0100116 */
Jon Loeligerd866df32007-07-08 15:02:44 -0500117#include <config_cmd_default.h>
118#define CONFIG_CMD_DHCP
119#define CONFIG_CMD_FAT
120#define CONFIG_CMD_MMC
121#define CONFIG_CMD_NET
122#define CONFIG_CMD_EEPROM
123#define CONFIG_CMD_PING
Peter Pearsebc3936b2007-05-09 11:41:58 +0100124
Peter Pearsebc3936b2007-05-09 11:41:58 +0100125
Jon Loeligerd866df32007-07-08 15:02:44 -0500126#define CONFIG_DOS_PARTITION
Peter Pearsebc3936b2007-05-09 11:41:58 +0100127
128#define CONFIG_BOOTDELAY 5
129
130/*
131 * Miscellaneous configurable options
132 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133#define CONFIG_SYS_LONGHELP /* undef to save memory */
134#define CONFIG_SYS_PROMPT "SMN42 # " /* Monitor Command Prompt */
135#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
136#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
137#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
138#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Peter Pearsebc3936b2007-05-09 11:41:58 +0100139
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200140#define CONFIG_SYS_MEMTEST_START 0x81800000 /* memtest works on */
141#define CONFIG_SYS_MEMTEST_END 0x83000000 /* 24 MB in SRAM */
Peter Pearsebc3936b2007-05-09 11:41:58 +0100142
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200143#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
Wolfgang Denka9d7acb2007-06-06 16:26:56 +0200144 /* for uClinux img is here*/
Peter Pearsebc3936b2007-05-09 11:41:58 +0100145
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146#define CONFIG_SYS_SYS_CLK_FREQ 58982400 /* Hz */
147#define CONFIG_SYS_HZ 2048 /* decrementer freq in Hz */
Peter Pearsebc3936b2007-05-09 11:41:58 +0100148
149 /* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200150#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
Peter Pearsebc3936b2007-05-09 11:41:58 +0100151
152/*-----------------------------------------------------------------------
153 * Stack sizes
154 *
155 * The stack sizes are set up in start.S using the settings below
156 */
157#define CONFIG_STACKSIZE (128*1024) /* regular stack */
158#ifdef CONFIG_USE_IRQ
159#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
160#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
161#endif
162
163/*-----------------------------------------------------------------------
164 * Physical Memory Map
165 */
166#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SRAM */
167#define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */
168#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */
169
170/* This is the external flash */
171#define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */
172#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
173
174/*-----------------------------------------------------------------------
175 * FLASH and environment organization
176 */
177
178/*
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200179 * The first entry in CONFIG_SYS_FLASH_BANKS_LIST is a dummy, but it must be present.
Peter Pearsebc3936b2007-05-09 11:41:58 +0100180 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200181#define CONFIG_SYS_FLASH_BANKS_LIST { 0, PHYS_FLASH_1 }
182#define CONFIG_SYS_FLASH_ADDR0 0x555
183#define CONFIG_SYS_FLASH_ADDR1 0x2AA
184#define CONFIG_SYS_FLASH_ERASE_TOUT 16384 /* Timeout for Flash Erase (in ms) */
185#define CONFIG_SYS_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */
Peter Pearsebc3936b2007-05-09 11:41:58 +0100186
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200187#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
Peter Pearsebc3936b2007-05-09 11:41:58 +0100188
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200189#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
Peter Pearsebc3936b2007-05-09 11:41:58 +0100190
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200191#define CONFIG_ENV_IS_IN_FLASH 1
Peter Pearsebc3936b2007-05-09 11:41:58 +0100192/* The Environment Sector is in the CPU-internal flash */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200193#define CONFIG_SYS_FLASH_BASE 0
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200194#define CONFIG_ENV_OFFSET 0x3C000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200195#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200196#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
Peter Pearsebc3936b2007-05-09 11:41:58 +0100197
198#define CONFIG_CMDLINE_TAG
199#define CONFIG_SETUP_MEMORY_TAGS
200#define CONFIG_INITRD_TAG
201#define CONFIG_MMC 1
202/* we use this ethernet chip */
203#define CONFIG_ENC28J60
204
205#endif /* __CONFIG_H */