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git01.mediatek.com / filogic / uboot / 3d09ed3c54d537d1c4e6501f6e457d37da9b26e0 / . / arch / arm / dts / k3-am65-main.dtsi
blob: adcd6341e40c02aabef992516a075eb2a14245a8 [file] [log] [blame]
Lokesh Vutla8bfaf012018-08-27 15:59:08 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for AM6 SoC Family Main Domain peripherals
4 *
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
6 */
7
8&cbass_main {
9 gic500: interrupt-controller@1800000 {
10 compatible = "arm,gic-v3";
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame^]11 #address-cells = <2>;
12 #size-cells = <2>;
Lokesh Vutla8bfaf012018-08-27 15:59:08 +0530[diff] [blame]13 ranges;
14 #interrupt-cells = <3>;
15 interrupt-controller;
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame^]16 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
17 <0x00 0x01880000 0x00 0x90000>; /* GICR */
Lokesh Vutla8bfaf012018-08-27 15:59:08 +0530[diff] [blame]18 /*
19 * vcpumntirq:
20 * virtual CPU interface maintenance interrupt
21 */
22 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
23
24 gic_its: gic-its@18200000 {
25 compatible = "arm,gic-v3-its";
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame^]26 reg = <0x00 0x01820000 0x00 0x10000>;
Lokesh Vutla8bfaf012018-08-27 15:59:08 +0530[diff] [blame]27 msi-controller;
28 #msi-cells = <1>;
29 };
30 };
Lokesh Vutla3d09ed32018-11-02 19:51:08 +0530[diff] [blame^]31
32 secure_proxy_main: mailbox@32c00000 {
33 compatible = "ti,am654-secure-proxy";
34 #mbox-cells = <1>;
35 reg-names = "target_data", "rt", "scfg";
36 reg = <0x00 0x32c00000 0x00 0x100000>,
37 <0x00 0x32400000 0x00 0x100000>,
38 <0x00 0x32800000 0x00 0x100000>;
39 interrupt-names = "rx_011";
40 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
41 };
42
43 main_uart0: serial@2800000 {
44 compatible = "ti,am654-uart";
45 reg = <0x00 0x02800000 0x00 0x100>;
46 reg-shift = <2>;
47 reg-io-width = <4>;
48 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
49 clock-frequency = <48000000>;
50 current-speed = <115200>;
51 };
52
53 main_uart1: serial@2810000 {
54 compatible = "ti,am654-uart";
55 reg = <0x00 0x02810000 0x00 0x100>;
56 reg-shift = <2>;
57 reg-io-width = <4>;
58 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
59 clock-frequency = <48000000>;
60 current-speed = <115200>;
61 };
62
63 main_uart2: serial@2820000 {
64 compatible = "ti,am654-uart";
65 reg = <0x00 0x02820000 0x00 0x100>;
66 reg-shift = <2>;
67 reg-io-width = <4>;
68 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
69 clock-frequency = <48000000>;
70 current-speed = <115200>;
71 };
Lokesh Vutla8bfaf012018-08-27 15:59:08 +0530[diff] [blame]72};