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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vipin KUMAR7cb16352010-01-15 19:15:43 +05302/*
3 * (C) Copyright 2009
4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
Vipin KUMAR7cb16352010-01-15 19:15:43 +05305 */
6
7#include <common.h>
8#include <asm/io.h>
9#include <asm/arch/hardware.h>
10#include <asm/arch/spr_gpt.h>
11#include <asm/arch/spr_misc.h>
12
13#define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
14#define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
15
16static struct gpt_regs *const gpt_regs_p =
17 (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
18
19static struct misc_regs *const misc_regs_p =
20 (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
21
Heiko Schocher5504dab2011-01-20 22:56:39 +000022DECLARE_GLOBAL_DATA_PTR;
23
Patrick Delaunay9858a602018-10-05 11:33:52 +020024static ulong get_timer_masked(void);
25
Simon Glass2655ee12012-12-13 20:48:34 +000026#define timestamp gd->arch.tbl
Simon Glassa848da52012-12-13 20:48:35 +000027#define lastdec gd->arch.lastinc
Vipin KUMAR7cb16352010-01-15 19:15:43 +053028
29int timer_init(void)
30{
31 u32 synth;
32
33 /* Prescaler setting */
34#if defined(CONFIG_SPEAR3XX)
35 writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
36 synth = MISC_GPT4SYNTH;
37#elif defined(CONFIG_SPEAR600)
38 writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
39 synth = MISC_GPT3SYNTH;
40#else
Simon Glass167ad902016-09-12 23:18:30 -060041# error Incorrect config. Can only be SPEAR{600|300|310|320}
Vipin KUMAR7cb16352010-01-15 19:15:43 +053042#endif
43
44 writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
45 &misc_regs_p->periph_clk_cfg);
46
47 /* disable timers */
48 writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
49
50 /* load value for free running */
51 writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
52
53 /* auto reload, start timer */
54 writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
55
Graeme Russ944a7fe2011-07-15 02:21:14 +000056 /* Reset the timer */
57 lastdec = READ_TIMER();
58 timestamp = 0;
Vipin KUMAR7cb16352010-01-15 19:15:43 +053059
60 return 0;
61}
62
63/*
64 * timer without interrupts
65 */
Vipin KUMAR7cb16352010-01-15 19:15:43 +053066ulong get_timer(ulong base)
67{
68 return (get_timer_masked() / GPT_RESOLUTION) - base;
69}
70
Vipin KUMAR7cb16352010-01-15 19:15:43 +053071void __udelay(unsigned long usec)
72{
73 ulong tmo;
74 ulong start = get_timer_masked();
75 ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
76 ulong rndoff;
77
78 rndoff = (usec % 10) ? 1 : 0;
79
80 /* tenudelcnt timer tick gives 10 microsecconds delay */
81 tmo = ((usec / 10) + rndoff) * tenudelcnt;
82
83 while ((ulong) (get_timer_masked() - start) < tmo)
84 ;
85}
86
Patrick Delaunay9858a602018-10-05 11:33:52 +020087static ulong get_timer_masked(void)
Vipin KUMAR7cb16352010-01-15 19:15:43 +053088{
89 ulong now = READ_TIMER();
90
91 if (now >= lastdec) {
92 /* normal mode */
93 timestamp += now - lastdec;
94 } else {
95 /* we have an overflow ... */
96 timestamp += now + GPT_FREE_RUNNING - lastdec;
97 }
98 lastdec = now;
99
100 return timestamp;
101}
102
Vipin KUMAR7cb16352010-01-15 19:15:43 +0530103/*
104 * This function is derived from PowerPC code (read timebase as long long).
105 * On ARM it just returns the timer value.
106 */
107unsigned long long get_ticks(void)
108{
109 return get_timer(0);
110}
111
112/*
113 * This function is derived from PowerPC code (timebase clock frequency).
114 * On ARM it returns the number of timer ticks per second.
115 */
116ulong get_tbclk(void)
117{
118 return CONFIG_SPEAR_HZ;
119}