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git01.mediatek.com / filogic / uboot / 3cc32ebc18051afa560c97ead4c8a168a779338a / . / arch / arm / dts / imx8mm-evk-u-boot.dtsi
blob: 16093f20671730a3daa673f1afbf5cb1f727c98a [file] [log] [blame]
Peng Fanf9220172019-08-27 06:26:08 +0000[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 NXP
4 */
5
Peng Fanab93ef62019-10-16 10:24:30 +0000[diff] [blame]6&{/soc@0} {
Peng Fanf9220172019-08-27 06:26:08 +0000[diff] [blame]7 u-boot,dm-pre-reloc;
8 u-boot,dm-spl;
9};
10
11&clk {
12 u-boot,dm-spl;
13 u-boot,dm-pre-reloc;
14};
15
16&osc_24m {
17 u-boot,dm-spl;
18 u-boot,dm-pre-reloc;
19};
20
21&aips1 {
22 u-boot,dm-spl;
23 u-boot,dm-pre-reloc;
24};
25
26&aips2 {
27 u-boot,dm-spl;
28};
29
30&aips3 {
31 u-boot,dm-spl;
32};
33
34&iomuxc {
35 u-boot,dm-spl;
36};
37
38&pinctrl_reg_usdhc2_vmmc {
39 u-boot,dm-spl;
40};
41
42&pinctrl_uart2 {
43 u-boot,dm-spl;
44};
45
46&pinctrl_usdhc2_gpio {
47 u-boot,dm-spl;
48};
49
50&pinctrl_usdhc2 {
51 u-boot,dm-spl;
52};
53
54&pinctrl_usdhc3 {
55 u-boot,dm-spl;
56};
57
58&gpio1 {
59 u-boot,dm-spl;
60};
61
62&gpio2 {
63 u-boot,dm-spl;
64};
65
66&gpio3 {
67 u-boot,dm-spl;
68};
69
70&gpio4 {
71 u-boot,dm-spl;
72};
73
74&gpio5 {
75 u-boot,dm-spl;
76};
77
78&uart2 {
79 u-boot,dm-spl;
80};
81
82&usdhc1 {
83 u-boot,dm-spl;
84};
85
86&usdhc2 {
87 u-boot,dm-spl;
88};
89
90&usdhc3 {
91 u-boot,dm-spl;
92};
Peng Fana9e04332019-10-16 10:24:42 +0000[diff] [blame]93
94&i2c1 {
95 u-boot,dm-spl;
96};
97
98&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} {
99 u-boot,dm-spl;
100};
101
102&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} {
103 u-boot,dm-spl;
104};
105
106&pinctrl_i2c1 {
107 u-boot,dm-spl;
108};
109
110&pinctrl_pmic {
111 u-boot,dm-spl;
112};