| Dirk Behme | a1aa39c | 2008-12-14 09:47:12 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com> |
| 3 | * Rohit Choraria <rohitkc@ti.com> |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | #ifndef __ASM_ARCH_OMAP_GPMC_H |
| 24 | #define __ASM_ARCH_OMAP_GPMC_H |
| 25 | |
| 26 | #define GPMC_BUF_EMPTY 0 |
| 27 | #define GPMC_BUF_FULL 1 |
| 28 | |
| 29 | #define ECCCLEAR (0x1 << 8) |
| 30 | #define ECCRESULTREG1 (0x1 << 0) |
| 31 | #define ECCSIZE512BYTE 0xFF |
| 32 | #define ECCSIZE1 (ECCSIZE512BYTE << 22) |
| 33 | #define ECCSIZE0 (ECCSIZE512BYTE << 12) |
| 34 | #define ECCSIZE0SEL (0x000 << 0) |
| 35 | |
| 36 | /* Generic ECC Layouts */ |
| 37 | /* Large Page x8 NAND device Layout */ |
| 38 | #ifdef GPMC_NAND_ECC_LP_x8_LAYOUT |
| 39 | #define GPMC_NAND_HW_ECC_LAYOUT {\ |
| 40 | .eccbytes = 12,\ |
| 41 | .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\ |
| 42 | 9, 10, 11, 12},\ |
| 43 | .oobfree = {\ |
| 44 | {.offset = 13,\ |
| 45 | .length = 51 } } \ |
| 46 | } |
| 47 | #endif |
| 48 | |
| 49 | /* Large Page x16 NAND device Layout */ |
| 50 | #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT |
| 51 | #define GPMC_NAND_HW_ECC_LAYOUT {\ |
| 52 | .eccbytes = 12,\ |
| 53 | .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\ |
| 54 | 10, 11, 12, 13},\ |
| 55 | .oobfree = {\ |
| 56 | {.offset = 14,\ |
| 57 | .length = 50 } } \ |
| 58 | } |
| 59 | #endif |
| 60 | |
| 61 | /* Small Page x8 NAND device Layout */ |
| 62 | #ifdef GPMC_NAND_ECC_SP_x8_LAYOUT |
| 63 | #define GPMC_NAND_HW_ECC_LAYOUT {\ |
| 64 | .eccbytes = 3,\ |
| 65 | .eccpos = {1, 2, 3},\ |
| 66 | .oobfree = {\ |
| 67 | {.offset = 4,\ |
| 68 | .length = 12 } } \ |
| 69 | } |
| 70 | #endif |
| 71 | |
| 72 | /* Small Page x16 NAND device Layout */ |
| 73 | #ifdef GPMC_NAND_ECC_SP_x16_LAYOUT |
| 74 | #define GPMC_NAND_HW_ECC_LAYOUT {\ |
| 75 | .eccbytes = 3,\ |
| 76 | .eccpos = {2, 3, 4},\ |
| 77 | .oobfree = {\ |
| 78 | {.offset = 5,\ |
| 79 | .length = 11 } } \ |
| 80 | } |
| 81 | #endif |
| 82 | |
| 83 | #endif /* __ASM_ARCH_OMAP_GPMC_H */ |