| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Nobuhiro Iwamatsu | c6ccb47 | 2013-11-21 17:06:45 +0900 | [diff] [blame] | 2 | /* |
| 3 | * arch/arm/include/asm/arch-rmobile/r8a7790.h |
| 4 | * |
| Nobuhiro Iwamatsu | 52b9674 | 2014-03-27 16:11:17 +0900 | [diff] [blame] | 5 | * Copyright (C) 2013,2014 Renesas Electronics Corporation |
| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 6 | */ |
| Nobuhiro Iwamatsu | c6ccb47 | 2013-11-21 17:06:45 +0900 | [diff] [blame] | 7 | |
| 8 | #ifndef __ASM_ARCH_R8A7790_H |
| 9 | #define __ASM_ARCH_R8A7790_H |
| 10 | |
| Nobuhiro Iwamatsu | 52b9674 | 2014-03-27 16:11:17 +0900 | [diff] [blame] | 11 | #include "rcar-base.h" |
| Nobuhiro Iwamatsu | c6ccb47 | 2013-11-21 17:06:45 +0900 | [diff] [blame] | 12 | |
| Nobuhiro Iwamatsu | 5f4d280 | 2014-12-02 16:52:22 +0900 | [diff] [blame] | 13 | /* Module stop control/status register bits */ |
| 14 | #define MSTP0_BITS 0x00640801 |
| 15 | #define MSTP1_BITS 0xDB6E9BDF |
| 16 | #define MSTP2_BITS 0x300DA1FC |
| 17 | #define MSTP3_BITS 0xF08CF831 |
| 18 | #define MSTP4_BITS 0x80000184 |
| 19 | #define MSTP5_BITS 0x44C00046 |
| 20 | #define MSTP7_BITS 0x07F30718 |
| 21 | #define MSTP8_BITS 0x01F0FF84 |
| 22 | #define MSTP9_BITS 0xF5979FCF |
| 23 | #define MSTP10_BITS 0xFFFEFFE0 |
| 24 | #define MSTP11_BITS 0x00000000 |
| 25 | |
| Nobuhiro Iwamatsu | 3ec5f86 | 2014-12-17 08:03:00 +0900 | [diff] [blame] | 26 | /* SDHI */ |
| Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 27 | #define CFG_SYS_SH_SDHI_NR_CHANNEL 4 |
| Nobuhiro Iwamatsu | 3ec5f86 | 2014-12-17 08:03:00 +0900 | [diff] [blame] | 28 | |
| Nobuhiro Iwamatsu | 06cadf1 | 2014-03-31 12:28:23 +0900 | [diff] [blame] | 29 | #define R8A7790_CUT_ES2X 2 |
| 30 | #define IS_R8A7790_ES2() \ |
| 31 | (rmobile_get_cpu_rev_integer() == R8A7790_CUT_ES2X) |
| 32 | |
| Nobuhiro Iwamatsu | c6ccb47 | 2013-11-21 17:06:45 +0900 | [diff] [blame] | 33 | #endif /* __ASM_ARCH_R8A7790_H */ |