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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenkc4cbd342005-01-09 18:21:42 +00002/*
3 * Configuation settings for the Sentec Cobra Board.
4 *
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
wdenkc4cbd342005-01-09 18:21:42 +00006 */
7
8/* ---
Bin Meng75574052016-02-05 19:30:11 -08009 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
wdenkc4cbd342005-01-09 18:21:42 +000010 * Date: 2004-03-29
11 * Author: Florian Schlote
12 *
13 * For a description of configuration options please refer also to the
14 * general u-boot-1.x.x/README file
15 * ---
16 */
17
18/* ---
19 * board/config.h - configuration options, board specific
20 * ---
21 */
22
23#ifndef _CONFIG_COBRA5272_H
24#define _CONFIG_COBRA5272_H
25
26/* ---
wdenkc4cbd342005-01-09 18:21:42 +000027 * Defines processor clock - important for correct timings concerning serial
28 * interface etc.
wdenkc4cbd342005-01-09 18:21:42 +000029 * ---
30 */
31
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020032#define CONFIG_SYS_CLK 66000000
33#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
wdenkc4cbd342005-01-09 18:21:42 +000034
wdenkc4cbd342005-01-09 18:21:42 +000035/* ---
36 * Define baudrate for UART1 (console output, tftp, ...)
37 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020038 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
wdenkc4cbd342005-01-09 18:21:42 +000039 * interface
40 * ---
41 */
42
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020043#define CONFIG_SYS_UART_PORT (0)
wdenkc4cbd342005-01-09 18:21:42 +000044
45/* ---
46 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
47 * timeout acc. to your needs
48 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
49 * for 10 sec
50 * ---
51 */
52
53#if 0
wdenkc4cbd342005-01-09 18:21:42 +000054#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
55#endif
56
57/* ---
58 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
59 * bootloader residing in flash ('chainloading'); if you want to use
60 * chainloading or want to compile a u-boot binary that can be loaded into
61 * RAM via BDM set
Wolfgang Denka1be4762008-05-20 16:00:29 +020062 * "#if 0" to "#if 1"
wdenkc4cbd342005-01-09 18:21:42 +000063 * You will need a first stage bootloader then, e. g. colilo or a working BDM
64 * cable (Background Debug Mode)
65 *
66 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
67 *
Wolfgang Denk0708bc62010-10-07 21:51:12 +020068 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
wdenkc4cbd342005-01-09 18:21:42 +000069 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
70 *
71 * ---
72 */
73
74#if 0
75#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
76#endif
77
78/* ---
79 * Configuration for environment
80 * Environment is embedded in u-boot in the second sector of the flash
81 * ---
82 */
83
angelo@sysam.it6312a952015-03-29 22:54:16 +020084#define LDS_BOARD_TEXT \
Simon Glass547cb402017-08-03 12:21:49 -060085 . = DEFINED(env_offset) ? env_offset : .; \
86 env/embedded.o(.text);
Jon Loeliger37ec35e2007-07-04 22:31:56 -050087
TsiChungLiewcfa2b482007-08-15 19:41:06 -050088#ifdef CONFIG_MCFFEC
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089# define CONFIG_SYS_DISCOVER_PHY
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020090/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
91# ifndef CONFIG_SYS_DISCOVER_PHY
TsiChungLiewcfa2b482007-08-15 19:41:06 -050092# define FECDUPLEX FULL
93# define FECSPEED _100BASET
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020094# endif /* CONFIG_SYS_DISCOVER_PHY */
TsiChungLiewcfa2b482007-08-15 19:41:06 -050095#endif
wdenkc4cbd342005-01-09 18:21:42 +000096
97/*
98 *-----------------------------------------------------------------------------
99 * Define user parameters that have to be customized most likely
100 *-----------------------------------------------------------------------------
101 */
102
103/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
104
wdenkc4cbd342005-01-09 18:21:42 +0000105/* The following settings will be contained in the environment block ; if you
106want to use a neutral environment all those settings can be manually set in
107u-boot: 'set' command */
108
109#if 0
110
wdenkc4cbd342005-01-09 18:21:42 +0000111enter a valid image address in flash */
112
wdenkc4cbd342005-01-09 18:21:42 +0000113/* User network settings */
114
wdenkc4cbd342005-01-09 18:21:42 +0000115#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
116#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
117
118#endif
119
wdenkc4cbd342005-01-09 18:21:42 +0000120/*---*/
121
wdenkc4cbd342005-01-09 18:21:42 +0000122/*
123 *-----------------------------------------------------------------------------
124 * End of user parameters to be customized
125 *-----------------------------------------------------------------------------
126 */
127
128/* ---
129 * Defines memory range for test
130 * ---
131 */
132
wdenkc4cbd342005-01-09 18:21:42 +0000133/* ---
134 * Low Level Configuration Settings
135 * (address mappings, register initial values, etc.)
136 * You should know what you are doing if you make changes here.
137 * ---
138 */
139
140/* ---
141 * Base register address
142 * ---
143 */
144
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200145#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
wdenkc4cbd342005-01-09 18:21:42 +0000146
147/* ---
148 * System Conf. Reg. & System Protection Reg.
149 * ---
150 */
151
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200152#define CONFIG_SYS_SCR 0x0003
153#define CONFIG_SYS_SPR 0xffff
wdenkc4cbd342005-01-09 18:21:42 +0000154
155/* ---
156 * Ethernet settings
157 * ---
158 */
159
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200160#define CONFIG_SYS_DISCOVER_PHY
161#define CONFIG_SYS_ENET_BD_BASE 0x780000
wdenkc4cbd342005-01-09 18:21:42 +0000162
163/*-----------------------------------------------------------------------
164 * Definitions for initial stack pointer and data area (in internal SRAM)
165 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200166#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200167#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
Wolfgang Denk0191e472010-10-26 14:34:52 +0200168#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200169#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkc4cbd342005-01-09 18:21:42 +0000170
171/*-----------------------------------------------------------------------
172 * Start addresses for the final memory configuration
173 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200174 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkc4cbd342005-01-09 18:21:42 +0000175 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200176#define CONFIG_SYS_SDRAM_BASE 0x00000000
wdenkc4cbd342005-01-09 18:21:42 +0000177
178/*
179 *-------------------------------------------------------------------------
180 * RAM SIZE (is defined above)
181 *-----------------------------------------------------------------------
182 */
183
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200184/* #define CONFIG_SYS_SDRAM_SIZE 16 */
wdenkc4cbd342005-01-09 18:21:42 +0000185
186/*
187 *-----------------------------------------------------------------------
188 */
189
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200190#define CONFIG_SYS_FLASH_BASE 0xffe00000
wdenkc4cbd342005-01-09 18:21:42 +0000191
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200192#define CONFIG_SYS_MONITOR_LEN 0x20000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200193#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
wdenkc4cbd342005-01-09 18:21:42 +0000194
195/*
196 * For booting Linux, the board info and command line data
197 * have to be in the first 8 MB of memory, since this is
198 * the maximum mapped by the Linux kernel during initialization ??
199 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200200#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkc4cbd342005-01-09 18:21:42 +0000201
202/*-----------------------------------------------------------------------
203 * FLASH organization
204 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200205#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
206#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
wdenkc4cbd342005-01-09 18:21:42 +0000207
208/*-----------------------------------------------------------------------
209 * Cache Configuration
210 */
wdenkc4cbd342005-01-09 18:21:42 +0000211
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600212#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200213 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600214#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200215 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600216#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
217#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
218 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
219 CF_ACR_EN | CF_ACR_SM_ALL)
220#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
221 CF_CACR_DISD | CF_CACR_INVI | \
222 CF_CACR_CEIB | CF_CACR_DCM | \
223 CF_CACR_EUSP)
224
wdenkc4cbd342005-01-09 18:21:42 +0000225/*-----------------------------------------------------------------------
wdenkc4cbd342005-01-09 18:21:42 +0000226 * LED config
227 */
228#define LED_STAT_0 0xffff /*all LEDs off*/
229#define LED_STAT_1 0xfffe
230#define LED_STAT_2 0xfffd
231#define LED_STAT_3 0xfffb
232#define LED_STAT_4 0xfff7
233#define LED_STAT_5 0xffef
234#define LED_STAT_6 0xffdf
235#define LED_STAT_7 0xff00 /*all LEDs on*/
236
237/*-----------------------------------------------------------------------
238 * Port configuration (GPIO)
239 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200240#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
wdenkc4cbd342005-01-09 18:21:42 +0000241GPIO*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200242#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
wdenkc4cbd342005-01-09 18:21:42 +0000243(1^=output, 0^=input) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200244#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
245#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
wdenkc4cbd342005-01-09 18:21:42 +0000246configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200247#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
248#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
249#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
wdenkc4cbd342005-01-09 18:21:42 +0000250
251#endif /* _CONFIG_COBRA5272_H */