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Daniel Hellstroma2d96db2008-03-26 23:26:48 +01001/* Configuration header file for Gaisler GR-XC3S-1500
2 * spartan board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef __CONFIG_H__
30#define __CONFIG_H__
31
32/*
33 * High Level Configuration Options
34 * (easy to change)
35 */
36
37#define CONFIG_LEON3 /* This is an LEON3 CPU */
38#define CONFIG_LEON 1 /* This is an LEON CPU */
39#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
40
41/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020042#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010043
44/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010046
47/*
48 * Serial console configuration
49 */
50#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020051#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstroma2d96db2008-03-26 23:26:48 +010052
53/* Partitions */
54#define CONFIG_DOS_PARTITION
55#define CONFIG_MAC_PARTITION
56#define CONFIG_ISO_PARTITION
57
58/*
59 * Supported commands
60 */
61#include <config_cmd_default.h>
62
63#define CONFIG_CMD_REGINFO
64#define CONFIG_CMD_AMBAPP
65#define CONFIG_CMD_PING
66#define CONFIG_CMD_DIAG
67#define CONFIG_CMD_IRQ
68
69/*
70 * Autobooting
71 */
72#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
73
74#define CONFIG_PREBOOT "echo;" \
75 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
76 "echo"
77
78#undef CONFIG_BOOTARGS
79
80#define CONFIG_EXTRA_ENV_SETTINGS \
81 "netdev=eth0\0" \
82 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
83 "nfsroot=${serverip}:${rootpath}\0" \
84 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
85 "addip=setenv bootargs ${bootargs} " \
86 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
87 ":${hostname}:${netdev}:off panic=1\0" \
88 "flash_nfs=run nfsargs addip;" \
89 "bootm ${kernel_addr}\0" \
90 "flash_self=run ramargs addip;" \
91 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
92 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
93 "scratch=40200000\0" \
94 "getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
95 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
96 ""
97
98#define CONFIG_NETMASK 255.255.255.0
99#define CONFIG_GATEWAYIP 192.168.0.1
100#define CONFIG_SERVERIP 192.168.0.20
101#define CONFIG_IPADDR 192.168.0.206
102#define CONFIG_ROOTPATH /export/rootfs
103#define CONFIG_HOSTNAME grxc3s1500
104#define CONFIG_BOOTFILE /uImage
105
106#define CONFIG_BOOTCOMMAND "run flash_self"
107
108/* Memory MAP
109 *
110 * Flash:
111 * |--------------------------------|
112 * | 0x00000000 Text & Data & BSS | *
113 * | for Monitor | *
114 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
115 * | UNUSED / Growth | * 256kb
116 * |--------------------------------|
117 * | 0x00050000 Base custom area | *
118 * | kernel / FS | *
119 * | | * Rest of Flash
120 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
121 * | END-0x00008000 Environment | * 32kb
122 * |--------------------------------|
123 *
124 *
125 *
126 * Main Memory:
127 * |--------------------------------|
128 * | UNUSED / scratch area |
129 * | |
130 * | |
131 * | |
132 * | |
133 * |--------------------------------|
134 * | Monitor .Text / .DATA / .BSS | * 256kb
135 * | Relocated! | *
136 * |--------------------------------|
137 * | Monitor Malloc | * 128kb (contains relocated environment)
138 * |--------------------------------|
139 * | Monitor/kernel STACK | * 64kb
140 * |--------------------------------|
141 * | Page Table for MMU systems | * 2k
142 * |--------------------------------|
143 * | PROM Code accessed from Linux | * 6kb-128b
144 * |--------------------------------|
145 * | Global data (avail from kernel)| * 128b
146 * |--------------------------------|
147 *
148 */
149
150/*
151 * Flash configuration (8,16 or 32 MB)
152 * TEXT base always at 0xFFF00000
153 * ENV_ADDR always at 0xFFF40000
154 * FLASH_BASE at 0xFC000000 for 64 MB
155 * 0xFE000000 for 32 MB
156 * 0xFF000000 for 16 MB
157 * 0xFF800000 for 8 MB
158 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200159/*#define CONFIG_SYS_NO_FLASH 1*/
160#define CONFIG_SYS_FLASH_BASE 0x00000000
161#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100162
163#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200164#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
165#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100166
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200167#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
168#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
169#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
170#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
171#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100172
173/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200174#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200175#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200176#define CONFIG_SYS_FLASH_CFI
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100177/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200178#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100179/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200180#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100181
182/*
183 * Environment settings
184 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200185/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200186#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200187/* CONFIG_ENV_ADDR need to be at sector boundary */
188#define CONFIG_ENV_SIZE 0x8000
189#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200190#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100191#define CONFIG_ENV_OVERWRITE 1
192
193/*
194 * Memory map
195 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200196#define CONFIG_SYS_SDRAM_BASE 0x40000000
197#define CONFIG_SYS_SDRAM_SIZE 0x4000000
198#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100199
200/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200201#undef CONFIG_SYS_SRAM_BASE
202#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100203
204/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200205#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
206#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
207#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100208
Wolfgang Denk0191e472010-10-26 14:34:52 +0200209#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100210
Wolfgang Denk0191e472010-10-26 14:34:52 +0200211#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200212#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100213
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200214#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
215#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100216
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200217#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200218#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
219# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100220#endif
221
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200222#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
223#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
224#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100225
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200226#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
227#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100228
229/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200230#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
231#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100232
233/* make un relocated address from relocated address */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200234#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100235
236/*
237 * Ethernet configuration
238 */
239#define CONFIG_GRETH 1
240#define CONFIG_NET_MULTI 1
241
242/* Default GRETH Ethernet HARDWARE address */
243#define GRETH_HWADDR_0 0x00
244#define GRETH_HWADDR_1 0x00
245#define GRETH_HWADDR_2 0x7a
246#define GRETH_HWADDR_3 0xcc
247#define GRETH_HWADDR_4 0x00
248#define GRETH_HWADDR_5 0x12
249
250#define CONFIG_ETHADDR 00:00:7a:cc:00:12
251#define CONFIG_PHY_ADDR 0x00
252
253/*
254 * Miscellaneous configurable options
255 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200256#define CONFIG_SYS_LONGHELP /* undef to save memory */
257#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100258#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200259#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100260#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200261#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100262#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200263#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
264#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
265#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100266
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200267#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
268#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100269
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200270#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100271
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200272#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100273
274/*
275 * Various low-level settings
276 */
277
278/*-----------------------------------------------------------------------
279 * USB stuff
280 *-----------------------------------------------------------------------
281 */
282#define CONFIG_USB_CLOCK 0x0001BBBB
283#define CONFIG_USB_CONFIG 0x00005000
284
285/***** Gaisler GRLIB IP-Cores Config ********/
286
287/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200288/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100289
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200290#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100291
292/* See, GRLIB Docs (grip.pdf) on how to set up
293 * These the memory controller registers.
294 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200295#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
296#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
297#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100298
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200299#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
300#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
301#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100302
303/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200304#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100305
306/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200307#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
308#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100309
310/* Calculate scaler register value from default baudrate */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200311#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstroma2d96db2008-03-26 23:26:48 +0100312 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
313
314/* Identification string */
315#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"
316
317/* default kernel command line */
318#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
319
320#endif /* __CONFIG_H */