wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004, Psyent Corporation <www.psyent.com> |
| 3 | * Scott McNutt <smcnutt@psyent.com> |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 8 | #include <asm-offsets.h> |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 9 | #include <config.h> |
| 10 | #include <version.h> |
| 11 | |
Thomas Chou | 3982617 | 2015-10-09 20:09:17 +0800 | [diff] [blame] | 12 | /* |
| 13 | * icache and dcache configuration used only for start.S. |
| 14 | * the values are chosen so that it will work for all configuration. |
| 15 | */ |
| 16 | #define ICACHE_LINE_SIZE 32 /* fixed 32 */ |
| 17 | #define ICACHE_SIZE_MAX 0x10000 /* 64k max */ |
| 18 | #define DCACHE_LINE_SIZE_MIN 4 /* 4, 16, 32 */ |
| 19 | #define DCACHE_SIZE_MAX 0x10000 /* 64k max */ |
| 20 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 21 | /* RESTART */ |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 22 | .text |
Thomas Chou | 93f9646 | 2015-10-06 14:09:19 +0800 | [diff] [blame] | 23 | .global _start, _except_start, _except_end |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 24 | |
| 25 | _start: |
Thomas Chou | f144ae7 | 2010-04-20 11:01:11 +0800 | [diff] [blame] | 26 | wrctl status, r0 /* Disable interrupts */ |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 27 | /* |
| 28 | * ICACHE INIT -- only the icache line at the reset address |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 29 | * is invalidated at reset. So the init must stay within |
| 30 | * the cache line size (8 words). If GERMS is used, we'll |
| 31 | * just be invalidating the cache a second time. If cache |
| 32 | * is not implemented initi behaves as nop. |
| 33 | */ |
Thomas Chou | 3982617 | 2015-10-09 20:09:17 +0800 | [diff] [blame] | 34 | ori r4, r0, %lo(ICACHE_LINE_SIZE) |
| 35 | movhi r5, %hi(ICACHE_SIZE_MAX) |
| 36 | ori r5, r5, %lo(ICACHE_SIZE_MAX) |
Thomas Chou | f144ae7 | 2010-04-20 11:01:11 +0800 | [diff] [blame] | 37 | 0: initi r5 |
| 38 | sub r5, r5, r4 |
| 39 | bgt r5, r0, 0b |
wdenk | 194b839 | 2005-03-30 23:28:18 +0000 | [diff] [blame] | 40 | br _except_end /* Skip the tramp */ |
| 41 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 42 | /* |
| 43 | * EXCEPTION TRAMPOLINE -- the following gets copied |
wdenk | 194b839 | 2005-03-30 23:28:18 +0000 | [diff] [blame] | 44 | * to the exception address (below), but is otherwise at the |
| 45 | * default exception vector offset (0x0020). |
| 46 | */ |
| 47 | _except_start: |
| 48 | movhi et, %hi(_exception) |
| 49 | ori et, et, %lo(_exception) |
| 50 | jmp et |
| 51 | _except_end: |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 52 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 53 | /* |
| 54 | * INTERRUPTS -- for now, all interrupts masked and globally |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 55 | * disabled. |
| 56 | */ |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 57 | wrctl ienable, r0 /* All disabled */ |
| 58 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 59 | /* |
| 60 | * DCACHE INIT -- if dcache not implemented, initd behaves as |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 61 | * nop. |
| 62 | */ |
Thomas Chou | 3982617 | 2015-10-09 20:09:17 +0800 | [diff] [blame] | 63 | ori r4, r0, %lo(DCACHE_LINE_SIZE_MIN) |
| 64 | movhi r5, %hi(DCACHE_SIZE_MAX) |
| 65 | ori r5, r5, %lo(DCACHE_SIZE_MAX) |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 66 | mov r6, r0 |
| 67 | 1: initd 0(r6) |
| 68 | add r6, r6, r4 |
| 69 | bltu r6, r5, 1b |
| 70 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 71 | /* |
| 72 | * RELOCATE CODE, DATA & COMMAND TABLE -- the following code |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 73 | * assumes code, data and the command table are all |
| 74 | * contiguous. This lets us relocate everything as a single |
| 75 | * block. Make sure the linker script matches this ;-) |
| 76 | */ |
| 77 | nextpc r4 |
| 78 | _cur: movhi r5, %hi(_cur - _start) |
| 79 | ori r5, r5, %lo(_cur - _start) |
| 80 | sub r4, r4, r5 /* r4 <- cur _start */ |
| 81 | mov r8, r4 |
| 82 | movhi r5, %hi(_start) |
| 83 | ori r5, r5, %lo(_start) /* r5 <- linked _start */ |
Thomas Chou | 804a551 | 2015-11-03 13:47:02 +0800 | [diff] [blame] | 84 | mov sp, r5 /* initial stack below u-boot code */ |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 85 | beq r4, r5, 3f |
| 86 | |
Thomas Chou | f2bec0e | 2015-09-04 16:39:16 +0800 | [diff] [blame] | 87 | movhi r6, %hi(CONFIG_SYS_MONITOR_LEN) |
| 88 | ori r6, r6, %lo(CONFIG_SYS_MONITOR_LEN) |
| 89 | add r6, r6, r5 |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 90 | 2: ldwio r7, 0(r4) |
| 91 | addi r4, r4, 4 |
| 92 | stwio r7, 0(r5) |
| 93 | addi r5, r5, 4 |
| 94 | bne r5, r6, 2b |
| 95 | 3: |
| 96 | |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 97 | /* JUMP TO RELOC ADDR */ |
| 98 | movhi r4, %hi(_reloc) |
| 99 | ori r4, r4, %lo(_reloc) |
| 100 | jmp r4 |
| 101 | _reloc: |
| 102 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 103 | /* STACK INIT -- zero top two words for call back chain. */ |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 104 | addi sp, sp, -8 |
| 105 | stw r0, 0(sp) |
| 106 | stw r0, 4(sp) |
| 107 | mov fp, sp |
| 108 | |
Thomas Chou | c3c6ab1 | 2015-09-09 15:09:43 +0800 | [diff] [blame] | 109 | /* Allocate and zero GD, update SP */ |
| 110 | mov r4, sp |
| 111 | movhi r2, %hi(board_init_f_mem@h) |
| 112 | ori r2, r2, %lo(board_init_f_mem@h) |
| 113 | callr r2 |
| 114 | |
| 115 | /* Update stack- and frame-pointers */ |
| 116 | mov sp, r2 |
| 117 | mov fp, sp |
| 118 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 119 | /* Call board_init_f -- never returns */ |
Thomas Chou | cce3e75 | 2014-08-22 11:36:47 +0800 | [diff] [blame] | 120 | mov r4, r0 |
| 121 | movhi r2, %hi(board_init_f@h) |
| 122 | ori r2, r2, %lo(board_init_f@h) |
| 123 | callr r2 |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 124 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 125 | /* |
| 126 | * NEVER RETURNS -- but branch to the _start just |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 127 | * in case ;-) |
| 128 | */ |
| 129 | br _start |
| 130 | |
Thomas Chou | f8efd77 | 2015-10-06 10:12:59 +0800 | [diff] [blame] | 131 | /* |
| 132 | * relocate_code -- Nios2 handles the relocation above. But |
| 133 | * the generic board code monkeys with the heap, stack, etc. |
| 134 | * (it makes some assumptions that may not be appropriate |
| 135 | * for Nios). Nevertheless, we capitulate here. |
| 136 | * |
| 137 | * We'll call the board_init_r from here since this isn't |
| 138 | * supposed to return. |
| 139 | * |
| 140 | * void relocate_code (ulong sp, gd_t *global_data, |
| 141 | * ulong reloc_addr) |
| 142 | * __attribute__ ((noreturn)); |
| 143 | */ |
Thomas Chou | cce3e75 | 2014-08-22 11:36:47 +0800 | [diff] [blame] | 144 | .text |
| 145 | .global relocate_code |
| 146 | |
| 147 | relocate_code: |
| 148 | mov sp, r4 /* Set the new sp */ |
| 149 | mov r4, r5 |
Thomas Chou | fb731f2 | 2015-09-07 08:57:14 +0800 | [diff] [blame] | 150 | |
| 151 | /* |
| 152 | * ZERO BSS/SBSS -- bss and sbss are assumed to be adjacent |
| 153 | * and between __bss_start and __bss_end. |
| 154 | */ |
| 155 | movhi r5, %hi(__bss_start) |
| 156 | ori r5, r5, %lo(__bss_start) |
| 157 | movhi r6, %hi(__bss_end) |
| 158 | ori r6, r6, %lo(__bss_end) |
| 159 | beq r5, r6, 5f |
| 160 | |
Thomas Chou | 9e0cf7b | 2015-11-03 13:52:15 +0800 | [diff] [blame] | 161 | 4: stw r0, 0(r5) |
Thomas Chou | fb731f2 | 2015-09-07 08:57:14 +0800 | [diff] [blame] | 162 | addi r5, r5, 4 |
| 163 | bne r5, r6, 4b |
| 164 | 5: |
| 165 | |
Thomas Chou | cce3e75 | 2014-08-22 11:36:47 +0800 | [diff] [blame] | 166 | movhi r8, %hi(board_init_r@h) |
| 167 | ori r8, r8, %lo(board_init_r@h) |
| 168 | callr r8 |
| 169 | ret |