Marek Vasut | f85f6bf | 2017-05-13 15:57:32 +0200 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7796.c |
| 3 | * This file is r8a7796 processor support - PFC hardware block. |
| 4 | * |
| 5 | * Copyright (C) 2016 Renesas Electronics Corporation |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <sh_pfc.h> |
| 12 | #include <asm/gpio.h> |
| 13 | |
| 14 | #define CPU_32_PORT(fn, pfx, sfx) \ |
| 15 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ |
| 16 | PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ |
| 17 | PORT_1(fn, pfx##31, sfx) |
| 18 | |
| 19 | #define CPU_32_PORT1(fn, pfx, sfx) \ |
| 20 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ |
| 21 | PORT_10(fn, pfx##2, sfx) |
| 22 | |
| 23 | #define CPU_32_PORT2(fn, pfx, sfx) \ |
| 24 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ |
| 25 | PORT_10(fn, pfx##2, sfx) |
| 26 | |
| 27 | #define CPU_32_PORT_29(fn, pfx, sfx) \ |
| 28 | PORT_10(fn, pfx, sfx), \ |
| 29 | PORT_10(fn, pfx##1, sfx), \ |
| 30 | PORT_1(fn, pfx##20, sfx), \ |
| 31 | PORT_1(fn, pfx##21, sfx), \ |
| 32 | PORT_1(fn, pfx##22, sfx), \ |
| 33 | PORT_1(fn, pfx##23, sfx), \ |
| 34 | PORT_1(fn, pfx##24, sfx), \ |
| 35 | PORT_1(fn, pfx##25, sfx), \ |
| 36 | PORT_1(fn, pfx##26, sfx), \ |
| 37 | PORT_1(fn, pfx##27, sfx), \ |
| 38 | PORT_1(fn, pfx##28, sfx) |
| 39 | |
| 40 | #define CPU_32_PORT_26(fn, pfx, sfx) \ |
| 41 | PORT_10(fn, pfx, sfx), \ |
| 42 | PORT_10(fn, pfx##1, sfx), \ |
| 43 | PORT_1(fn, pfx##20, sfx), \ |
| 44 | PORT_1(fn, pfx##21, sfx), \ |
| 45 | PORT_1(fn, pfx##22, sfx), \ |
| 46 | PORT_1(fn, pfx##23, sfx), \ |
| 47 | PORT_1(fn, pfx##24, sfx), \ |
| 48 | PORT_1(fn, pfx##25, sfx) |
| 49 | |
| 50 | #define CPU_32_PORT_18(fn, pfx, sfx) \ |
| 51 | PORT_10(fn, pfx, sfx), \ |
| 52 | PORT_1(fn, pfx##10, sfx), \ |
| 53 | PORT_1(fn, pfx##11, sfx), \ |
| 54 | PORT_1(fn, pfx##12, sfx), \ |
| 55 | PORT_1(fn, pfx##13, sfx), \ |
| 56 | PORT_1(fn, pfx##14, sfx), \ |
| 57 | PORT_1(fn, pfx##15, sfx), \ |
| 58 | PORT_1(fn, pfx##16, sfx), \ |
| 59 | PORT_1(fn, pfx##17, sfx) |
| 60 | |
| 61 | #define CPU_32_PORT_16(fn, pfx, sfx) \ |
| 62 | PORT_10(fn, pfx, sfx), \ |
| 63 | PORT_1(fn, pfx##10, sfx), \ |
| 64 | PORT_1(fn, pfx##11, sfx), \ |
| 65 | PORT_1(fn, pfx##12, sfx), \ |
| 66 | PORT_1(fn, pfx##13, sfx), \ |
| 67 | PORT_1(fn, pfx##14, sfx), \ |
| 68 | PORT_1(fn, pfx##15, sfx) |
| 69 | |
| 70 | #define CPU_32_PORT_15(fn, pfx, sfx) \ |
| 71 | PORT_10(fn, pfx, sfx), \ |
| 72 | PORT_1(fn, pfx##10, sfx), \ |
| 73 | PORT_1(fn, pfx##11, sfx), \ |
| 74 | PORT_1(fn, pfx##12, sfx), \ |
| 75 | PORT_1(fn, pfx##13, sfx), \ |
| 76 | PORT_1(fn, pfx##14, sfx) |
| 77 | |
| 78 | #define CPU_32_PORT_4(fn, pfx, sfx) \ |
| 79 | PORT_1(fn, pfx##0, sfx), \ |
| 80 | PORT_1(fn, pfx##1, sfx), \ |
| 81 | PORT_1(fn, pfx##2, sfx), \ |
| 82 | PORT_1(fn, pfx##3, sfx) |
| 83 | |
| 84 | |
| 85 | /* --gen3-- */ |
| 86 | /* GP_0_0_DATA -> GP_7_4_DATA */ |
| 87 | /* except for GP0[16] - [31], |
| 88 | GP1[28] - [31], |
| 89 | GP2[15] - [31], |
| 90 | GP3[16] - [31], |
| 91 | GP4[18] - [31], |
| 92 | GP5[26] - [31], |
| 93 | GP7[4] - [31] */ |
| 94 | |
| 95 | #define CPU_ALL_PORT(fn, pfx, sfx) \ |
| 96 | CPU_32_PORT_16(fn, pfx##_0_, sfx), \ |
| 97 | CPU_32_PORT_29(fn, pfx##_1_, sfx), \ |
| 98 | CPU_32_PORT_15(fn, pfx##_2_, sfx), \ |
| 99 | CPU_32_PORT_16(fn, pfx##_3_, sfx), \ |
| 100 | CPU_32_PORT_18(fn, pfx##_4_, sfx), \ |
| 101 | CPU_32_PORT_26(fn, pfx##_5_, sfx), \ |
| 102 | CPU_32_PORT(fn, pfx##_6_, sfx), \ |
| 103 | CPU_32_PORT_4(fn, pfx##_7_, sfx) |
| 104 | |
| 105 | #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) |
| 106 | #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ |
| 107 | GP##pfx##_IN, GP##pfx##_OUT) |
| 108 | |
| 109 | #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT |
| 110 | #define _GP_INDT(pfx, sfx) GP##pfx##_DATA |
| 111 | |
| 112 | #define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) |
| 113 | #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) |
| 114 | #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) |
| 115 | |
| 116 | |
| 117 | #define PORT_10_REV(fn, pfx, sfx) \ |
| 118 | PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ |
| 119 | PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ |
| 120 | PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ |
| 121 | PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ |
| 122 | PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) |
| 123 | |
| 124 | #define CPU_32_PORT_REV(fn, pfx, sfx) \ |
| 125 | PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ |
| 126 | PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ |
| 127 | PORT_10_REV(fn, pfx, sfx) |
| 128 | |
| 129 | #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) |
| 130 | #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) |
| 131 | |
| 132 | #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) |
| 133 | #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ |
| 134 | FN_##ipsr, FN_##fn) |
| 135 | |
| 136 | enum { |
| 137 | PINMUX_RESERVED = 0, |
| 138 | |
| 139 | PINMUX_DATA_BEGIN, |
| 140 | GP_ALL(DATA), |
| 141 | PINMUX_DATA_END, |
| 142 | |
| 143 | PINMUX_INPUT_BEGIN, |
| 144 | GP_ALL(IN), |
| 145 | PINMUX_INPUT_END, |
| 146 | |
| 147 | PINMUX_OUTPUT_BEGIN, |
| 148 | GP_ALL(OUT), |
| 149 | PINMUX_OUTPUT_END, |
| 150 | |
| 151 | PINMUX_FUNCTION_BEGIN, |
| 152 | GP_ALL(FN), |
| 153 | |
| 154 | /* GPSR0 */ |
| 155 | GFN_D15, |
| 156 | GFN_D14, |
| 157 | GFN_D13, |
| 158 | GFN_D12, |
| 159 | GFN_D11, |
| 160 | GFN_D10, |
| 161 | GFN_D9, |
| 162 | GFN_D8, |
| 163 | GFN_D7, |
| 164 | GFN_D6, |
| 165 | GFN_D5, |
| 166 | GFN_D4, |
| 167 | GFN_D3, |
| 168 | GFN_D2, |
| 169 | GFN_D1, |
| 170 | GFN_D0, |
| 171 | |
| 172 | /* GPSR1 */ |
| 173 | GFN_CLKOUT, |
| 174 | GFN_EX_WAIT0_A, |
| 175 | GFN_WE1x, |
| 176 | GFN_WE0x, |
| 177 | GFN_RD_WRx, |
| 178 | GFN_RDx, |
| 179 | GFN_BSx, |
| 180 | GFN_CS1x_A26, |
| 181 | GFN_CS0x, |
| 182 | GFN_A19, |
| 183 | GFN_A18, |
| 184 | GFN_A17, |
| 185 | GFN_A16, |
| 186 | GFN_A15, |
| 187 | GFN_A14, |
| 188 | GFN_A13, |
| 189 | GFN_A12, |
| 190 | GFN_A11, |
| 191 | GFN_A10, |
| 192 | GFN_A9, |
| 193 | GFN_A8, |
| 194 | GFN_A7, |
| 195 | GFN_A6, |
| 196 | GFN_A5, |
| 197 | GFN_A4, |
| 198 | GFN_A3, |
| 199 | GFN_A2, |
| 200 | GFN_A1, |
| 201 | GFN_A0, |
| 202 | |
| 203 | /* GPSR2 */ |
| 204 | GFN_AVB_AVTP_CAPTURE_A, |
| 205 | GFN_AVB_AVTP_MATCH_A, |
| 206 | GFN_AVB_LINK, |
| 207 | GFN_AVB_PHY_INT, |
| 208 | GFN_AVB_MAGIC, |
| 209 | GFN_AVB_MDC, |
| 210 | GFN_PWM2_A, |
| 211 | GFN_PWM1_A, |
| 212 | GFN_PWM0, |
| 213 | GFN_IRQ5, |
| 214 | GFN_IRQ4, |
| 215 | GFN_IRQ3, |
| 216 | GFN_IRQ2, |
| 217 | GFN_IRQ1, |
| 218 | GFN_IRQ0, |
| 219 | |
| 220 | /* GPSR3 */ |
| 221 | GFN_SD1_WP, |
| 222 | GFN_SD1_CD, |
| 223 | GFN_SD0_WP, |
| 224 | GFN_SD0_CD, |
| 225 | GFN_SD1_DAT3, |
| 226 | GFN_SD1_DAT2, |
| 227 | GFN_SD1_DAT1, |
| 228 | GFN_SD1_DAT0, |
| 229 | GFN_SD1_CMD, |
| 230 | GFN_SD1_CLK, |
| 231 | GFN_SD0_DAT3, |
| 232 | GFN_SD0_DAT2, |
| 233 | GFN_SD0_DAT1, |
| 234 | GFN_SD0_DAT0, |
| 235 | GFN_SD0_CMD, |
| 236 | GFN_SD0_CLK, |
| 237 | |
| 238 | /* GPSR4 */ |
| 239 | GFN_SD3_DS, |
| 240 | GFN_SD3_DAT7, |
| 241 | GFN_SD3_DAT6, |
| 242 | GFN_SD3_DAT5, |
| 243 | GFN_SD3_DAT4, |
| 244 | FN_SD3_DAT3, |
| 245 | FN_SD3_DAT2, |
| 246 | FN_SD3_DAT1, |
| 247 | FN_SD3_DAT0, |
| 248 | FN_SD3_CMD, |
| 249 | FN_SD3_CLK, |
| 250 | GFN_SD2_DS, |
| 251 | GFN_SD2_DAT3, |
| 252 | GFN_SD2_DAT2, |
| 253 | GFN_SD2_DAT1, |
| 254 | GFN_SD2_DAT0, |
| 255 | FN_SD2_CMD, |
| 256 | GFN_SD2_CLK, |
| 257 | |
| 258 | /* GPSR5 */ |
| 259 | GFN_MLB_DAT, |
| 260 | GFN_MLB_SIG, |
| 261 | GFN_MLB_CLK, |
| 262 | FN_MSIOF0_RXD, |
| 263 | GFN_MSIOF0_SS2, |
| 264 | FN_MSIOF0_TXD, |
| 265 | GFN_MSIOF0_SS1, |
| 266 | GFN_MSIOF0_SYNC, |
| 267 | FN_MSIOF0_SCK, |
| 268 | GFN_HRTS0x, |
| 269 | GFN_HCTS0x, |
| 270 | GFN_HTX0, |
| 271 | GFN_HRX0, |
| 272 | GFN_HSCK0, |
| 273 | GFN_RX2_A, |
| 274 | GFN_TX2_A, |
| 275 | GFN_SCK2, |
| 276 | GFN_RTS1x_TANS, |
| 277 | GFN_CTS1x, |
| 278 | GFN_TX1_A, |
| 279 | GFN_RX1_A, |
| 280 | GFN_RTS0x_TANS, |
| 281 | GFN_CTS0x, |
| 282 | GFN_TX0, |
| 283 | GFN_RX0, |
| 284 | GFN_SCK0, |
| 285 | |
| 286 | /* GPSR6 */ |
| 287 | GFN_GP6_30, |
| 288 | GFN_GP6_31, |
| 289 | GFN_USB30_OVC, |
| 290 | GFN_USB30_PWEN, |
| 291 | GFN_USB1_OVC, |
| 292 | GFN_USB1_PWEN, |
| 293 | GFN_USB0_OVC, |
| 294 | GFN_USB0_PWEN, |
| 295 | GFN_AUDIO_CLKB_B, |
| 296 | GFN_AUDIO_CLKA_A, |
| 297 | GFN_SSI_SDATA9_A, |
| 298 | GFN_SSI_SDATA8, |
| 299 | GFN_SSI_SDATA7, |
| 300 | GFN_SSI_WS78, |
| 301 | GFN_SSI_SCK78, |
| 302 | GFN_SSI_SDATA6, |
| 303 | GFN_SSI_WS6, |
| 304 | GFN_SSI_SCK6, |
| 305 | FN_SSI_SDATA5, |
| 306 | FN_SSI_WS5, |
| 307 | FN_SSI_SCK5, |
| 308 | GFN_SSI_SDATA4, |
| 309 | GFN_SSI_WS4, |
| 310 | GFN_SSI_SCK4, |
| 311 | GFN_SSI_SDATA3, |
| 312 | GFN_SSI_WS34, |
| 313 | GFN_SSI_SCK34, |
| 314 | GFN_SSI_SDATA2_A, |
| 315 | GFN_SSI_SDATA1_A, |
| 316 | GFN_SSI_SDATA0, |
| 317 | GFN_SSI_WS01239, |
| 318 | GFN_SSI_SCK01239, |
| 319 | |
| 320 | /* GPSR7 */ |
| 321 | FN_HDMI1_CEC, |
| 322 | FN_HDMI0_CEC, |
| 323 | FN_AVS2, |
| 324 | FN_AVS1, |
| 325 | |
| 326 | /* IPSR0 */ |
| 327 | IFN_AVB_MDC, |
| 328 | FN_MSIOF2_SS2_C, |
| 329 | IFN_AVB_MAGIC, |
| 330 | FN_MSIOF2_SS1_C, |
| 331 | FN_SCK4_A, |
| 332 | IFN_AVB_PHY_INT, |
| 333 | FN_MSIOF2_SYNC_C, |
| 334 | FN_RX4_A, |
| 335 | IFN_AVB_LINK, |
| 336 | FN_MSIOF2_SCK_C, |
| 337 | FN_TX4_A, |
| 338 | IFN_AVB_AVTP_MATCH_A, |
| 339 | FN_MSIOF2_RXD_C, |
| 340 | FN_CTS4x_A, |
| 341 | IFN_AVB_AVTP_CAPTURE_A, |
| 342 | FN_MSIOF2_TXD_C, |
| 343 | FN_RTS4x_TANS_A, |
| 344 | IFN_IRQ0, |
| 345 | FN_QPOLB, |
| 346 | FN_DU_CDE, |
| 347 | FN_VI4_DATA0_B, |
| 348 | FN_CAN0_TX_B, |
| 349 | FN_CANFD0_TX_B, |
| 350 | FN_MSIOF3_SS2_E, |
| 351 | IFN_IRQ1, |
| 352 | FN_QPOLA, |
| 353 | FN_DU_DISP, |
| 354 | FN_VI4_DATA1_B, |
| 355 | FN_CAN0_RX_B, |
| 356 | FN_CANFD0_RX_B, |
| 357 | FN_MSIOF3_SS1_E, |
| 358 | |
| 359 | /* IPSR1 */ |
| 360 | IFN_IRQ2, |
| 361 | FN_QCPV_QDE, |
| 362 | FN_DU_EXODDF_DU_ODDF_DISP_CDE, |
| 363 | FN_VI4_DATA2_B, |
| 364 | FN_MSIOF3_SYNC_E, |
| 365 | FN_PWM3_B, |
| 366 | IFN_IRQ3, |
| 367 | FN_QSTVB_QVE, |
| 368 | FN_DU_DOTCLKOUT1, |
| 369 | FN_VI4_DATA3_B, |
| 370 | FN_MSIOF3_SCK_E, |
| 371 | FN_PWM4_B, |
| 372 | IFN_IRQ4, |
| 373 | FN_QSTH_QHS, |
| 374 | FN_DU_EXHSYNC_DU_HSYNC, |
| 375 | FN_VI4_DATA4_B, |
| 376 | FN_MSIOF3_RXD_E, |
| 377 | FN_PWM5_B, |
| 378 | IFN_IRQ5, |
| 379 | FN_QSTB_QHE, |
| 380 | FN_DU_EXVSYNC_DU_VSYNC, |
| 381 | FN_VI4_DATA5_B, |
| 382 | FN_MSIOF3_TXD_E, |
| 383 | FN_PWM6_B, |
| 384 | IFN_PWM0, |
| 385 | FN_AVB_AVTP_PPS, |
| 386 | FN_VI4_DATA6_B, |
| 387 | FN_IECLK_B, |
| 388 | IFN_PWM1_A, |
| 389 | FN_HRX3_D, |
| 390 | FN_VI4_DATA7_B, |
| 391 | FN_IERX_B, |
| 392 | IFN_PWM2_A, |
| 393 | FN_PWMFSW0, |
| 394 | FN_HTX3_D, |
| 395 | FN_IETX_B, |
| 396 | IFN_A0, |
| 397 | FN_LCDOUT16, |
| 398 | FN_MSIOF3_SYNC_B, |
| 399 | FN_VI4_DATA8, |
| 400 | FN_DU_DB0, |
| 401 | FN_PWM3_A, |
| 402 | |
| 403 | /* IPSR2 */ |
| 404 | IFN_A1, |
| 405 | FN_LCDOUT17, |
| 406 | FN_MSIOF3_TXD_B, |
| 407 | FN_VI4_DATA9, |
| 408 | FN_DU_DB1, |
| 409 | FN_PWM4_A, |
| 410 | IFN_A2, |
| 411 | FN_LCDOUT18, |
| 412 | FN_MSIOF3_SCK_B, |
| 413 | FN_VI4_DATA10, |
| 414 | FN_DU_DB2, |
| 415 | FN_PWM5_A, |
| 416 | IFN_A3, |
| 417 | FN_LCDOUT19, |
| 418 | FN_MSIOF3_RXD_B, |
| 419 | FN_VI4_DATA11, |
| 420 | FN_DU_DB3, |
| 421 | FN_PWM6_A, |
| 422 | IFN_A4, |
| 423 | FN_LCDOUT20, |
| 424 | FN_MSIOF3_SS1_B, |
| 425 | FN_VI4_DATA12, |
| 426 | FN_VI5_DATA12, |
| 427 | FN_DU_DB4, |
| 428 | IFN_A5, |
| 429 | FN_LCDOUT21, |
| 430 | FN_MSIOF3_SS2_B, |
| 431 | FN_SCK4_B, |
| 432 | FN_VI4_DATA13, |
| 433 | FN_VI5_DATA13, |
| 434 | FN_DU_DB5, |
| 435 | IFN_A6, |
| 436 | FN_LCDOUT22, |
| 437 | FN_MSIOF2_SS1_A, |
| 438 | FN_RX4_B, |
| 439 | FN_VI4_DATA14, |
| 440 | FN_VI5_DATA14, |
| 441 | FN_DU_DB6, |
| 442 | IFN_A7, |
| 443 | FN_LCDOUT23, |
| 444 | FN_MSIOF2_SS2_A, |
| 445 | FN_TX4_B, |
| 446 | FN_VI4_DATA15, |
| 447 | FN_V15_DATA15, |
| 448 | FN_DU_DB7, |
| 449 | IFN_A8, |
| 450 | FN_RX3_B, |
| 451 | FN_MSIOF2_SYNC_A, |
| 452 | FN_HRX4_B, |
| 453 | FN_SDA6_A, |
| 454 | FN_AVB_AVTP_MATCH_B, |
| 455 | FN_PWM1_B, |
| 456 | |
| 457 | /* IPSR3 */ |
| 458 | IFN_A9, |
| 459 | FN_MSIOF2_SCK_A, |
| 460 | FN_CTS4x_B, |
| 461 | FN_VI5_VSYNCx, |
| 462 | IFN_A10, |
| 463 | FN_MSIOF2_RXD_A, |
| 464 | FN_RTS4n_TANS_B, |
| 465 | FN_VI5_HSYNCx, |
| 466 | IFN_A11, |
| 467 | FN_TX3_B, |
| 468 | FN_MSIOF2_TXD_A, |
| 469 | FN_HTX4_B, |
| 470 | FN_HSCK4, |
| 471 | FN_VI5_FIELD, |
| 472 | FN_SCL6_A, |
| 473 | FN_AVB_AVTP_CAPTURE_B, |
| 474 | FN_PWM2_B, |
| 475 | FN_SPV_EVEN, |
| 476 | IFN_A12, |
| 477 | FN_LCDOUT12, |
| 478 | FN_MSIOF3_SCK_C, |
| 479 | FN_HRX4_A, |
| 480 | FN_VI5_DATA8, |
| 481 | FN_DU_DG4, |
| 482 | IFN_A13, |
| 483 | FN_LCDOUT13, |
| 484 | FN_MSIOF3_SYNC_C, |
| 485 | FN_HTX4_A, |
| 486 | FN_VI5_DATA9, |
| 487 | FN_DU_DG5, |
| 488 | IFN_A14, |
| 489 | FN_LCDOUT14, |
| 490 | FN_MSIOF3_RXD_C, |
| 491 | FN_HCTS4x, |
| 492 | FN_VI5_DATA10, |
| 493 | FN_DU_DG6, |
| 494 | IFN_A15, |
| 495 | FN_LCDOUT15, |
| 496 | FN_MSIOF3_TXD_C, |
| 497 | FN_HRTS4x, |
| 498 | FN_VI5_DATA11, |
| 499 | FN_DU_DG7, |
| 500 | IFN_A16, |
| 501 | FN_LCDOUT8, |
| 502 | FN_VI4_FIELD, |
| 503 | FN_DU_DG0, |
| 504 | |
| 505 | /* IPSR4 */ |
| 506 | IFN_A17, |
| 507 | FN_LCDOUT9, |
| 508 | FN_VI4_VSYNCx, |
| 509 | FN_DU_DG1, |
| 510 | IFN_A18, |
| 511 | FN_LCDOUT10, |
| 512 | FN_VI4_HSYNCx, |
| 513 | FN_DU_DG2, |
| 514 | IFN_A19, |
| 515 | FN_LCDOUT11, |
| 516 | FN_VI4_CLKENB, |
| 517 | FN_DU_DG3, |
| 518 | IFN_CS0x, |
| 519 | FN_VI5_CLKENB, |
| 520 | IFN_CS1x_A26, |
| 521 | FN_VI5_CLK, |
| 522 | FN_EX_WAIT0_B, |
| 523 | IFN_BSx, |
| 524 | FN_QSTVA_QVS, |
| 525 | FN_MSIOF3_SCK_D, |
| 526 | FN_SCK3, |
| 527 | FN_HSCK3, |
| 528 | FN_CAN1_TX, |
| 529 | FN_CANFD1_TX, |
| 530 | FN_IETX_A, |
| 531 | IFN_RDx, |
| 532 | FN_MSIOF3_SYNC_D, |
| 533 | FN_RX3_A, |
| 534 | FN_HRX3_A, |
| 535 | FN_CAN0_TX_A, |
| 536 | FN_CANFD0_TX_A, |
| 537 | IFN_RD_WRx, |
| 538 | FN_MSIOF3_RXD_D, |
| 539 | FN_TX3_A, |
| 540 | FN_HTX3_A, |
| 541 | FN_CAN0_RX_A, |
| 542 | FN_CANFD0_RX_A, |
| 543 | |
| 544 | /* IPSR5 */ |
| 545 | IFN_WE0x, |
| 546 | FN_MSIIOF3_TXD_D, |
| 547 | FN_CTS3x, |
| 548 | FN_HCTS3x, |
| 549 | FN_SCL6_B, |
| 550 | FN_CAN_CLK, |
| 551 | FN_IECLK_A, |
| 552 | IFN_WE1x, |
| 553 | FN_MSIOF3_SS1_D, |
| 554 | FN_RTS3x_TANS, |
| 555 | FN_HRTS3x, |
| 556 | FN_SDA6_B, |
| 557 | FN_CAN1_RX, |
| 558 | FN_CANFD1_RX, |
| 559 | FN_IERX_A, |
| 560 | IFN_EX_WAIT0_A, |
| 561 | FN_QCLK, |
| 562 | FN_VI4_CLK, |
| 563 | FN_DU_DOTCLKOUT0, |
| 564 | IFN_D0, |
| 565 | FN_MSIOF2_SS1_B, |
| 566 | FN_MSIOF3_SCK_A, |
| 567 | FN_VI4_DATA16, |
| 568 | FN_VI5_DATA0, |
| 569 | IFN_D1, |
| 570 | FN_MSIOF2_SS2_B, |
| 571 | FN_MSIOF3_SYNC_A, |
| 572 | FN_VI4_DATA17, |
| 573 | FN_VI5_DATA1, |
| 574 | IFN_D2, |
| 575 | FN_MSIOF3_RXD_A, |
| 576 | FN_VI4_DATA18, |
| 577 | FN_VI5_DATA2, |
| 578 | IFN_D3, |
| 579 | FN_MSIOF3_TXD_A, |
| 580 | FN_VI4_DATA19, |
| 581 | FN_VI5_DATA3, |
| 582 | IFN_D4, |
| 583 | FN_MSIOF2_SCK_B, |
| 584 | FN_VI4_DATA20, |
| 585 | FN_VI5_DATA4, |
| 586 | |
| 587 | /* IPSR6 */ |
| 588 | IFN_D5, |
| 589 | FN_MSIOF2_SYNC_B, |
| 590 | FN_VI4_DATA21, |
| 591 | FN_VI5_DATA5, |
| 592 | IFN_D6, |
| 593 | FN_MSIOF2_RXD_B, |
| 594 | FN_VI4_DATA22, |
| 595 | FN_VI5_DATA6, |
| 596 | IFN_D7, |
| 597 | FN_MSIOF2_TXD_B, |
| 598 | FN_VI4_DATA23, |
| 599 | FN_VI5_DATA7, |
| 600 | IFN_D8, |
| 601 | FN_LCDOUT0, |
| 602 | FN_MSIOF2_SCK_D, |
| 603 | FN_SCK4_C, |
| 604 | FN_VI4_DATA0_A, |
| 605 | FN_DU_DR0, |
| 606 | IFN_D9, |
| 607 | FN_LCDOUT1, |
| 608 | FN_MSIOF2_SYNC_D, |
| 609 | FN_VI4_DATA1_A, |
| 610 | FN_DU_DR1, |
| 611 | IFN_D10, |
| 612 | FN_LCDOUT2, |
| 613 | FN_MSIOF2_RXD_D, |
| 614 | FN_HRX3_B, |
| 615 | FN_VI4_DATA2_A, |
| 616 | FN_CTS4x_C, |
| 617 | FN_DU_DR2, |
| 618 | IFN_D11, |
| 619 | FN_LCDOUT3, |
| 620 | FN_MSIOF2_TXD_D, |
| 621 | FN_HTX3_B, |
| 622 | FN_VI4_DATA3_A, |
| 623 | FN_RTS4x_TANS_C, |
| 624 | FN_DU_DR3, |
| 625 | IFN_D12, |
| 626 | FN_LCDOUT4, |
| 627 | FN_MSIOF2_SS1_D, |
| 628 | FN_RX4_C, |
| 629 | FN_VI4_DATA4_A, |
| 630 | FN_DU_DR4, |
| 631 | |
| 632 | /* IPSR7 */ |
| 633 | IFN_D13, |
| 634 | FN_LCDOUT5, |
| 635 | FN_MSIOF2_SS2_D, |
| 636 | FN_TX4_C, |
| 637 | FN_VI4_DATA5_A, |
| 638 | FN_DU_DR5, |
| 639 | IFN_D14, |
| 640 | FN_LCDOUT6, |
| 641 | FN_MSIOF3_SS1_A, |
| 642 | FN_HRX3_C, |
| 643 | FN_VI4_DATA6_A, |
| 644 | FN_DU_DR6, |
| 645 | FN_SCL6_C, |
| 646 | IFN_D15, |
| 647 | FN_LCDOUT7, |
| 648 | FN_MSIOF3_SS2_A, |
| 649 | FN_HTX3_C, |
| 650 | FN_VI4_DATA7_A, |
| 651 | FN_DU_DR7, |
| 652 | FN_SDA6_C, |
| 653 | FN_FSCLKST, |
| 654 | IFN_SD0_CLK, |
| 655 | FN_MSIOF1_SCK_E, |
| 656 | FN_STP_OPWM_0_B, |
| 657 | IFN_SD0_CMD, |
| 658 | FN_MSIOF1_SYNC_E, |
| 659 | FN_STP_IVCXO27_0_B, |
| 660 | IFN_SD0_DAT0, |
| 661 | FN_MSIOF1_RXD_E, |
| 662 | FN_TS_SCK0_B, |
| 663 | FN_STP_ISCLK_0_B, |
| 664 | IFN_SD0_DAT1, |
| 665 | FN_MSIOF1_TXD_E, |
| 666 | FN_TS_SPSYNC0_B, |
| 667 | FN_STP_ISSYNC_0_B, |
| 668 | |
| 669 | /* IPSR8 */ |
| 670 | IFN_SD0_DAT2, |
| 671 | FN_MSIOF1_SS1_E, |
| 672 | FN_TS_SDAT0_B, |
| 673 | FN_STP_ISD_0_B, |
| 674 | |
| 675 | IFN_SD0_DAT3, |
| 676 | FN_MSIOF1_SS2_E, |
| 677 | FN_TS_SDEN0_B, |
| 678 | FN_STP_ISEN_0_B, |
| 679 | |
| 680 | IFN_SD1_CLK, |
| 681 | FN_MSIOF1_SCK_G, |
| 682 | FN_SIM0_CLK_A, |
| 683 | |
| 684 | IFN_SD1_CMD, |
| 685 | FN_MSIOF1_SYNC_G, |
| 686 | FN_NFCEx_B, |
| 687 | FN_SIM0_D_A, |
| 688 | FN_STP_IVCXO27_1_B, |
| 689 | |
| 690 | IFN_SD1_DAT0, |
| 691 | FN_SD2_DAT4, |
| 692 | FN_MSIOF1_RXD_G, |
| 693 | FN_NFWPx_B, |
| 694 | FN_TS_SCK1_B, |
| 695 | FN_STP_ISCLK_1_B, |
| 696 | |
| 697 | IFN_SD1_DAT1, |
| 698 | FN_SD2_DAT5, |
| 699 | FN_MSIOF1_TXD_G, |
| 700 | FN_NFDATA14_B, |
| 701 | FN_TS_SPSYNC1_B, |
| 702 | FN_STP_ISSYNC_1_B, |
| 703 | |
| 704 | IFN_SD1_DAT2, |
| 705 | FN_SD2_DAT6, |
| 706 | FN_MSIOF1_SS1_G, |
| 707 | FN_NFDATA15_B, |
| 708 | FN_TS_SDAT1_B, |
| 709 | FN_STP_IOD_1_B, |
| 710 | |
| 711 | IFN_SD1_DAT3, |
| 712 | FN_SD2_DAT7, |
| 713 | FN_MSIOF1_SS2_G, |
| 714 | FN_NFRBx_B, |
| 715 | FN_TS_SDEN1_B, |
| 716 | FN_STP_ISEN_1_B, |
| 717 | |
| 718 | /* IPSR9 */ |
| 719 | IFN_SD2_CLK, |
| 720 | FN_NFDATA8, |
| 721 | |
| 722 | IFN_SD2_CMD, |
| 723 | FN_NFDATA9, |
| 724 | |
| 725 | IFN_SD2_DAT0, |
| 726 | FN_NFDATA10, |
| 727 | |
| 728 | IFN_SD2_DAT1, |
| 729 | FN_NFDATA11, |
| 730 | |
| 731 | IFN_SD2_DAT2, |
| 732 | FN_NFDATA12, |
| 733 | |
| 734 | IFN_SD2_DAT3, |
| 735 | FN_NFDATA13, |
| 736 | |
| 737 | IFN_SD2_DS, |
| 738 | FN_NFALE, |
| 739 | |
| 740 | IFN_SD3_CLK, |
| 741 | FN_NFWEx, |
| 742 | |
| 743 | /* IPSR10 */ |
| 744 | IFN_SD3_CMD, |
| 745 | FN_NFREx, |
| 746 | |
| 747 | IFN_SD3_DAT0, |
| 748 | FN_NFDATA0, |
| 749 | |
| 750 | IFN_SD3_DAT1, |
| 751 | FN_NFDATA1, |
| 752 | |
| 753 | IFN_SD3_DAT2, |
| 754 | FN_NFDATA2, |
| 755 | |
| 756 | IFN_SD3_DAT3, |
| 757 | FN_NFDATA3, |
| 758 | |
| 759 | IFN_SD3_DAT4, |
| 760 | FN_SD2_CD_A, |
| 761 | FN_NFDATA4, |
| 762 | |
| 763 | IFN_SD3_DAT5, |
| 764 | FN_SD2_WP_A, |
| 765 | FN_NFDATA5, |
| 766 | |
| 767 | IFN_SD3_DAT6, |
| 768 | FN_SD3_CD, |
| 769 | FN_NFDATA6, |
| 770 | |
| 771 | /* IPSR11 */ |
| 772 | IFN_SD3_DAT7, |
| 773 | FN_SD3_WP, |
| 774 | FN_NFDATA7, |
| 775 | |
| 776 | IFN_SD3_DS, |
| 777 | FN_NFCLE, |
| 778 | |
| 779 | IFN_SD0_CD, |
| 780 | FN_NFDATA14_A, |
| 781 | FN_SCL2_B, |
| 782 | FN_SIM0_RST_A, |
| 783 | |
| 784 | IFN_SD0_WP, |
| 785 | FN_NFDATA15_A, |
| 786 | FN_SDA2_B, |
| 787 | |
| 788 | IFN_SD1_CD, |
| 789 | FN_NFRBx_A, |
| 790 | FN_SIM0_CLK_B, |
| 791 | |
| 792 | IFN_SD1_WP, |
| 793 | FN_NFCEx_A, |
| 794 | FN_SIM0_D_B, |
| 795 | |
| 796 | IFN_SCK0, |
| 797 | FN_HSCK1_B, |
| 798 | FN_MSIOF1_SS2_B, |
| 799 | FN_AUDIO_CLKC_B, |
| 800 | FN_SDA2_A, |
| 801 | FN_SIM0_RST_B, |
| 802 | FN_STP_OPWM_0_C, |
| 803 | FN_RIF0_CLK_B, |
| 804 | FN_ADICHS2, |
| 805 | FN_SCK5_B, |
| 806 | |
| 807 | IFN_RX0, |
| 808 | FN_HRX1_B, |
| 809 | FN_TS_SCK0_C, |
| 810 | FN_STP_ISCLK_0_C, |
| 811 | FN_RIF0_D0_B, |
| 812 | |
| 813 | /* IPSR12 */ |
| 814 | IFN_TX0, |
| 815 | FN_HTX1_B, |
| 816 | FN_TS_SPSYNC0_C, |
| 817 | FN_STP_ISSYNC_0_C, |
| 818 | FN_RIF0_D1_B, |
| 819 | |
| 820 | IFN_CTS0x, |
| 821 | FN_HCTS1x_B, |
| 822 | FN_MSIOF1_SYNC_B, |
| 823 | FN_TS_SPSYNC1_C, |
| 824 | FN_STP_ISSYNC_1_C, |
| 825 | FN_RIF1_SYNC_B, |
| 826 | FN_AUDIO_CLKOUT_C, |
| 827 | FN_ADICS_SAMP, |
| 828 | |
| 829 | IFN_RTS0x_TANS, |
| 830 | FN_HRTS1x_B, |
| 831 | FN_MSIOF1_SS1_B, |
| 832 | FN_AUDIO_CLKA_B, |
| 833 | FN_SCL2_A, |
| 834 | FN_STP_IVCXO27_1_C, |
| 835 | FN_RIF0_SYNC_B, |
| 836 | FN_ADICHS1, |
| 837 | |
| 838 | IFN_RX1_A, |
| 839 | FN_HRX1_A, |
| 840 | FN_TS_SDAT0_C, |
| 841 | FN_STP_ISD_0_C, |
| 842 | FN_RIF1_CLK_C, |
| 843 | |
| 844 | IFN_TX1_A, |
| 845 | FN_HTX1_A, |
| 846 | FN_TS_SDEN0_C, |
| 847 | FN_STP_ISEN_0_C, |
| 848 | FN_RIF1_D0_C, |
| 849 | |
| 850 | IFN_CTS1x, |
| 851 | FN_HCTS1x_A, |
| 852 | FN_MSIOF1_RXD_B, |
| 853 | FN_TS_SDEN1_C, |
| 854 | FN_STP_ISEN_1_C, |
| 855 | FN_RIF1_D0_B, |
| 856 | FN_ADIDATA, |
| 857 | |
| 858 | IFN_RTS1x_TANS, |
| 859 | FN_HRTS1x_A, |
| 860 | FN_MSIOF1_TXD_B, |
| 861 | FN_TS_SDAT1_C, |
| 862 | FN_STP_ISD_1_C, |
| 863 | FN_RIF1_D1_B, |
| 864 | FN_ADICHS0, |
| 865 | |
| 866 | IFN_SCK2, |
| 867 | FN_SCIF_CLK_B, |
| 868 | FN_MSIOF1_SCK_B, |
| 869 | FN_TS_SCK1_C, |
| 870 | FN_STP_ISCLK_1_C, |
| 871 | FN_RIF1_CLK_B, |
| 872 | FN_ADICLK, |
| 873 | |
| 874 | /* IPSR13 */ |
| 875 | IFN_TX2_A, |
| 876 | FN_SD2_CD_B, |
| 877 | FN_SCL1_A, |
| 878 | FN_FMCLK_A, |
| 879 | FN_RIF1_D1_C, |
| 880 | FN_FSO_CFE_0_B, |
| 881 | |
| 882 | IFN_RX2_A, |
| 883 | FN_SD2_WP_B, |
| 884 | FN_SDA1_A, |
| 885 | FN_FMIN_A, |
| 886 | FN_RIF1_SYNC_C, |
| 887 | FN_FSO_CEF_1_B, |
| 888 | |
| 889 | IFN_HSCK0, |
| 890 | FN_MSIOF1_SCK_D, |
| 891 | FN_AUDIO_CLKB_A, |
| 892 | FN_SSI_SDATA1_B, |
| 893 | FN_TS_SCK0_D, |
| 894 | FN_STP_ISCLK_0_D, |
| 895 | FN_RIF0_CLK_C, |
| 896 | FN_RX5_B, |
| 897 | |
| 898 | IFN_HRX0, |
| 899 | FN_MSIOF1_RXD_D, |
| 900 | FN_SS1_SDATA2_B, |
| 901 | FN_TS_SDEN0_D, |
| 902 | FN_STP_ISEN_0_D, |
| 903 | FN_RIF0_D0_C, |
| 904 | |
| 905 | IFN_HTX0, |
| 906 | FN_MSIOF1_TXD_D, |
| 907 | FN_SSI_SDATA9_B, |
| 908 | FN_TS_SDAT0_D, |
| 909 | FN_STP_ISD_0_D, |
| 910 | FN_RIF0_D1_C, |
| 911 | |
| 912 | IFN_HCTS0x, |
| 913 | FN_RX2_B, |
| 914 | FN_MSIOF1_SYNC_D, |
| 915 | FN_SSI_SCK9_A, |
| 916 | FN_TS_SPSYNC0_D, |
| 917 | FN_STP_ISSYNC_0_D, |
| 918 | FN_RIF0_SYNC_C, |
| 919 | FN_AUDIO_CLKOUT1_A, |
| 920 | |
| 921 | IFN_HRTS0x, |
| 922 | FN_TX2_B, |
| 923 | FN_MSIOF1_SS1_D, |
| 924 | FN_SSI_WS9_A, |
| 925 | FN_STP_IVCXO27_0_D, |
| 926 | FN_BPFCLK_A, |
| 927 | FN_AUDIO_CLKOUT2_A, |
| 928 | |
| 929 | IFN_MSIOF0_SYNC, |
| 930 | FN_AUDIO_CLKOUT_A, |
| 931 | FN_TX5_B, |
| 932 | FN_BPFCLK_D, |
| 933 | |
| 934 | /* IPSR14 */ |
| 935 | IFN_MSIOF0_SS1, |
| 936 | FN_RX5_A, |
| 937 | FN_NFWPx_A, |
| 938 | FN_AUDIO_CLKA_C, |
| 939 | FN_SSI_SCK2_A, |
| 940 | FN_STP_IVCXO27_0_C, |
| 941 | FN_AUDIO_CLKOUT3_A, |
| 942 | FN_TCLK1_B, |
| 943 | |
| 944 | IFN_MSIOF0_SS2, |
| 945 | FN_TX5_A, |
| 946 | FN_MSIOF1_SS2_D, |
| 947 | FN_AUDIO_CLKC_A, |
| 948 | FN_SSI_WS2_A, |
| 949 | FN_STP_OPWM_0_D, |
| 950 | FN_AUDIO_CLKOUT_D, |
| 951 | FN_SPEEDIN_B, |
| 952 | |
| 953 | IFN_MLB_CLK, |
| 954 | FN_MSIOF1_SCK_F, |
| 955 | FN_SCL1_B, |
| 956 | |
| 957 | IFN_MLB_SIG, |
| 958 | FN_RX1_B, |
| 959 | FN_MSIOF1_SYNC_F, |
| 960 | FN_SDA1_B, |
| 961 | |
| 962 | IFN_MLB_DAT, |
| 963 | FN_TX1_B, |
| 964 | FN_MSIOF1_RXD_F, |
| 965 | |
| 966 | IFN_SSI_SCK0129, |
| 967 | FN_MSIOF1_TXD_F, |
| 968 | FN_MOUT0, |
| 969 | |
| 970 | IFN_SSI_WS0129, |
| 971 | FN_MSIOF1_SS1_F, |
| 972 | FN_MOUT1, |
| 973 | |
| 974 | IFN_SSI_SDATA0, |
| 975 | FN_MSIOF1_SS2_F, |
| 976 | FN_MOUT2, |
| 977 | |
| 978 | /* IPSR15 */ |
| 979 | IFN_SSI_SDATA1_A, |
| 980 | FN_MOUT5, |
| 981 | |
| 982 | IFN_SSI_SDATA2_A, |
| 983 | FN_SSI_SCK1_B, |
| 984 | FN_MOUT6, |
| 985 | |
| 986 | IFN_SSI_SCK34, |
| 987 | FN_MSIOF1_SS1_A, |
| 988 | FN_STP_OPWM_0_A, |
| 989 | |
| 990 | IFN_SSI_WS34, |
| 991 | FN_HCTS2x_A, |
| 992 | FN_MSIOF1_SS2_A, |
| 993 | FN_STP_IVCXO27_0_A, |
| 994 | |
| 995 | IFN_SSI_SDATA3, |
| 996 | FN_HRTS2x_A, |
| 997 | FN_MSIOF1_TXD_A, |
| 998 | FN_TS_SCK0_A, |
| 999 | FN_STP_ISCLK_0_A, |
| 1000 | FN_RIF0_D1_A, |
| 1001 | FN_RIF2_D0_A, |
| 1002 | |
| 1003 | IFN_SSI_SCK4, |
| 1004 | FN_HRX2_A, |
| 1005 | FN_MSIOF1_SCK_A, |
| 1006 | FN_TS_SDAT0_A, |
| 1007 | FN_STP_ISD_0_A, |
| 1008 | FN_RIF0_CLK_A, |
| 1009 | FN_RIF2_CLK_A, |
| 1010 | |
| 1011 | IFN_SSI_WS4, |
| 1012 | FN_HTX2_A, |
| 1013 | FN_MSIOF1_SYNC_A, |
| 1014 | FN_TS_SDEN0_A, |
| 1015 | FN_STP_ISEN_0_A, |
| 1016 | FN_RIF0_SYNC_A, |
| 1017 | FN_RIF2_SYNC_A, |
| 1018 | |
| 1019 | IFN_SSI_SDATA4, |
| 1020 | FN_HSCK2_A, |
| 1021 | FN_MSIOF1_RXD_A, |
| 1022 | FN_TS_SPSYNC0_A, |
| 1023 | FN_STP_ISSYNC_0_A, |
| 1024 | FN_RIF0_D0_A, |
| 1025 | FN_RIF2_D1_A, |
| 1026 | |
| 1027 | /* IPSR16 */ |
| 1028 | IFN_SSI_SCK6, |
| 1029 | FN_SIM0_RST_D, |
| 1030 | FN_FSO_TOE_A, |
| 1031 | |
| 1032 | IFN_SSI_WS6, |
| 1033 | FN_SIM0_D_D, |
| 1034 | |
| 1035 | IFN_SSI_SDATA6, |
| 1036 | FN_SIM0_CLK_D, |
| 1037 | |
| 1038 | IFN_SSI_SCK78, |
| 1039 | FN_HRX2_B, |
| 1040 | FN_MSIOF1_SCK_C, |
| 1041 | FN_TS_SCK1_A, |
| 1042 | FN_STP_ISCLK_1_A, |
| 1043 | FN_RIF1_CLK_A, |
| 1044 | FN_RIF3_CLK_A, |
| 1045 | |
| 1046 | IFN_SSI_WS78, |
| 1047 | FN_HTX2_B, |
| 1048 | FN_MSIOF1_SYNC_C, |
| 1049 | FN_TS_SDAT1_A, |
| 1050 | FN_STP_ISD_1_A, |
| 1051 | FN_RIF1_SYNC_A, |
| 1052 | FN_RIF3_SYNC_A, |
| 1053 | |
| 1054 | IFN_SSI_SDATA7, |
| 1055 | FN_HCTS2x_B, |
| 1056 | FN_MSIOF1_RXD_C, |
| 1057 | FN_TS_SDEN1_A, |
| 1058 | FN_STP_IEN_1_A, |
| 1059 | FN_RIF1_D0_A, |
| 1060 | FN_RIF3_D0_A, |
| 1061 | FN_TCLK2_A, |
| 1062 | |
| 1063 | IFN_SSI_SDATA8, |
| 1064 | FN_HRTS2x_B, |
| 1065 | FN_MSIOF1_TXD_C, |
| 1066 | FN_TS_SPSYNC1_A, |
| 1067 | FN_STP_ISSYNC_1_A, |
| 1068 | FN_RIF1_D1_A, |
| 1069 | FN_EIF3_D1_A, |
| 1070 | |
| 1071 | IFN_SSI_SDATA9_A, |
| 1072 | FN_HSCK2_B, |
| 1073 | FN_MSIOF1_SS1_C, |
| 1074 | FN_HSCK1_A, |
| 1075 | FN_SSI_WS1_B, |
| 1076 | FN_SCK1, |
| 1077 | FN_STP_IVCXO27_1_A, |
| 1078 | FN_SCK5, |
| 1079 | |
| 1080 | /* IPSR17 */ |
| 1081 | IFN_AUDIO_CLKA_A, |
| 1082 | FN_CC5_OSCOUT, |
| 1083 | |
| 1084 | IFN_AUDIO_CLKB_B, |
| 1085 | FN_SCIF_CLK_A, |
| 1086 | FN_STP_IVCXO27_1_D, |
| 1087 | FN_REMOCON_A, |
| 1088 | FN_TCLK1_A, |
| 1089 | |
| 1090 | IFN_USB0_PWEN, |
| 1091 | FN_SIM0_RST_C, |
| 1092 | FN_TS_SCK1_D, |
| 1093 | FN_STP_ISCLK_1_D, |
| 1094 | FN_BPFCLK_B, |
| 1095 | FN_RIF3_CLK_B, |
| 1096 | FN_FSO_CFE_1_A, |
| 1097 | FN_HSCK2_C, |
| 1098 | |
| 1099 | IFN_USB0_OVC, |
| 1100 | FN_SIM0_D_C, |
| 1101 | FN_TS_SDAT1_D, |
| 1102 | FN_STP_ISD_1_D, |
| 1103 | FN_RIF3_SYNC_B, |
| 1104 | FN_HRX2_C, |
| 1105 | |
| 1106 | IFN_USB1_PWEN, |
| 1107 | FN_SIM0_CLK_C, |
| 1108 | FN_SSI_SCK1_A, |
| 1109 | FN_TS_SCK0_E, |
| 1110 | FN_STP_ISCLK_0_E, |
| 1111 | FN_FMCLK_B, |
| 1112 | FN_RIF2_CLK_B, |
| 1113 | FN_SPEEDIN_A, |
| 1114 | FN_HTX2_C, |
| 1115 | |
| 1116 | IFN_USB1_OVC, |
| 1117 | FN_MSIOF1_SS2_C, |
| 1118 | FN_SSI_WS1_A, |
| 1119 | FN_TS_SDAT0_E, |
| 1120 | FN_STP_ISD_0_E, |
| 1121 | FN_FMIN_B, |
| 1122 | FN_RIF2_SYNC_B, |
| 1123 | FN_REMOCON_B, |
| 1124 | FN_HCTS2x_C, |
| 1125 | |
| 1126 | IFN_USB30_PWEN, |
| 1127 | FN_AUDIO_CLKOUT_B, |
| 1128 | FN_SSI_SCK2_B, |
| 1129 | FN_TS_SDEN1_D, |
| 1130 | FN_STP_ISEN_1_D, |
| 1131 | FN_STP_OPWM_0_E, |
| 1132 | FN_RIF3_D0_B, |
| 1133 | FN_TCLK2_B, |
| 1134 | FN_TPU0TO0, |
| 1135 | FN_BPFCLK_C, |
| 1136 | FN_HRTS2x_C, |
| 1137 | |
| 1138 | IFN_USB30_OVC, |
| 1139 | FN_AUDIO_CLKOUT1_B, |
| 1140 | FN_SSI_WS2_B, |
| 1141 | FN_TS_SPSYNC1_D, |
| 1142 | FN_STP_ISSYNC_1_D, |
| 1143 | FN_STP_IVCXO27_0_E, |
| 1144 | FN_RIF3_D1_B, |
| 1145 | FN_FSO_TOE_B, |
| 1146 | FN_TPU0TO1, |
| 1147 | |
| 1148 | /* IPSR18 */ |
| 1149 | IFN_GP6_30, |
| 1150 | FN_AUDIO_CLKOUT2_B, |
| 1151 | FN_SSI_SCK9_B, |
| 1152 | FN_TS_SDEN0_E, |
| 1153 | FN_STP_ISEN_0_E, |
| 1154 | FN_RIF2_D0_B, |
| 1155 | FN_FSO_CFE_0_A, |
| 1156 | FN_TPU0TO2, |
| 1157 | FN_FMCLK_C, |
| 1158 | FN_FMCLK_D, |
| 1159 | |
| 1160 | IFN_GP6_31, |
| 1161 | FN_AUDIO_CLKOUT3_B, |
| 1162 | FN_SSI_WS9_B, |
| 1163 | FN_TS_SPSYNC0_E, |
| 1164 | FN_STP_ISSYNC_0_E, |
| 1165 | FN_RIF2_D1_B, |
| 1166 | FN_TPU0TO3, |
| 1167 | FN_FMIN_C, |
| 1168 | FN_FMIN_D, |
| 1169 | |
| 1170 | /* MOD_SEL0 */ |
| 1171 | FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1, |
| 1172 | FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3, |
| 1173 | FN_SEL_MSIOF3_4, FN_SEL_MSIOF3_5, |
| 1174 | FN_SEL_MSIOF3_6, |
| 1175 | FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1, |
| 1176 | FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3, |
| 1177 | FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1, |
| 1178 | FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3, |
| 1179 | FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5, |
| 1180 | FN_SEL_MSIOF1_6, |
| 1181 | FN_SEL_LBSC_0, FN_SEL_LBSC_1, |
| 1182 | FN_SEL_IEBUS_0, FN_SEL_IEBUS_1, |
| 1183 | FN_SEL_I2C2_0, FN_SEL_I2C2_1, |
| 1184 | FN_SEL_I2C1_0, FN_SEL_I2C1_1, |
| 1185 | FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1, |
| 1186 | FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1, |
| 1187 | FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3, |
| 1188 | FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, |
| 1189 | FN_SEL_HSCIF2_2, |
| 1190 | FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, |
| 1191 | FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1, |
| 1192 | FN_SEL_FSO_0, FN_SEL_FSO_1, |
| 1193 | FN_SEL_DRIF3_0, FN_SEL_DRIF3_1, |
| 1194 | FN_SEL_DRIF2_0, FN_SEL_DRIF2_1, |
| 1195 | FN_SEL_DRIF1_0, FN_SEL_DRIF1_1, |
| 1196 | FN_SEL_DRIF1_2, |
| 1197 | FN_SEL_DRIF0_0, FN_SEL_DRIF0_1, |
| 1198 | FN_SEL_DRIF0_2, |
| 1199 | FN_SEL_CANFD_0, FN_SEL_CANFD_1, |
| 1200 | FN_SEL_ADG_0, FN_SEL_ADG_1, |
| 1201 | FN_SEL_ADG_2, FN_SEL_ADG_3, |
| 1202 | |
| 1203 | /* MOD_SEL1 */ |
| 1204 | FN_SEL_TSIF1_0, |
| 1205 | FN_SEL_TSIF1_1, |
| 1206 | FN_SEL_TSIF1_2, |
| 1207 | FN_SEL_TSIF1_3, |
| 1208 | FN_SEL_TSIF0_0, |
| 1209 | FN_SEL_TSIF0_1, |
| 1210 | FN_SEL_TSIF0_2, |
| 1211 | FN_SEL_TSIF0_3, |
| 1212 | FN_SEL_TSIF0_4, |
| 1213 | FN_SEL_TIMER_TMU_0, |
| 1214 | FN_SEL_TIMER_TMU_1, |
| 1215 | FN_SEL_SSP1_1_0, |
| 1216 | FN_SEL_SSP1_1_1, |
| 1217 | FN_SEL_SSP1_1_2, |
| 1218 | FN_SEL_SSP1_1_3, |
| 1219 | FN_SEL_SSP1_0_0, |
| 1220 | FN_SEL_SSP1_0_1, |
| 1221 | FN_SEL_SSP1_0_2, |
| 1222 | FN_SEL_SSP1_0_3, |
| 1223 | FN_SEL_SSP1_0_4, |
| 1224 | FN_SEL_SSI_0, |
| 1225 | FN_SEL_SSI_1, |
| 1226 | FN_SEL_SPEED_PULSE_IF_0, |
| 1227 | FN_SEL_SPEED_PULSE_IF_1, |
| 1228 | FN_SEL_SIMCARD_0, |
| 1229 | FN_SEL_SIMCARD_1, |
| 1230 | FN_SEL_SIMCARD_2, |
| 1231 | FN_SEL_SIMCARD_3, |
| 1232 | FN_SEL_SDHI2_0, |
| 1233 | FN_SEL_SDHI2_1, |
| 1234 | FN_SEL_SCIF4_0, |
| 1235 | FN_SEL_SCIF4_1, |
| 1236 | FN_SEL_SCIF4_2, |
| 1237 | FN_SEL_SCIF3_0, |
| 1238 | FN_SEL_SCIF3_1, |
| 1239 | FN_SEL_SCIF2_0, |
| 1240 | FN_SEL_SCIF2_1, |
| 1241 | FN_SEL_SCIF1_0, |
| 1242 | FN_SEL_SCIF1_1, |
| 1243 | FN_SEL_SCIF_0, |
| 1244 | FN_SEL_SCIF_1, |
| 1245 | FN_SEL_REMOCON_0, |
| 1246 | FN_SEL_REMOCON_1, |
| 1247 | FN_SEL_RCAN_0, |
| 1248 | FN_SEL_RCAN_1, |
| 1249 | FN_SEL_PWM6_0, |
| 1250 | FN_SEL_PWM6_1, |
| 1251 | FN_SEL_PWM5_0, |
| 1252 | FN_SEL_PWM5_1, |
| 1253 | FN_SEL_PWM4_0, |
| 1254 | FN_SEL_PWM4_1, |
| 1255 | FN_SEL_PWM3_0, |
| 1256 | FN_SEL_PWM3_1, |
| 1257 | FN_SEL_PWM2_0, |
| 1258 | FN_SEL_PWM2_1, |
| 1259 | FN_SEL_PWM1_0, |
| 1260 | FN_SEL_PWM1_1, |
| 1261 | |
| 1262 | /* MOD_SEL2 */ |
| 1263 | FN_I2C_SEL_5_0, |
| 1264 | FN_I2C_SEL_5_1, |
| 1265 | FN_I2C_SEL_3_0, |
| 1266 | FN_I2C_SEL_3_1, |
| 1267 | FN_I2C_SEL_0_0, |
| 1268 | FN_I2C_SEL_0_1, |
| 1269 | FN_SEL_FM_0, |
| 1270 | FN_SEL_FM_1, |
| 1271 | FN_SEL_FM_2, |
| 1272 | FN_SEL_FM_3, |
| 1273 | FN_SEL_SCIF5_0, |
| 1274 | FN_SEL_SCIF5_1, |
| 1275 | FN_SEL_I2C6_0, |
| 1276 | FN_SEL_I2C6_1, |
| 1277 | FN_SEL_I2C6_2, |
| 1278 | FN_SEL_NDF_0, |
| 1279 | FN_SEL_NDF_1, |
| 1280 | FN_SEL_SSI2_0, |
| 1281 | FN_SEL_SSI2_1, |
| 1282 | FN_SEL_SSI9_0, |
| 1283 | FN_SEL_SSI9_1, |
| 1284 | FN_SEL_TIMER_TMU2_0, |
| 1285 | FN_SEL_TIMER_TMU2_1, |
| 1286 | FN_SEL_ADG_B_0, |
| 1287 | FN_SEL_ADG_B_1, |
| 1288 | FN_SEL_ADG_C_0, |
| 1289 | FN_SEL_ADG_C_1, |
| 1290 | FN_SEL_VIN4_0, |
| 1291 | FN_SEL_VIN4_1, |
| 1292 | |
| 1293 | PINMUX_FUNCTION_END, |
| 1294 | |
| 1295 | PINMUX_MARK_BEGIN, |
| 1296 | |
| 1297 | /* GPSR0 */ |
| 1298 | D15_GMARK, |
| 1299 | D14_GMARK, |
| 1300 | D13_GMARK, |
| 1301 | D12_GMARK, |
| 1302 | D11_GMARK, |
| 1303 | D10_GMARK, |
| 1304 | D9_GMARK, |
| 1305 | D8_GMARK, |
| 1306 | D7_GMARK, |
| 1307 | D6_GMARK, |
| 1308 | D5_GMARK, |
| 1309 | D4_GMARK, |
| 1310 | D3_GMARK, |
| 1311 | D2_GMARK, |
| 1312 | D1_GMARK, |
| 1313 | D0_GMARK, |
| 1314 | |
| 1315 | /* GPSR1 */ |
| 1316 | CLKOUT_GMARK, |
| 1317 | EX_WAIT0_A_GMARK, |
| 1318 | WE1x_GMARK, |
| 1319 | WE0x_GMARK, |
| 1320 | RD_WRx_GMARK, |
| 1321 | RDx_GMARK, |
| 1322 | BSx_GMARK, |
| 1323 | CS1x_A26_GMARK, |
| 1324 | CS0x_GMARK, |
| 1325 | A19_GMARK, |
| 1326 | A18_GMARK, |
| 1327 | A17_GMARK, |
| 1328 | A16_GMARK, |
| 1329 | A15_GMARK, |
| 1330 | A14_GMARK, |
| 1331 | A13_GMARK, |
| 1332 | A12_GMARK, |
| 1333 | A11_GMARK, |
| 1334 | A10_GMARK, |
| 1335 | A9_GMARK, |
| 1336 | A8_GMARK, |
| 1337 | A7_GMARK, |
| 1338 | A6_GMARK, |
| 1339 | A5_GMARK, |
| 1340 | A4_GMARK, |
| 1341 | A3_GMARK, |
| 1342 | A2_GMARK, |
| 1343 | A1_GMARK, |
| 1344 | A0_GMARK, |
| 1345 | |
| 1346 | /* GPSR2 */ |
| 1347 | AVB_AVTP_CAPTURE_A_GMARK, |
| 1348 | AVB_AVTP_MATCH_A_GMARK, |
| 1349 | AVB_LINK_GMARK, |
| 1350 | AVB_PHY_INT_GMARK, |
| 1351 | AVB_MAGIC_GMARK, |
| 1352 | AVB_MDC_GMARK, |
| 1353 | PWM2_A_GMARK, |
| 1354 | PWM1_A_GMARK, |
| 1355 | PWM0_GMARK, |
| 1356 | IRQ5_GMARK, |
| 1357 | IRQ4_GMARK, |
| 1358 | IRQ3_GMARK, |
| 1359 | IRQ2_GMARK, |
| 1360 | IRQ1_GMARK, |
| 1361 | IRQ0_GMARK, |
| 1362 | |
| 1363 | /* GPSR3 */ |
| 1364 | SD1_WP_GMARK, |
| 1365 | SD1_CD_GMARK, |
| 1366 | SD0_WP_GMARK, |
| 1367 | SD0_CD_GMARK, |
| 1368 | SD1_DAT3_GMARK, |
| 1369 | SD1_DAT2_GMARK, |
| 1370 | SD1_DAT1_GMARK, |
| 1371 | SD1_DAT0_GMARK, |
| 1372 | SD1_CMD_GMARK, |
| 1373 | SD1_CLK_GMARK, |
| 1374 | SD0_DAT3_GMARK, |
| 1375 | SD0_DAT2_GMARK, |
| 1376 | SD0_DAT1_GMARK, |
| 1377 | SD0_DAT0_GMARK, |
| 1378 | SD0_CMD_GMARK, |
| 1379 | SD0_CLK_GMARK, |
| 1380 | |
| 1381 | /* GPSR4 */ |
| 1382 | SD3_DS_GMARK, |
| 1383 | SD3_DAT7_GMARK, |
| 1384 | SD3_DAT6_GMARK, |
| 1385 | SD3_DAT5_GMARK, |
| 1386 | SD3_DAT4_GMARK, |
| 1387 | SD3_DAT3_MARK, |
| 1388 | SD3_DAT2_MARK, |
| 1389 | SD3_DAT1_MARK, |
| 1390 | SD3_DAT0_MARK, |
| 1391 | SD3_CMD_MARK, |
| 1392 | SD3_CLK_MARK, |
| 1393 | SD2_DS_GMARK, |
| 1394 | SD2_DAT3_GMARK, |
| 1395 | SD2_DAT2_GMARK, |
| 1396 | SD2_DAT1_GMARK, |
| 1397 | SD2_DAT0_GMARK, |
| 1398 | SD2_CMD_MARK, |
| 1399 | SD2_CLK_GMARK, |
| 1400 | |
| 1401 | /* GPSR5 */ |
| 1402 | MLB_DAT_GMARK, |
| 1403 | MLB_SIG_GMARK, |
| 1404 | MLB_CLK_GMARK, |
| 1405 | MSIOF0_RXD_MARK, |
| 1406 | MSIOF0_SS2_GMARK, |
| 1407 | MSIOF0_TXD_MARK, |
| 1408 | MSIOF0_SS1_GMARK, |
| 1409 | MSIOF0_SYNC_GMARK, |
| 1410 | MSIOF0_SCK_MARK, |
| 1411 | HRTS0x_GMARK, |
| 1412 | HCTS0x_GMARK, |
| 1413 | HTX0_GMARK, |
| 1414 | HRX0_GMARK, |
| 1415 | HSCK0_GMARK, |
| 1416 | RX2_A_GMARK, |
| 1417 | TX2_A_GMARK, |
| 1418 | SCK2_GMARK, |
| 1419 | RTS1x_TANS_GMARK, |
| 1420 | CTS1x_GMARK, |
| 1421 | TX1_A_GMARK, |
| 1422 | RX1_A_GMARK, |
| 1423 | RTS0x_TANS_GMARK, |
| 1424 | CTS0x_GMARK, |
| 1425 | TX0_GMARK, |
| 1426 | RX0_GMARK, |
| 1427 | SCK0_GMARK, |
| 1428 | |
| 1429 | /* GPSR6 */ |
| 1430 | GP6_30_GMARK, |
| 1431 | GP6_31_GMARK, |
| 1432 | USB30_OVC_GMARK, |
| 1433 | USB30_PWEN_GMARK, |
| 1434 | USB1_OVC_GMARK, |
| 1435 | USB1_PWEN_GMARK, |
| 1436 | USB0_OVC_GMARK, |
| 1437 | USB0_PWEN_GMARK, |
| 1438 | AUDIO_CLKB_B_GMARK, |
| 1439 | AUDIO_CLKA_A_GMARK, |
| 1440 | SSI_SDATA9_A_GMARK, |
| 1441 | SSI_SDATA8_GMARK, |
| 1442 | SSI_SDATA7_GMARK, |
| 1443 | SSI_WS78_GMARK, |
| 1444 | SSI_SCK78_GMARK, |
| 1445 | SSI_SDATA6_GMARK, |
| 1446 | SSI_WS6_GMARK, |
| 1447 | SSI_SCK6_GMARK, |
| 1448 | SSI_SDATA5_MARK, |
| 1449 | SSI_WS5_MARK, |
| 1450 | SSI_SCK5_MARK, |
| 1451 | SSI_SDATA4_GMARK, |
| 1452 | SSI_WS4_GMARK, |
| 1453 | SSI_SCK4_GMARK, |
| 1454 | SSI_SDATA3_GMARK, |
| 1455 | SSI_WS34_GMARK, |
| 1456 | SSI_SCK34_GMARK, |
| 1457 | SSI_SDATA2_A_GMARK, |
| 1458 | SSI_SDATA1_A_GMARK, |
| 1459 | SSI_SDATA0_GMARK, |
| 1460 | SSI_WS01239_GMARK, |
| 1461 | SSI_SCK01239_GMARK, |
| 1462 | |
| 1463 | /* GPSR7 */ |
| 1464 | HDMI1_CEC_MARK, |
| 1465 | HDMI0_CEC_MARK, |
| 1466 | AVS2_MARK, |
| 1467 | AVS1_MARK, |
| 1468 | |
| 1469 | /* IPSR0 */ |
| 1470 | AVB_MDC_IMARK, |
| 1471 | MSIOF2_SS2_C_MARK, |
| 1472 | AVB_MAGIC_IMARK, |
| 1473 | MSIOF2_SS1_C_MARK, |
| 1474 | SCK4_A_MARK, |
| 1475 | AVB_PHY_INT_IMARK, |
| 1476 | MSIOF2_SYNC_C_MARK, |
| 1477 | RX4_A_MARK, |
| 1478 | AVB_LINK_IMARK, |
| 1479 | MSIOF2_SCK_C_MARK, |
| 1480 | TX4_A_MARK, |
| 1481 | AVB_AVTP_MATCH_A_IMARK, |
| 1482 | MSIOF2_RXD_C_MARK, |
| 1483 | CTS4x_A_MARK, |
| 1484 | AVB_AVTP_CAPTURE_A_IMARK, |
| 1485 | MSIOF2_TXD_C_MARK, |
| 1486 | RTS4x_TANS_A_MARK, |
| 1487 | IRQ0_IMARK, |
| 1488 | QPOLB_MARK, |
| 1489 | DU_CDE_MARK, |
| 1490 | VI4_DATA0_B_MARK, |
| 1491 | CAN0_TX_B_MARK, |
| 1492 | CANFD0_TX_B_MARK, |
| 1493 | MSIOF3_SS2_E_MARK, |
| 1494 | IRQ1_IMARK, |
| 1495 | QPOLA_MARK, |
| 1496 | DU_DISP_MARK, |
| 1497 | VI4_DATA1_B_MARK, |
| 1498 | CAN0_RX_B_MARK, |
| 1499 | CANFD0_RX_B_MARK, |
| 1500 | MSIOF3_SS1_E_MARK, |
| 1501 | |
| 1502 | /* IPSR1 */ |
| 1503 | IRQ2_IMARK, |
| 1504 | QCPV_QDE_MARK, |
| 1505 | DU_EXODDF_DU_ODDF_DISP_CDE_MARK, |
| 1506 | VI4_DATA2_B_MARK, |
| 1507 | MSIOF3_SYNC_E_MARK, |
| 1508 | PWM3_B_MARK, |
| 1509 | IRQ3_IMARK, |
| 1510 | QSTVB_QVE_MARK, |
| 1511 | DU_DOTCLKOUT1_MARK, |
| 1512 | VI4_DATA3_B_MARK, |
| 1513 | MSIOF3_SCK_E_MARK, |
| 1514 | PWM4_B_MARK, |
| 1515 | IRQ4_IMARK, |
| 1516 | QSTH_QHS_MARK, |
| 1517 | DU_EXHSYNC_DU_HSYNC_MARK, |
| 1518 | VI4_DATA4_B_MARK, |
| 1519 | MSIOF3_RXD_E_MARK, |
| 1520 | PWM5_B_MARK, |
| 1521 | IRQ5_IMARK, |
| 1522 | QSTB_QHE_MARK, |
| 1523 | DU_EXVSYNC_DU_VSYNC_MARK, |
| 1524 | VI4_DATA5_B_MARK, |
| 1525 | MSIOF3_TXD_E_MARK, |
| 1526 | PWM6_B_MARK, |
| 1527 | PWM0_IMARK, |
| 1528 | AVB_AVTP_PPS_MARK, |
| 1529 | VI4_DATA6_B_MARK, |
| 1530 | IECLK_B_MARK, |
| 1531 | PWM1_A_IMARK, |
| 1532 | HRX3_D_MARK, |
| 1533 | VI4_DATA7_B_MARK, |
| 1534 | IERX_B_MARK, |
| 1535 | PWM2_A_IMARK, |
| 1536 | PWMFSW0_MARK, |
| 1537 | HTX3_D_MARK, |
| 1538 | IETX_B_MARK, |
| 1539 | A0_IMARK, |
| 1540 | LCDOUT16_MARK, |
| 1541 | MSIOF3_SYNC_B_MARK, |
| 1542 | VI4_DATA8_MARK, |
| 1543 | DU_DB0_MARK, |
| 1544 | PWM3_A_MARK, |
| 1545 | |
| 1546 | /* IPSR2 */ |
| 1547 | A1_IMARK, |
| 1548 | LCDOUT17_MARK, |
| 1549 | MSIOF3_TXD_B_MARK, |
| 1550 | VI4_DATA9_MARK, |
| 1551 | DU_DB1_MARK, |
| 1552 | PWM4_A_MARK, |
| 1553 | A2_IMARK, |
| 1554 | LCDOUT18_MARK, |
| 1555 | MSIOF3_SCK_B_MARK, |
| 1556 | VI4_DATA10_MARK, |
| 1557 | DU_DB2_MARK, |
| 1558 | PWM5_A_MARK, |
| 1559 | A3_IMARK, |
| 1560 | LCDOUT19_MARK, |
| 1561 | MSIOF3_RXD_B_MARK, |
| 1562 | VI4_DATA11_MARK, |
| 1563 | DU_DB3_MARK, |
| 1564 | PWM6_A_MARK, |
| 1565 | A4_IMARK, |
| 1566 | LCDOUT20_MARK, |
| 1567 | MSIOF3_SS1_B_MARK, |
| 1568 | VI4_DATA12_MARK, |
| 1569 | VI5_DATA12_MARK, |
| 1570 | DU_DB4_MARK, |
| 1571 | A5_IMARK, |
| 1572 | LCDOUT21_MARK, |
| 1573 | MSIOF3_SS2_B_MARK, |
| 1574 | SCK4_B_MARK, |
| 1575 | VI4_DATA13_MARK, |
| 1576 | VI5_DATA13_MARK, |
| 1577 | DU_DB5_MARK, |
| 1578 | A6_IMARK, |
| 1579 | LCDOUT22_MARK, |
| 1580 | MSIOF2_SS1_A_MARK, |
| 1581 | RX4_B_MARK, |
| 1582 | VI4_DATA14_MARK, |
| 1583 | VI5_DATA14_MARK, |
| 1584 | DU_DB6_MARK, |
| 1585 | A7_IMARK, |
| 1586 | LCDOUT23_MARK, |
| 1587 | MSIOF2_SS2_A_MARK, |
| 1588 | TX4_B_MARK, |
| 1589 | VI4_DATA15_MARK, |
| 1590 | V15_DATA15_MARK, |
| 1591 | DU_DB7_MARK, |
| 1592 | A8_IMARK, |
| 1593 | RX3_B_MARK, |
| 1594 | MSIOF2_SYNC_A_MARK, |
| 1595 | HRX4_B_MARK, |
| 1596 | SDA6_A_MARK, |
| 1597 | AVB_AVTP_MATCH_B_MARK, |
| 1598 | PWM1_B_MARK, |
| 1599 | |
| 1600 | /* IPSR3 */ |
| 1601 | A9_IMARK, |
| 1602 | MSIOF2_SCK_A_MARK, |
| 1603 | CTS4x_B_MARK, |
| 1604 | VI5_VSYNCx_MARK, |
| 1605 | A10_IMARK, |
| 1606 | MSIOF2_RXD_A_MARK, |
| 1607 | RTS4n_TANS_B_MARK, |
| 1608 | VI5_HSYNCx_MARK, |
| 1609 | A11_IMARK, |
| 1610 | TX3_B_MARK, |
| 1611 | MSIOF2_TXD_A_MARK, |
| 1612 | HTX4_B_MARK, |
| 1613 | HSCK4_MARK, |
| 1614 | VI5_FIELD_MARK, |
| 1615 | SCL6_A_MARK, |
| 1616 | AVB_AVTP_CAPTURE_B_MARK, |
| 1617 | PWM2_B_MARK, |
| 1618 | SPV_EVEN_MARK, |
| 1619 | A12_IMARK, |
| 1620 | LCDOUT12_MARK, |
| 1621 | MSIOF3_SCK_C_MARK, |
| 1622 | HRX4_A_MARK, |
| 1623 | VI5_DATA8_MARK, |
| 1624 | DU_DG4_MARK, |
| 1625 | A13_IMARK, |
| 1626 | LCDOUT13_MARK, |
| 1627 | MSIOF3_SYNC_C_MARK, |
| 1628 | HTX4_A_MARK, |
| 1629 | VI5_DATA9_MARK, |
| 1630 | DU_DG5_MARK, |
| 1631 | A14_IMARK, |
| 1632 | LCDOUT14_MARK, |
| 1633 | MSIOF3_RXD_C_MARK, |
| 1634 | HCTS4x_MARK, |
| 1635 | VI5_DATA10_MARK, |
| 1636 | DU_DG6_MARK, |
| 1637 | A15_IMARK, |
| 1638 | LCDOUT15_MARK, |
| 1639 | MSIOF3_TXD_C_MARK, |
| 1640 | HRTS4x_MARK, |
| 1641 | VI5_DATA11_MARK, |
| 1642 | DU_DG7_MARK, |
| 1643 | A16_IMARK, |
| 1644 | LCDOUT8_MARK, |
| 1645 | VI4_FIELD_MARK, |
| 1646 | DU_DG0_MARK, |
| 1647 | |
| 1648 | /* IPSR4 */ |
| 1649 | A17_IMARK, |
| 1650 | LCDOUT9_MARK, |
| 1651 | VI4_VSYNCx_MARK, |
| 1652 | DU_DG1_MARK, |
| 1653 | A18_IMARK, |
| 1654 | LCDOUT10_MARK, |
| 1655 | VI4_HSYNCx_MARK, |
| 1656 | DU_DG2_MARK, |
| 1657 | A19_IMARK, |
| 1658 | LCDOUT11_MARK, |
| 1659 | VI4_CLKENB_MARK, |
| 1660 | DU_DG3_MARK, |
| 1661 | CS0x_IMARK, |
| 1662 | VI5_CLKENB_MARK, |
| 1663 | CS1x_A26_IMARK, |
| 1664 | VI5_CLK_MARK, |
| 1665 | EX_WAIT0_B_MARK, |
| 1666 | BSx_IMARK, |
| 1667 | QSTVA_QVS_MARK, |
| 1668 | MSIOF3_SCK_D_MARK, |
| 1669 | SCK3_MARK, |
| 1670 | HSCK3_MARK, |
| 1671 | CAN1_TX_MARK, |
| 1672 | CANFD1_TX_MARK, |
| 1673 | IETX_A_MARK, |
| 1674 | RDx_IMARK, |
| 1675 | MSIOF3_SYNC_D_MARK, |
| 1676 | RX3_A_MARK, |
| 1677 | HRX3_A_MARK, |
| 1678 | CAN0_TX_A_MARK, |
| 1679 | CANFD0_TX_A_MARK, |
| 1680 | RD_WRx_IMARK, |
| 1681 | MSIOF3_RXD_D_MARK, |
| 1682 | TX3_A_MARK, |
| 1683 | HTX3_A_MARK, |
| 1684 | CAN0_RX_A_MARK, |
| 1685 | CANFD0_RX_A_MARK, |
| 1686 | |
| 1687 | /* IPSR5 */ |
| 1688 | WE0x_IMARK, |
| 1689 | MSIIOF3_TXD_D_MARK, |
| 1690 | CTS3x_MARK, |
| 1691 | HCTS3x_MARK, |
| 1692 | SCL6_B_MARK, |
| 1693 | CAN_CLK_MARK, |
| 1694 | IECLK_A_MARK, |
| 1695 | WE1x_IMARK, |
| 1696 | MSIOF3_SS1_D_MARK, |
| 1697 | RTS3x_TANS_MARK, |
| 1698 | HRTS3x_MARK, |
| 1699 | SDA6_B_MARK, |
| 1700 | CAN1_RX_MARK, |
| 1701 | CANFD1_RX_MARK, |
| 1702 | IERX_A_MARK, |
| 1703 | EX_WAIT0_A_IMARK, |
| 1704 | QCLK_MARK, |
| 1705 | VI4_CLK_MARK, |
| 1706 | DU_DOTCLKOUT0_MARK, |
| 1707 | D0_IMARK, |
| 1708 | MSIOF2_SS1_B_MARK, |
| 1709 | MSIOF3_SCK_A_MARK, |
| 1710 | VI4_DATA16_MARK, |
| 1711 | VI5_DATA0_MARK, |
| 1712 | D1_IMARK, |
| 1713 | MSIOF2_SS2_B_MARK, |
| 1714 | MSIOF3_SYNC_A_MARK, |
| 1715 | VI4_DATA17_MARK, |
| 1716 | VI5_DATA1_MARK, |
| 1717 | D2_IMARK, |
| 1718 | MSIOF3_RXD_A_MARK, |
| 1719 | VI4_DATA18_MARK, |
| 1720 | VI5_DATA2_MARK, |
| 1721 | D3_IMARK, |
| 1722 | MSIOF3_TXD_A_MARK, |
| 1723 | VI4_DATA19_MARK, |
| 1724 | VI5_DATA3_MARK, |
| 1725 | D4_IMARK, |
| 1726 | MSIOF2_SCK_B_MARK, |
| 1727 | VI4_DATA20_MARK, |
| 1728 | VI5_DATA4_MARK, |
| 1729 | |
| 1730 | /* IPSR6 */ |
| 1731 | D5_IMARK, |
| 1732 | MSIOF2_SYNC_B_MARK, |
| 1733 | VI4_DATA21_MARK, |
| 1734 | VI5_DATA5_MARK, |
| 1735 | D6_IMARK, |
| 1736 | MSIOF2_RXD_B_MARK, |
| 1737 | VI4_DATA22_MARK, |
| 1738 | VI5_DATA6_MARK, |
| 1739 | D7_IMARK, |
| 1740 | MSIOF2_TXD_B_MARK, |
| 1741 | VI4_DATA23_MARK, |
| 1742 | VI5_DATA7_MARK, |
| 1743 | D8_IMARK, |
| 1744 | LCDOUT0_MARK, |
| 1745 | MSIOF2_SCK_D_MARK, |
| 1746 | SCK4_C_MARK, |
| 1747 | VI4_DATA0_A_MARK, |
| 1748 | DU_DR0_MARK, |
| 1749 | D9_IMARK, |
| 1750 | LCDOUT1_MARK, |
| 1751 | MSIOF2_SYNC_D_MARK, |
| 1752 | VI4_DATA1_A_MARK, |
| 1753 | DU_DR1_MARK, |
| 1754 | D10_IMARK, |
| 1755 | LCDOUT2_MARK, |
| 1756 | MSIOF2_RXD_D_MARK, |
| 1757 | HRX3_B_MARK, |
| 1758 | VI4_DATA2_A_MARK, |
| 1759 | CTS4x_C_MARK, |
| 1760 | DU_DR2_MARK, |
| 1761 | D11_IMARK, |
| 1762 | LCDOUT3_MARK, |
| 1763 | MSIOF2_TXD_D_MARK, |
| 1764 | HTX3_B_MARK, |
| 1765 | VI4_DATA3_A_MARK, |
| 1766 | RTS4x_TANS_C_MARK, |
| 1767 | DU_DR3_MARK, |
| 1768 | D12_IMARK, |
| 1769 | LCDOUT4_MARK, |
| 1770 | MSIOF2_SS1_D_MARK, |
| 1771 | RX4_C_MARK, |
| 1772 | VI4_DATA4_A_MARK, |
| 1773 | DU_DR4_MARK, |
| 1774 | |
| 1775 | /* IPSR7 */ |
| 1776 | D13_IMARK, |
| 1777 | LCDOUT5_MARK, |
| 1778 | MSIOF2_SS2_D_MARK, |
| 1779 | TX4_C_MARK, |
| 1780 | VI4_DATA5_A_MARK, |
| 1781 | DU_DR5_MARK, |
| 1782 | D14_IMARK, |
| 1783 | LCDOUT6_MARK, |
| 1784 | MSIOF3_SS1_A_MARK, |
| 1785 | HRX3_C_MARK, |
| 1786 | VI4_DATA6_A_MARK, |
| 1787 | DU_DR6_MARK, |
| 1788 | SCL6_C_MARK, |
| 1789 | D15_IMARK, |
| 1790 | LCDOUT7_MARK, |
| 1791 | MSIOF3_SS2_A_MARK, |
| 1792 | HTX3_C_MARK, |
| 1793 | VI4_DATA7_A_MARK, |
| 1794 | DU_DR7_MARK, |
| 1795 | SDA6_C_MARK, |
| 1796 | FSCLKST_MARK, |
| 1797 | SD0_CLK_IMARK, |
| 1798 | MSIOF1_SCK_E_MARK, |
| 1799 | STP_OPWM_0_B_MARK, |
| 1800 | SD0_CMD_IMARK, |
| 1801 | MSIOF1_SYNC_E_MARK, |
| 1802 | STP_IVCXO27_0_B_MARK, |
| 1803 | SD0_DAT0_IMARK, |
| 1804 | MSIOF1_RXD_E_MARK, |
| 1805 | TS_SCK0_B_MARK, |
| 1806 | STP_ISCLK_0_B_MARK, |
| 1807 | SD0_DAT1_IMARK, |
| 1808 | MSIOF1_TXD_E_MARK, |
| 1809 | TS_SPSYNC0_B_MARK, |
| 1810 | STP_ISSYNC_0_B_MARK, |
| 1811 | |
| 1812 | /* IPSR8 */ |
| 1813 | SD0_DAT2_IMARK, |
| 1814 | MSIOF1_SS1_E_MARK, |
| 1815 | TS_SDAT0_B_MARK, |
| 1816 | STP_ISD_0_B_MARK, |
| 1817 | |
| 1818 | SD0_DAT3_IMARK, |
| 1819 | MSIOF1_SS2_E_MARK, |
| 1820 | TS_SDEN0_B_MARK, |
| 1821 | STP_ISEN_0_B_MARK, |
| 1822 | |
| 1823 | SD1_CLK_IMARK, |
| 1824 | MSIOF1_SCK_G_MARK, |
| 1825 | SIM0_CLK_A_MARK, |
| 1826 | |
| 1827 | SD1_CMD_IMARK, |
| 1828 | MSIOF1_SYNC_G_MARK, |
| 1829 | NFCEx_B_MARK, |
| 1830 | SIM0_D_A_MARK, |
| 1831 | STP_IVCXO27_1_B_MARK, |
| 1832 | |
| 1833 | SD1_DAT0_IMARK, |
| 1834 | SD2_DAT4_MARK, |
| 1835 | MSIOF1_RXD_G_MARK, |
| 1836 | NFWPx_B_MARK, |
| 1837 | TS_SCK1_B_MARK, |
| 1838 | STP_ISCLK_1_B_MARK, |
| 1839 | |
| 1840 | SD1_DAT1_IMARK, |
| 1841 | SD2_DAT5_MARK, |
| 1842 | MSIOF1_TXD_G_MARK, |
| 1843 | NFDATA14_B_MARK, |
| 1844 | TS_SPSYNC1_B_MARK, |
| 1845 | STP_ISSYNC_1_B_MARK, |
| 1846 | |
| 1847 | SD1_DAT2_IMARK, |
| 1848 | SD2_DAT6_MARK, |
| 1849 | MSIOF1_SS1_G_MARK, |
| 1850 | NFDATA15_B_MARK, |
| 1851 | TS_SDAT1_B_MARK, |
| 1852 | STP_IOD_1_B_MARK, |
| 1853 | |
| 1854 | SD1_DAT3_IMARK, |
| 1855 | SD2_DAT7_MARK, |
| 1856 | MSIOF1_SS2_G_MARK, |
| 1857 | NFRBx_B_MARK, |
| 1858 | TS_SDEN1_B_MARK, |
| 1859 | STP_ISEN_1_B_MARK, |
| 1860 | |
| 1861 | /* IPSR9 */ |
| 1862 | SD2_CLK_IMARK, |
| 1863 | NFDATA8_MARK, |
| 1864 | |
| 1865 | SD2_CMD_IMARK, |
| 1866 | NFDATA9_MARK, |
| 1867 | |
| 1868 | SD2_DAT0_IMARK, |
| 1869 | NFDATA10_MARK, |
| 1870 | |
| 1871 | SD2_DAT1_IMARK, |
| 1872 | NFDATA11_MARK, |
| 1873 | |
| 1874 | SD2_DAT2_IMARK, |
| 1875 | NFDATA12_MARK, |
| 1876 | |
| 1877 | SD2_DAT3_IMARK, |
| 1878 | NFDATA13_MARK, |
| 1879 | |
| 1880 | SD2_DS_IMARK, |
| 1881 | NFALE_MARK, |
| 1882 | |
| 1883 | SD3_CLK_IMARK, |
| 1884 | NFWEx_MARK, |
| 1885 | |
| 1886 | /* IPSR10 */ |
| 1887 | SD3_CMD_IMARK, |
| 1888 | NFREx_MARK, |
| 1889 | |
| 1890 | SD3_DAT0_IMARK, |
| 1891 | NFDATA0_MARK, |
| 1892 | |
| 1893 | SD3_DAT1_IMARK, |
| 1894 | NFDATA1_MARK, |
| 1895 | |
| 1896 | SD3_DAT2_IMARK, |
| 1897 | NFDATA2_MARK, |
| 1898 | |
| 1899 | SD3_DAT3_IMARK, |
| 1900 | NFDATA3_MARK, |
| 1901 | |
| 1902 | SD3_DAT4_IMARK, |
| 1903 | SD2_CD_A_MARK, |
| 1904 | NFDATA4_MARK, |
| 1905 | |
| 1906 | SD3_DAT5_IMARK, |
| 1907 | SD2_WP_A_MARK, |
| 1908 | NFDATA5_MARK, |
| 1909 | |
| 1910 | SD3_DAT6_IMARK, |
| 1911 | SD3_CD_MARK, |
| 1912 | NFDATA6_MARK, |
| 1913 | |
| 1914 | /* IPSR11 */ |
| 1915 | SD3_DAT7_IMARK, |
| 1916 | SD3_WP_MARK, |
| 1917 | NFDATA7_MARK, |
| 1918 | |
| 1919 | SD3_DS_IMARK, |
| 1920 | NFCLE_MARK, |
| 1921 | |
| 1922 | SD0_CD_IMARK, |
| 1923 | NFDATA14_A_MARK, |
| 1924 | SCL2_B_MARK, |
| 1925 | SIM0_RST_A_MARK, |
| 1926 | |
| 1927 | SD0_WP_IMARK, |
| 1928 | NFDATA15_A_MARK, |
| 1929 | SDA2_B_MARK, |
| 1930 | |
| 1931 | SD1_CD_IMARK, |
| 1932 | NFRBx_A_MARK, |
| 1933 | SIM0_CLK_B_MARK, |
| 1934 | |
| 1935 | SD1_WP_IMARK, |
| 1936 | NFCEx_A_MARK, |
| 1937 | SIM0_D_B_MARK, |
| 1938 | |
| 1939 | SCK0_IMARK, |
| 1940 | HSCK1_B_MARK, |
| 1941 | MSIOF1_SS2_B_MARK, |
| 1942 | AUDIO_CLKC_B_MARK, |
| 1943 | SDA2_A_MARK, |
| 1944 | SIM0_RST_B_MARK, |
| 1945 | STP_OPWM_0_C_MARK, |
| 1946 | RIF0_CLK_B_MARK, |
| 1947 | ADICHS2_MARK, |
| 1948 | SCK5_B_MARK, |
| 1949 | |
| 1950 | RX0_IMARK, |
| 1951 | HRX1_B_MARK, |
| 1952 | TS_SCK0_C_MARK, |
| 1953 | STP_ISCLK_0_C_MARK, |
| 1954 | RIF0_D0_B_MARK, |
| 1955 | |
| 1956 | /* IPSR12 */ |
| 1957 | TX0_IMARK, |
| 1958 | HTX1_B_MARK, |
| 1959 | TS_SPSYNC0_C_MARK, |
| 1960 | STP_ISSYNC_0_C_MARK, |
| 1961 | RIF0_D1_B_MARK, |
| 1962 | |
| 1963 | CTS0x_IMARK, |
| 1964 | HCTS1x_B_MARK, |
| 1965 | MSIOF1_SYNC_B_MARK, |
| 1966 | TS_SPSYNC1_C_MARK, |
| 1967 | STP_ISSYNC_1_C_MARK, |
| 1968 | RIF1_SYNC_B_MARK, |
| 1969 | AUDIO_CLKOUT_C_MARK, |
| 1970 | ADICS_SAMP_MARK, |
| 1971 | |
| 1972 | RTS0x_TANS_IMARK, |
| 1973 | HRTS1x_B_MARK, |
| 1974 | MSIOF1_SS1_B_MARK, |
| 1975 | AUDIO_CLKA_B_MARK, |
| 1976 | SCL2_A_MARK, |
| 1977 | STP_IVCXO27_1_C_MARK, |
| 1978 | RIF0_SYNC_B_MARK, |
| 1979 | ADICHS1_MARK, |
| 1980 | |
| 1981 | RX1_A_IMARK, |
| 1982 | HRX1_A_MARK, |
| 1983 | TS_SDAT0_C_MARK, |
| 1984 | STP_ISD_0_C_MARK, |
| 1985 | RIF1_CLK_C_MARK, |
| 1986 | |
| 1987 | TX1_A_IMARK, |
| 1988 | HTX1_A_MARK, |
| 1989 | TS_SDEN0_C_MARK, |
| 1990 | STP_ISEN_0_C_MARK, |
| 1991 | RIF1_D0_C_MARK, |
| 1992 | |
| 1993 | CTS1x_IMARK, |
| 1994 | HCTS1x_A_MARK, |
| 1995 | MSIOF1_RXD_B_MARK, |
| 1996 | TS_SDEN1_C_MARK, |
| 1997 | STP_ISEN_1_C_MARK, |
| 1998 | RIF1_D0_B_MARK, |
| 1999 | ADIDATA_MARK, |
| 2000 | |
| 2001 | RTS1x_TANS_IMARK, |
| 2002 | HRTS1x_A_MARK, |
| 2003 | MSIOF1_TXD_B_MARK, |
| 2004 | TS_SDAT1_C_MARK, |
| 2005 | STP_ISD_1_C_MARK, |
| 2006 | RIF1_D1_B_MARK, |
| 2007 | ADICHS0_MARK, |
| 2008 | |
| 2009 | SCK2_IMARK, |
| 2010 | SCIF_CLK_B_MARK, |
| 2011 | MSIOF1_SCK_B_MARK, |
| 2012 | TS_SCK1_C_MARK, |
| 2013 | STP_ISCLK_1_C_MARK, |
| 2014 | RIF1_CLK_B_MARK, |
| 2015 | ADICLK_MARK, |
| 2016 | |
| 2017 | /* IPSR13 */ |
| 2018 | TX2_A_IMARK, |
| 2019 | SD2_CD_B_MARK, |
| 2020 | SCL1_A_MARK, |
| 2021 | FMCLK_A_MARK, |
| 2022 | RIF1_D1_C_MARK, |
| 2023 | FSO_CFE_0_B_MARK, |
| 2024 | |
| 2025 | RX2_A_IMARK, |
| 2026 | SD2_WP_B_MARK, |
| 2027 | SDA1_A_MARK, |
| 2028 | FMIN_A_MARK, |
| 2029 | RIF1_SYNC_C_MARK, |
| 2030 | FSO_CEF_1_B_MARK, |
| 2031 | |
| 2032 | HSCK0_IMARK, |
| 2033 | MSIOF1_SCK_D_MARK, |
| 2034 | AUDIO_CLKB_A_MARK, |
| 2035 | SSI_SDATA1_B_MARK, |
| 2036 | TS_SCK0_D_MARK, |
| 2037 | STP_ISCLK_0_D_MARK, |
| 2038 | RIF0_CLK_C_MARK, |
| 2039 | RX5_B_MARK, |
| 2040 | |
| 2041 | HRX0_IMARK, |
| 2042 | MSIOF1_RXD_D_MARK, |
| 2043 | SS1_SDATA2_B_MARK, |
| 2044 | TS_SDEN0_D_MARK, |
| 2045 | STP_ISEN_0_D_MARK, |
| 2046 | RIF0_D0_C_MARK, |
| 2047 | |
| 2048 | HTX0_IMARK, |
| 2049 | MSIOF1_TXD_D_MARK, |
| 2050 | SSI_SDATA9_B_MARK, |
| 2051 | TS_SDAT0_D_MARK, |
| 2052 | STP_ISD_0_D_MARK, |
| 2053 | RIF0_D1_C_MARK, |
| 2054 | |
| 2055 | HCTS0x_IMARK, |
| 2056 | RX2_B_MARK, |
| 2057 | MSIOF1_SYNC_D_MARK, |
| 2058 | SSI_SCK9_A_MARK, |
| 2059 | TS_SPSYNC0_D_MARK, |
| 2060 | STP_ISSYNC_0_D_MARK, |
| 2061 | RIF0_SYNC_C_MARK, |
| 2062 | AUDIO_CLKOUT1_A_MARK, |
| 2063 | |
| 2064 | HRTS0x_IMARK, |
| 2065 | TX2_B_MARK, |
| 2066 | MSIOF1_SS1_D_MARK, |
| 2067 | SSI_WS9_A_MARK, |
| 2068 | STP_IVCXO27_0_D_MARK, |
| 2069 | BPFCLK_A_MARK, |
| 2070 | AUDIO_CLKOUT2_A_MARK, |
| 2071 | |
| 2072 | MSIOF0_SYNC_IMARK, |
| 2073 | AUDIO_CLKOUT_A_MARK, |
| 2074 | TX5_B_MARK, |
| 2075 | BPFCLK_D_MARK, |
| 2076 | |
| 2077 | /* IPSR14 */ |
| 2078 | MSIOF0_SS1_IMARK, |
| 2079 | RX5_A_MARK, |
| 2080 | NFWPx_A_MARK, |
| 2081 | AUDIO_CLKA_C_MARK, |
| 2082 | SSI_SCK2_A_MARK, |
| 2083 | STP_IVCXO27_0_C_MARK, |
| 2084 | AUDIO_CLKOUT3_A_MARK, |
| 2085 | TCLK1_B_MARK, |
| 2086 | |
| 2087 | MSIOF0_SS2_IMARK, |
| 2088 | TX5_A_MARK, |
| 2089 | MSIOF1_SS2_D_MARK, |
| 2090 | AUDIO_CLKC_A_MARK, |
| 2091 | SSI_WS2_A_MARK, |
| 2092 | STP_OPWM_0_D_MARK, |
| 2093 | AUDIO_CLKOUT_D_MARK, |
| 2094 | SPEEDIN_B_MARK, |
| 2095 | |
| 2096 | MLB_CLK_IMARK, |
| 2097 | MSIOF1_SCK_F_MARK, |
| 2098 | SCL1_B_MARK, |
| 2099 | |
| 2100 | MLB_SIG_IMARK, |
| 2101 | RX1_B_MARK, |
| 2102 | MSIOF1_SYNC_F_MARK, |
| 2103 | SDA1_B_MARK, |
| 2104 | |
| 2105 | MLB_DAT_IMARK, |
| 2106 | TX1_B_MARK, |
| 2107 | MSIOF1_RXD_F_MARK, |
| 2108 | |
| 2109 | SSI_SCK0129_IMARK, |
| 2110 | MSIOF1_TXD_F_MARK, |
| 2111 | MOUT0_MARK, |
| 2112 | |
| 2113 | SSI_WS0129_IMARK, |
| 2114 | MSIOF1_SS1_F_MARK, |
| 2115 | MOUT1_MARK, |
| 2116 | |
| 2117 | SSI_SDATA0_IMARK, |
| 2118 | MSIOF1_SS2_F_MARK, |
| 2119 | MOUT2_MARK, |
| 2120 | |
| 2121 | /* IPSR15 */ |
| 2122 | SSI_SDATA1_A_IMARK, |
| 2123 | MOUT5_MARK, |
| 2124 | |
| 2125 | SSI_SDATA2_A_IMARK, |
| 2126 | SSI_SCK1_B_MARK, |
| 2127 | MOUT6_MARK, |
| 2128 | |
| 2129 | SSI_SCK34_IMARK, |
| 2130 | MSIOF1_SS1_A_MARK, |
| 2131 | STP_OPWM_0_A_MARK, |
| 2132 | |
| 2133 | SSI_WS34_IMARK, |
| 2134 | HCTS2x_A_MARK, |
| 2135 | MSIOF1_SS2_A_MARK, |
| 2136 | STP_IVCXO27_0_A_MARK, |
| 2137 | |
| 2138 | SSI_SDATA3_IMARK, |
| 2139 | HRTS2x_A_MARK, |
| 2140 | MSIOF1_TXD_A_MARK, |
| 2141 | TS_SCK0_A_MARK, |
| 2142 | STP_ISCLK_0_A_MARK, |
| 2143 | RIF0_D1_A_MARK, |
| 2144 | RIF2_D0_A_MARK, |
| 2145 | |
| 2146 | SSI_SCK4_IMARK, |
| 2147 | HRX2_A_MARK, |
| 2148 | MSIOF1_SCK_A_MARK, |
| 2149 | TS_SDAT0_A_MARK, |
| 2150 | STP_ISD_0_A_MARK, |
| 2151 | RIF0_CLK_A_MARK, |
| 2152 | RIF2_CLK_A_MARK, |
| 2153 | |
| 2154 | SSI_WS4_IMARK, |
| 2155 | HTX2_A_MARK, |
| 2156 | MSIOF1_SYNC_A_MARK, |
| 2157 | TS_SDEN0_A_MARK, |
| 2158 | STP_ISEN_0_A_MARK, |
| 2159 | RIF0_SYNC_A_MARK, |
| 2160 | RIF2_SYNC_A_MARK, |
| 2161 | |
| 2162 | SSI_SDATA4_IMARK, |
| 2163 | HSCK2_A_MARK, |
| 2164 | MSIOF1_RXD_A_MARK, |
| 2165 | TS_SPSYNC0_A_MARK, |
| 2166 | STP_ISSYNC_0_A_MARK, |
| 2167 | RIF0_D0_A_MARK, |
| 2168 | RIF2_D1_A_MARK, |
| 2169 | |
| 2170 | /* IPSR16 */ |
| 2171 | SSI_SCK6_IMARK, |
| 2172 | SIM0_RST_D_MARK, |
| 2173 | FSO_TOE_A_MARK, |
| 2174 | |
| 2175 | SSI_WS6_IMARK, |
| 2176 | SIM0_D_D_MARK, |
| 2177 | |
| 2178 | SSI_SDATA6_IMARK, |
| 2179 | SIM0_CLK_D_MARK, |
| 2180 | |
| 2181 | SSI_SCK78_IMARK, |
| 2182 | HRX2_B_MARK, |
| 2183 | MSIOF1_SCK_C_MARK, |
| 2184 | TS_SCK1_A_MARK, |
| 2185 | STP_ISCLK_1_A_MARK, |
| 2186 | RIF1_CLK_A_MARK, |
| 2187 | RIF3_CLK_A_MARK, |
| 2188 | |
| 2189 | SSI_WS78_IMARK, |
| 2190 | HTX2_B_MARK, |
| 2191 | MSIOF1_SYNC_C_MARK, |
| 2192 | TS_SDAT1_A_MARK, |
| 2193 | STP_ISD_1_A_MARK, |
| 2194 | RIF1_SYNC_A_MARK, |
| 2195 | RIF3_SYNC_A_MARK, |
| 2196 | |
| 2197 | SSI_SDATA7_IMARK, |
| 2198 | HCTS2x_B_MARK, |
| 2199 | MSIOF1_RXD_C_MARK, |
| 2200 | TS_SDEN1_A_MARK, |
| 2201 | STP_IEN_1_A_MARK, |
| 2202 | RIF1_D0_A_MARK, |
| 2203 | RIF3_D0_A_MARK, |
| 2204 | TCLK2_A_MARK, |
| 2205 | |
| 2206 | SSI_SDATA8_IMARK, |
| 2207 | HRTS2x_B_MARK, |
| 2208 | MSIOF1_TXD_C_MARK, |
| 2209 | TS_SPSYNC1_A_MARK, |
| 2210 | STP_ISSYNC_1_A_MARK, |
| 2211 | RIF1_D1_A_MARK, |
| 2212 | EIF3_D1_A_MARK, |
| 2213 | |
| 2214 | SSI_SDATA9_A_IMARK, |
| 2215 | HSCK2_B_MARK, |
| 2216 | MSIOF1_SS1_C_MARK, |
| 2217 | HSCK1_A_MARK, |
| 2218 | SSI_WS1_B_MARK, |
| 2219 | SCK1_MARK, |
| 2220 | STP_IVCXO27_1_A_MARK, |
| 2221 | SCK5_MARK, |
| 2222 | |
| 2223 | /* IPSR17 */ |
| 2224 | AUDIO_CLKA_A_IMARK, |
| 2225 | CC5_OSCOUT_MARK, |
| 2226 | |
| 2227 | AUDIO_CLKB_B_IMARK, |
| 2228 | SCIF_CLK_A_MARK, |
| 2229 | STP_IVCXO27_1_D_MARK, |
| 2230 | REMOCON_A_MARK, |
| 2231 | TCLK1_A_MARK, |
| 2232 | |
| 2233 | USB0_PWEN_IMARK, |
| 2234 | SIM0_RST_C_MARK, |
| 2235 | TS_SCK1_D_MARK, |
| 2236 | STP_ISCLK_1_D_MARK, |
| 2237 | BPFCLK_B_MARK, |
| 2238 | RIF3_CLK_B_MARK, |
| 2239 | FSO_CFE_1_A_MARK, |
| 2240 | HSCK2_C_MARK, |
| 2241 | |
| 2242 | USB0_OVC_IMARK, |
| 2243 | SIM0_D_C_MARK, |
| 2244 | TS_SDAT1_D_MARK, |
| 2245 | STP_ISD_1_D_MARK, |
| 2246 | RIF3_SYNC_B_MARK, |
| 2247 | HRX2_C_MARK, |
| 2248 | |
| 2249 | USB1_PWEN_IMARK, |
| 2250 | SIM0_CLK_C_MARK, |
| 2251 | SSI_SCK1_A_MARK, |
| 2252 | TS_SCK0_E_MARK, |
| 2253 | STP_ISCLK_0_E_MARK, |
| 2254 | FMCLK_B_MARK, |
| 2255 | RIF2_CLK_B_MARK, |
| 2256 | SPEEDIN_A_MARK, |
| 2257 | HTX2_C_MARK, |
| 2258 | |
| 2259 | USB1_OVC_IMARK, |
| 2260 | MSIOF1_SS2_C_MARK, |
| 2261 | SSI_WS1_A_MARK, |
| 2262 | TS_SDAT0_E_MARK, |
| 2263 | STP_ISD_0_E_MARK, |
| 2264 | FMIN_B_MARK, |
| 2265 | RIF2_SYNC_B_MARK, |
| 2266 | REMOCON_B_MARK, |
| 2267 | HCTS2x_C_MARK, |
| 2268 | |
| 2269 | USB30_PWEN_IMARK, |
| 2270 | AUDIO_CLKOUT_B_MARK, |
| 2271 | SSI_SCK2_B_MARK, |
| 2272 | TS_SDEN1_D_MARK, |
| 2273 | STP_ISEN_1_D_MARK, |
| 2274 | STP_OPWM_0_E_MARK, |
| 2275 | RIF3_D0_B_MARK, |
| 2276 | TCLK2_B_MARK, |
| 2277 | TPU0TO0_MARK, |
| 2278 | BPFCLK_C_MARK, |
| 2279 | HRTS2x_C_MARK, |
| 2280 | |
| 2281 | USB30_OVC_IMARK, |
| 2282 | AUDIO_CLKOUT1_B_MARK, |
| 2283 | SSI_WS2_B_MARK, |
| 2284 | TS_SPSYNC1_D_MARK, |
| 2285 | STP_ISSYNC_1_D_MARK, |
| 2286 | STP_IVCXO27_0_E_MARK, |
| 2287 | RIF3_D1_B_MARK, |
| 2288 | FSO_TOE_B_MARK, |
| 2289 | TPU0TO1_MARK, |
| 2290 | |
| 2291 | /* IPSR18 */ |
| 2292 | GP6_30_IMARK, |
| 2293 | AUDIO_CLKOUT2_B_MARK, |
| 2294 | SSI_SCK9_B_MARK, |
| 2295 | TS_SDEN0_E_MARK, |
| 2296 | STP_ISEN_0_E_MARK, |
| 2297 | RIF2_D0_B_MARK, |
| 2298 | FSO_CFE_0_A_MARK, |
| 2299 | TPU0TO2_MARK, |
| 2300 | FMCLK_C_MARK, |
| 2301 | FMCLK_D_MARK, |
| 2302 | |
| 2303 | GP6_31_IMARK, |
| 2304 | AUDIO_CLKOUT3_B_MARK, |
| 2305 | SSI_WS9_B_MARK, |
| 2306 | TS_SPSYNC0_E_MARK, |
| 2307 | STP_ISSYNC_0_E_MARK, |
| 2308 | RIF2_D1_B_MARK, |
| 2309 | TPU0TO3_MARK, |
| 2310 | FMIN_C_MARK, |
| 2311 | FMIN_D_MARK, |
| 2312 | |
| 2313 | PINMUX_MARK_END, |
| 2314 | }; |
| 2315 | |
| 2316 | static pinmux_enum_t pinmux_data[] = { |
| 2317 | PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ |
| 2318 | |
| 2319 | /* GPSR0 */ |
| 2320 | PINMUX_DATA(D15_GMARK, GFN_D15), |
| 2321 | PINMUX_DATA(D14_GMARK, GFN_D14), |
| 2322 | PINMUX_DATA(D13_GMARK, GFN_D13), |
| 2323 | PINMUX_DATA(D12_GMARK, GFN_D12), |
| 2324 | PINMUX_DATA(D11_GMARK, GFN_D11), |
| 2325 | PINMUX_DATA(D10_GMARK, GFN_D10), |
| 2326 | PINMUX_DATA(D9_GMARK, GFN_D9), |
| 2327 | PINMUX_DATA(D8_GMARK, GFN_D8), |
| 2328 | PINMUX_DATA(D7_GMARK, GFN_D7), |
| 2329 | PINMUX_DATA(D6_GMARK, GFN_D6), |
| 2330 | PINMUX_DATA(D5_GMARK, GFN_D5), |
| 2331 | PINMUX_DATA(D4_GMARK, GFN_D4), |
| 2332 | PINMUX_DATA(D3_GMARK, GFN_D3), |
| 2333 | PINMUX_DATA(D2_GMARK, GFN_D2), |
| 2334 | PINMUX_DATA(D1_GMARK, GFN_D1), |
| 2335 | PINMUX_DATA(D0_GMARK, GFN_D0), |
| 2336 | |
| 2337 | /* GPSR1 */ |
| 2338 | PINMUX_DATA(CLKOUT_GMARK, GFN_CLKOUT), |
| 2339 | PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A), |
| 2340 | PINMUX_DATA(WE1x_GMARK, GFN_WE1x), |
| 2341 | PINMUX_DATA(WE0x_GMARK, GFN_WE0x), |
| 2342 | PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx), |
| 2343 | PINMUX_DATA(RDx_GMARK, GFN_RDx), |
| 2344 | PINMUX_DATA(BSx_GMARK, GFN_BSx), |
| 2345 | PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26), |
| 2346 | PINMUX_DATA(CS0x_GMARK, GFN_CS0x), |
| 2347 | PINMUX_DATA(A19_GMARK, GFN_A19), |
| 2348 | PINMUX_DATA(A18_GMARK, GFN_A18), |
| 2349 | PINMUX_DATA(A17_GMARK, GFN_A17), |
| 2350 | PINMUX_DATA(A16_GMARK, GFN_A16), |
| 2351 | PINMUX_DATA(A15_GMARK, GFN_A15), |
| 2352 | PINMUX_DATA(A14_GMARK, GFN_A14), |
| 2353 | PINMUX_DATA(A13_GMARK, GFN_A13), |
| 2354 | PINMUX_DATA(A12_GMARK, GFN_A12), |
| 2355 | PINMUX_DATA(A11_GMARK, GFN_A11), |
| 2356 | PINMUX_DATA(A10_GMARK, GFN_A10), |
| 2357 | PINMUX_DATA(A9_GMARK, GFN_A9), |
| 2358 | PINMUX_DATA(A8_GMARK, GFN_A8), |
| 2359 | PINMUX_DATA(A7_GMARK, GFN_A7), |
| 2360 | PINMUX_DATA(A6_GMARK, GFN_A6), |
| 2361 | PINMUX_DATA(A5_GMARK, GFN_A5), |
| 2362 | PINMUX_DATA(A4_GMARK, GFN_A4), |
| 2363 | PINMUX_DATA(A3_GMARK, GFN_A3), |
| 2364 | PINMUX_DATA(A2_GMARK, GFN_A2), |
| 2365 | PINMUX_DATA(A1_GMARK, GFN_A1), |
| 2366 | PINMUX_DATA(A0_GMARK, GFN_A0), |
| 2367 | |
| 2368 | /* GPSR2 */ |
| 2369 | PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A), |
| 2370 | PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A), |
| 2371 | PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK), |
| 2372 | PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT), |
| 2373 | PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC), |
| 2374 | PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC), |
| 2375 | PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A), |
| 2376 | PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A), |
| 2377 | PINMUX_DATA(PWM0_GMARK, GFN_PWM0), |
| 2378 | PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5), |
| 2379 | PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4), |
| 2380 | PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3), |
| 2381 | PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2), |
| 2382 | PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1), |
| 2383 | PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0), |
| 2384 | |
| 2385 | /* GPSR3 */ |
| 2386 | PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP), |
| 2387 | PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD), |
| 2388 | PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP), |
| 2389 | PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD), |
| 2390 | PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3), |
| 2391 | PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2), |
| 2392 | PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1), |
| 2393 | PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0), |
| 2394 | PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD), |
| 2395 | PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK), |
| 2396 | PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3), |
| 2397 | PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2), |
| 2398 | PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1), |
| 2399 | PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0), |
| 2400 | PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD), |
| 2401 | PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK), |
| 2402 | |
| 2403 | /* GPSR4 */ |
| 2404 | PINMUX_DATA(SD3_DS_GMARK, GFN_SD3_DS), |
| 2405 | PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7), |
| 2406 | PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6), |
| 2407 | PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5), |
| 2408 | PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4), |
| 2409 | PINMUX_DATA(SD3_DAT3_MARK, FN_SD3_DAT3), |
| 2410 | PINMUX_DATA(SD3_DAT2_MARK, FN_SD3_DAT2), |
| 2411 | PINMUX_DATA(SD3_DAT1_MARK, FN_SD3_DAT1), |
| 2412 | PINMUX_DATA(SD3_DAT0_MARK, FN_SD3_DAT0), |
| 2413 | PINMUX_DATA(SD3_CMD_MARK, FN_SD3_CMD), |
| 2414 | PINMUX_DATA(SD3_CLK_MARK, FN_SD3_CLK), |
| 2415 | PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS), |
| 2416 | PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3), |
| 2417 | PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2), |
| 2418 | PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1), |
| 2419 | PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0), |
| 2420 | PINMUX_DATA(SD2_CMD_MARK, FN_SD2_CMD), |
| 2421 | PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK), |
| 2422 | |
| 2423 | /* GPSR5 */ |
| 2424 | PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT), |
| 2425 | PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG), |
| 2426 | PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK), |
| 2427 | PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD), |
| 2428 | PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2), |
| 2429 | PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD), |
| 2430 | PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1), |
| 2431 | PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC), |
| 2432 | PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK), |
| 2433 | PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x), |
| 2434 | PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x), |
| 2435 | PINMUX_DATA(HTX0_GMARK, GFN_HTX0), |
| 2436 | PINMUX_DATA(HRX0_GMARK, GFN_HRX0), |
| 2437 | PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0), |
| 2438 | PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A), |
| 2439 | PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A), |
| 2440 | PINMUX_DATA(SCK2_GMARK, GFN_SCK2), |
| 2441 | PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS), |
| 2442 | PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x), |
| 2443 | PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A), |
| 2444 | PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A), |
| 2445 | PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS), |
| 2446 | PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x), |
| 2447 | PINMUX_DATA(TX0_GMARK, GFN_TX0), |
| 2448 | PINMUX_DATA(RX0_GMARK, GFN_RX0), |
| 2449 | PINMUX_DATA(SCK0_GMARK, GFN_SCK0), |
| 2450 | |
| 2451 | /* GPSR6 */ |
| 2452 | PINMUX_DATA(GP6_30_GMARK, GFN_GP6_30), |
| 2453 | PINMUX_DATA(GP6_31_GMARK, GFN_GP6_31), |
| 2454 | PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC), |
| 2455 | PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN), |
| 2456 | PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC), |
| 2457 | PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN), |
| 2458 | PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC), |
| 2459 | PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN), |
| 2460 | PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B), |
| 2461 | PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A), |
| 2462 | PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A), |
| 2463 | PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8), |
| 2464 | PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7), |
| 2465 | PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78), |
| 2466 | PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78), |
| 2467 | PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6), |
| 2468 | PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6), |
| 2469 | PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6), |
| 2470 | PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5), |
| 2471 | PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5), |
| 2472 | PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5), |
| 2473 | PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4), |
| 2474 | PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4), |
| 2475 | PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4), |
| 2476 | PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3), |
| 2477 | PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34), |
| 2478 | PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34), |
| 2479 | PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A), |
| 2480 | PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A), |
| 2481 | PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0), |
| 2482 | PINMUX_DATA(SSI_WS01239_GMARK, GFN_SSI_WS01239), |
| 2483 | PINMUX_DATA(SSI_SCK01239_GMARK, GFN_SSI_SCK01239), |
| 2484 | |
| 2485 | /* GPSR7 */ |
| 2486 | PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC), |
| 2487 | PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC), |
| 2488 | PINMUX_DATA(AVS2_MARK, FN_AVS2), |
| 2489 | PINMUX_DATA(AVS1_MARK, FN_AVS1), |
| 2490 | |
| 2491 | /* ipsr setting .. underconstruction */ |
| 2492 | }; |
| 2493 | |
| 2494 | static struct pinmux_gpio pinmux_gpios[] = { |
| 2495 | PINMUX_GPIO_GP_ALL(), |
| 2496 | /* GPSR0 */ |
| 2497 | GPIO_GFN(D15), |
| 2498 | GPIO_GFN(D14), |
| 2499 | GPIO_GFN(D13), |
| 2500 | GPIO_GFN(D12), |
| 2501 | GPIO_GFN(D11), |
| 2502 | GPIO_GFN(D10), |
| 2503 | GPIO_GFN(D9), |
| 2504 | GPIO_GFN(D8), |
| 2505 | GPIO_GFN(D7), |
| 2506 | GPIO_GFN(D6), |
| 2507 | GPIO_GFN(D5), |
| 2508 | GPIO_GFN(D4), |
| 2509 | GPIO_GFN(D3), |
| 2510 | GPIO_GFN(D2), |
| 2511 | GPIO_GFN(D1), |
| 2512 | GPIO_GFN(D0), |
| 2513 | /* GPSR1 */ |
| 2514 | GPIO_GFN(CLKOUT), |
| 2515 | GPIO_GFN(EX_WAIT0_A), |
| 2516 | GPIO_GFN(WE1x), |
| 2517 | GPIO_GFN(WE0x), |
| 2518 | GPIO_GFN(RD_WRx), |
| 2519 | GPIO_GFN(RDx), |
| 2520 | GPIO_GFN(BSx), |
| 2521 | GPIO_GFN(CS1x_A26), |
| 2522 | GPIO_GFN(CS0x), |
| 2523 | GPIO_GFN(A19), |
| 2524 | GPIO_GFN(A18), |
| 2525 | GPIO_GFN(A17), |
| 2526 | GPIO_GFN(A16), |
| 2527 | GPIO_GFN(A15), |
| 2528 | GPIO_GFN(A14), |
| 2529 | GPIO_GFN(A13), |
| 2530 | GPIO_GFN(A12), |
| 2531 | GPIO_GFN(A11), |
| 2532 | GPIO_GFN(A10), |
| 2533 | GPIO_GFN(A9), |
| 2534 | GPIO_GFN(A8), |
| 2535 | GPIO_GFN(A7), |
| 2536 | GPIO_GFN(A6), |
| 2537 | GPIO_GFN(A5), |
| 2538 | GPIO_GFN(A4), |
| 2539 | GPIO_GFN(A3), |
| 2540 | GPIO_GFN(A2), |
| 2541 | GPIO_GFN(A1), |
| 2542 | GPIO_GFN(A0), |
| 2543 | |
| 2544 | /* GPSR2 */ |
| 2545 | GPIO_GFN(AVB_AVTP_CAPTURE_A), |
| 2546 | GPIO_GFN(AVB_AVTP_MATCH_A), |
| 2547 | GPIO_GFN(AVB_LINK), |
| 2548 | GPIO_GFN(AVB_PHY_INT), |
| 2549 | GPIO_GFN(AVB_MAGIC), |
| 2550 | GPIO_GFN(AVB_MDC), |
| 2551 | GPIO_GFN(PWM2_A), |
| 2552 | GPIO_GFN(PWM1_A), |
| 2553 | GPIO_GFN(PWM0), |
| 2554 | GPIO_GFN(IRQ5), |
| 2555 | GPIO_GFN(IRQ4), |
| 2556 | GPIO_GFN(IRQ3), |
| 2557 | GPIO_GFN(IRQ2), |
| 2558 | GPIO_GFN(IRQ1), |
| 2559 | GPIO_GFN(IRQ0), |
| 2560 | |
| 2561 | /* GPSR3 */ |
| 2562 | GPIO_GFN(SD1_WP), |
| 2563 | GPIO_GFN(SD1_CD), |
| 2564 | GPIO_GFN(SD0_WP), |
| 2565 | GPIO_GFN(SD0_CD), |
| 2566 | GPIO_GFN(SD1_DAT3), |
| 2567 | GPIO_GFN(SD1_DAT2), |
| 2568 | GPIO_GFN(SD1_DAT1), |
| 2569 | GPIO_GFN(SD1_DAT0), |
| 2570 | GPIO_GFN(SD1_CMD), |
| 2571 | GPIO_GFN(SD1_CLK), |
| 2572 | GPIO_GFN(SD0_DAT3), |
| 2573 | GPIO_GFN(SD0_DAT2), |
| 2574 | GPIO_GFN(SD0_DAT1), |
| 2575 | GPIO_GFN(SD0_DAT0), |
| 2576 | GPIO_GFN(SD0_CMD), |
| 2577 | GPIO_GFN(SD0_CLK), |
| 2578 | |
| 2579 | /* GPSR4 */ |
| 2580 | GPIO_GFN(SD3_DS), |
| 2581 | GPIO_GFN(SD3_DAT7), |
| 2582 | GPIO_GFN(SD3_DAT6), |
| 2583 | GPIO_GFN(SD3_DAT5), |
| 2584 | GPIO_GFN(SD3_DAT4), |
| 2585 | GPIO_FN(SD3_DAT3), |
| 2586 | GPIO_FN(SD3_DAT2), |
| 2587 | GPIO_FN(SD3_DAT1), |
| 2588 | GPIO_FN(SD3_DAT0), |
| 2589 | GPIO_FN(SD3_CMD), |
| 2590 | GPIO_FN(SD3_CLK), |
| 2591 | GPIO_GFN(SD2_DS), |
| 2592 | GPIO_GFN(SD2_DAT3), |
| 2593 | GPIO_GFN(SD2_DAT2), |
| 2594 | GPIO_GFN(SD2_DAT1), |
| 2595 | GPIO_GFN(SD2_DAT0), |
| 2596 | GPIO_FN(SD2_CMD), |
| 2597 | GPIO_GFN(SD2_CLK), |
| 2598 | |
| 2599 | /* GPSR5 */ |
| 2600 | GPIO_GFN(MLB_DAT), |
| 2601 | GPIO_GFN(MLB_SIG), |
| 2602 | GPIO_GFN(MLB_CLK), |
| 2603 | GPIO_FN(MSIOF0_RXD), |
| 2604 | GPIO_GFN(MSIOF0_SS2), |
| 2605 | GPIO_FN(MSIOF0_TXD), |
| 2606 | GPIO_GFN(MSIOF0_SS1), |
| 2607 | GPIO_GFN(MSIOF0_SYNC), |
| 2608 | GPIO_FN(MSIOF0_SCK), |
| 2609 | GPIO_GFN(HRTS0x), |
| 2610 | GPIO_GFN(HCTS0x), |
| 2611 | GPIO_GFN(HTX0), |
| 2612 | GPIO_GFN(HRX0), |
| 2613 | GPIO_GFN(HSCK0), |
| 2614 | GPIO_GFN(RX2_A), |
| 2615 | GPIO_GFN(TX2_A), |
| 2616 | GPIO_GFN(SCK2), |
| 2617 | GPIO_GFN(RTS1x_TANS), |
| 2618 | GPIO_GFN(CTS1x), |
| 2619 | GPIO_GFN(TX1_A), |
| 2620 | GPIO_GFN(RX1_A), |
| 2621 | GPIO_GFN(RTS0x_TANS), |
| 2622 | GPIO_GFN(CTS0x), |
| 2623 | GPIO_GFN(TX0), |
| 2624 | GPIO_GFN(RX0), |
| 2625 | GPIO_GFN(SCK0), |
| 2626 | |
| 2627 | /* GPSR6 */ |
| 2628 | GPIO_GFN(GP6_30), |
| 2629 | GPIO_GFN(GP6_31), |
| 2630 | GPIO_GFN(USB30_OVC), |
| 2631 | GPIO_GFN(USB30_PWEN), |
| 2632 | GPIO_GFN(USB1_OVC), |
| 2633 | GPIO_GFN(USB1_PWEN), |
| 2634 | GPIO_GFN(USB0_OVC), |
| 2635 | GPIO_GFN(USB0_PWEN), |
| 2636 | GPIO_GFN(AUDIO_CLKB_B), |
| 2637 | GPIO_GFN(AUDIO_CLKA_A), |
| 2638 | GPIO_GFN(SSI_SDATA9_A), |
| 2639 | GPIO_GFN(SSI_SDATA8), |
| 2640 | GPIO_GFN(SSI_SDATA7), |
| 2641 | GPIO_GFN(SSI_WS78), |
| 2642 | GPIO_GFN(SSI_SCK78), |
| 2643 | GPIO_GFN(SSI_SDATA6), |
| 2644 | GPIO_GFN(SSI_WS6), |
| 2645 | GPIO_GFN(SSI_SCK6), |
| 2646 | GPIO_FN(SSI_SDATA5), |
| 2647 | GPIO_FN(SSI_WS5), |
| 2648 | GPIO_FN(SSI_SCK5), |
| 2649 | GPIO_GFN(SSI_SDATA4), |
| 2650 | GPIO_GFN(SSI_WS4), |
| 2651 | GPIO_GFN(SSI_SCK4), |
| 2652 | GPIO_GFN(SSI_SDATA3), |
| 2653 | GPIO_GFN(SSI_WS34), |
| 2654 | GPIO_GFN(SSI_SCK34), |
| 2655 | GPIO_GFN(SSI_SDATA2_A), |
| 2656 | GPIO_GFN(SSI_SDATA1_A), |
| 2657 | GPIO_GFN(SSI_SDATA0), |
| 2658 | GPIO_GFN(SSI_WS01239), |
| 2659 | GPIO_GFN(SSI_SCK01239), |
| 2660 | |
| 2661 | /* GPSR7 */ |
| 2662 | GPIO_FN(HDMI1_CEC), |
| 2663 | GPIO_FN(HDMI0_CEC), |
| 2664 | GPIO_FN(AVS2), |
| 2665 | GPIO_FN(AVS1), |
| 2666 | |
| 2667 | /* IPSR0 */ |
| 2668 | GPIO_IFN(AVB_MDC), |
| 2669 | GPIO_FN(MSIOF2_SS2_C), |
| 2670 | GPIO_IFN(AVB_MAGIC), |
| 2671 | GPIO_FN(MSIOF2_SS1_C), |
| 2672 | GPIO_FN(SCK4_A), |
| 2673 | GPIO_IFN(AVB_PHY_INT), |
| 2674 | GPIO_FN(MSIOF2_SYNC_C), |
| 2675 | GPIO_FN(RX4_A), |
| 2676 | GPIO_IFN(AVB_LINK), |
| 2677 | GPIO_FN(MSIOF2_SCK_C), |
| 2678 | GPIO_FN(TX4_A), |
| 2679 | GPIO_IFN(AVB_AVTP_MATCH_A), |
| 2680 | GPIO_FN(MSIOF2_RXD_C), |
| 2681 | GPIO_FN(CTS4x_A), |
| 2682 | GPIO_IFN(AVB_AVTP_CAPTURE_A), |
| 2683 | GPIO_FN(MSIOF2_TXD_C), |
| 2684 | GPIO_FN(RTS4x_TANS_A), |
| 2685 | GPIO_IFN(IRQ0), |
| 2686 | GPIO_FN(QPOLB), |
| 2687 | GPIO_FN(DU_CDE), |
| 2688 | GPIO_FN(VI4_DATA0_B), |
| 2689 | GPIO_FN(CAN0_TX_B), |
| 2690 | GPIO_FN(CANFD0_TX_B), |
| 2691 | GPIO_FN(MSIOF3_SS2_E), |
| 2692 | GPIO_IFN(IRQ1), |
| 2693 | GPIO_FN(QPOLA), |
| 2694 | GPIO_FN(DU_DISP), |
| 2695 | GPIO_FN(VI4_DATA1_B), |
| 2696 | GPIO_FN(CAN0_RX_B), |
| 2697 | GPIO_FN(CANFD0_RX_B), |
| 2698 | GPIO_FN(MSIOF3_SS1_E), |
| 2699 | |
| 2700 | /* IPSR1 */ |
| 2701 | GPIO_IFN(IRQ2), |
| 2702 | GPIO_FN(QCPV_QDE), |
| 2703 | GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE), |
| 2704 | GPIO_FN(VI4_DATA2_B), |
| 2705 | GPIO_FN(MSIOF3_SYNC_E), |
| 2706 | GPIO_FN(PWM3_B), |
| 2707 | GPIO_IFN(IRQ3), |
| 2708 | GPIO_FN(QSTVB_QVE), |
| 2709 | GPIO_FN(DU_DOTCLKOUT1), |
| 2710 | GPIO_FN(VI4_DATA3_B), |
| 2711 | GPIO_FN(MSIOF3_SCK_E), |
| 2712 | GPIO_FN(PWM4_B), |
| 2713 | GPIO_IFN(IRQ4), |
| 2714 | GPIO_FN(QSTH_QHS), |
| 2715 | GPIO_FN(DU_EXHSYNC_DU_HSYNC), |
| 2716 | GPIO_FN(VI4_DATA4_B), |
| 2717 | GPIO_FN(MSIOF3_RXD_E), |
| 2718 | GPIO_FN(PWM5_B), |
| 2719 | GPIO_IFN(IRQ5), |
| 2720 | GPIO_FN(QSTB_QHE), |
| 2721 | GPIO_FN(DU_EXVSYNC_DU_VSYNC), |
| 2722 | GPIO_FN(VI4_DATA5_B), |
| 2723 | GPIO_FN(MSIOF3_TXD_E), |
| 2724 | GPIO_FN(PWM6_B), |
| 2725 | GPIO_IFN(PWM0), |
| 2726 | GPIO_FN(AVB_AVTP_PPS), |
| 2727 | GPIO_FN(VI4_DATA6_B), |
| 2728 | GPIO_FN(IECLK_B), |
| 2729 | GPIO_IFN(PWM1_A), |
| 2730 | GPIO_FN(HRX3_D), |
| 2731 | GPIO_FN(VI4_DATA7_B), |
| 2732 | GPIO_FN(IERX_B), |
| 2733 | GPIO_IFN(PWM2_A), |
| 2734 | GPIO_FN(PWMFSW0), |
| 2735 | GPIO_FN(HTX3_D), |
| 2736 | GPIO_FN(IETX_B), |
| 2737 | GPIO_IFN(A0), |
| 2738 | GPIO_FN(LCDOUT16), |
| 2739 | GPIO_FN(MSIOF3_SYNC_B), |
| 2740 | GPIO_FN(VI4_DATA8), |
| 2741 | GPIO_FN(DU_DB0), |
| 2742 | GPIO_FN(PWM3_A), |
| 2743 | |
| 2744 | /* IPSR2 */ |
| 2745 | GPIO_IFN(A1), |
| 2746 | GPIO_FN(LCDOUT17), |
| 2747 | GPIO_FN(MSIOF3_TXD_B), |
| 2748 | GPIO_FN(VI4_DATA9), |
| 2749 | GPIO_FN(DU_DB1), |
| 2750 | GPIO_FN(PWM4_A), |
| 2751 | GPIO_IFN(A2), |
| 2752 | GPIO_FN(LCDOUT18), |
| 2753 | GPIO_FN(MSIOF3_SCK_B), |
| 2754 | GPIO_FN(VI4_DATA10), |
| 2755 | GPIO_FN(DU_DB2), |
| 2756 | GPIO_FN(PWM5_A), |
| 2757 | GPIO_IFN(A3), |
| 2758 | GPIO_FN(LCDOUT19), |
| 2759 | GPIO_FN(MSIOF3_RXD_B), |
| 2760 | GPIO_FN(VI4_DATA11), |
| 2761 | GPIO_FN(DU_DB3), |
| 2762 | GPIO_FN(PWM6_A), |
| 2763 | GPIO_IFN(A4), |
| 2764 | GPIO_FN(LCDOUT20), |
| 2765 | GPIO_FN(MSIOF3_SS1_B), |
| 2766 | GPIO_FN(VI4_DATA12), |
| 2767 | GPIO_FN(VI5_DATA12), |
| 2768 | GPIO_FN(DU_DB4), |
| 2769 | GPIO_IFN(A5), |
| 2770 | GPIO_FN(LCDOUT21), |
| 2771 | GPIO_FN(MSIOF3_SS2_B), |
| 2772 | GPIO_FN(SCK4_B), |
| 2773 | GPIO_FN(VI4_DATA13), |
| 2774 | GPIO_FN(VI5_DATA13), |
| 2775 | GPIO_FN(DU_DB5), |
| 2776 | GPIO_IFN(A6), |
| 2777 | GPIO_FN(LCDOUT22), |
| 2778 | GPIO_FN(MSIOF2_SS1_A), |
| 2779 | GPIO_FN(RX4_B), |
| 2780 | GPIO_FN(VI4_DATA14), |
| 2781 | GPIO_FN(VI5_DATA14), |
| 2782 | GPIO_FN(DU_DB6), |
| 2783 | GPIO_IFN(A7), |
| 2784 | GPIO_FN(LCDOUT23), |
| 2785 | GPIO_FN(MSIOF2_SS2_A), |
| 2786 | GPIO_FN(TX4_B), |
| 2787 | GPIO_FN(VI4_DATA15), |
| 2788 | GPIO_FN(V15_DATA15), |
| 2789 | GPIO_FN(DU_DB7), |
| 2790 | GPIO_IFN(A8), |
| 2791 | GPIO_FN(RX3_B), |
| 2792 | GPIO_FN(MSIOF2_SYNC_A), |
| 2793 | GPIO_FN(HRX4_B), |
| 2794 | GPIO_FN(SDA6_A), |
| 2795 | GPIO_FN(AVB_AVTP_MATCH_B), |
| 2796 | GPIO_FN(PWM1_B), |
| 2797 | |
| 2798 | /* IPSR3 */ |
| 2799 | GPIO_IFN(A9), |
| 2800 | GPIO_FN(MSIOF2_SCK_A), |
| 2801 | GPIO_FN(CTS4x_B), |
| 2802 | GPIO_FN(VI5_VSYNCx), |
| 2803 | GPIO_IFN(A10), |
| 2804 | GPIO_FN(MSIOF2_RXD_A), |
| 2805 | GPIO_FN(RTS4n_TANS_B), |
| 2806 | GPIO_FN(VI5_HSYNCx), |
| 2807 | GPIO_IFN(A11), |
| 2808 | GPIO_FN(TX3_B), |
| 2809 | GPIO_FN(MSIOF2_TXD_A), |
| 2810 | GPIO_FN(HTX4_B), |
| 2811 | GPIO_FN(HSCK4), |
| 2812 | GPIO_FN(VI5_FIELD), |
| 2813 | GPIO_FN(SCL6_A), |
| 2814 | GPIO_FN(AVB_AVTP_CAPTURE_B), |
| 2815 | GPIO_FN(PWM2_B), |
| 2816 | GPIO_FN(SPV_EVEN), |
| 2817 | GPIO_IFN(A12), |
| 2818 | GPIO_FN(LCDOUT12), |
| 2819 | GPIO_FN(MSIOF3_SCK_C), |
| 2820 | GPIO_FN(HRX4_A), |
| 2821 | GPIO_FN(VI5_DATA8), |
| 2822 | GPIO_FN(DU_DG4), |
| 2823 | GPIO_IFN(A13), |
| 2824 | GPIO_FN(LCDOUT13), |
| 2825 | GPIO_FN(MSIOF3_SYNC_C), |
| 2826 | GPIO_FN(HTX4_A), |
| 2827 | GPIO_FN(VI5_DATA9), |
| 2828 | GPIO_FN(DU_DG5), |
| 2829 | GPIO_IFN(A14), |
| 2830 | GPIO_FN(LCDOUT14), |
| 2831 | GPIO_FN(MSIOF3_RXD_C), |
| 2832 | GPIO_FN(HCTS4x), |
| 2833 | GPIO_FN(VI5_DATA10), |
| 2834 | GPIO_FN(DU_DG6), |
| 2835 | GPIO_IFN(A15), |
| 2836 | GPIO_FN(LCDOUT15), |
| 2837 | GPIO_FN(MSIOF3_TXD_C), |
| 2838 | GPIO_FN(HRTS4x), |
| 2839 | GPIO_FN(VI5_DATA11), |
| 2840 | GPIO_FN(DU_DG7), |
| 2841 | GPIO_IFN(A16), |
| 2842 | GPIO_FN(LCDOUT8), |
| 2843 | GPIO_FN(VI4_FIELD), |
| 2844 | GPIO_FN(DU_DG0), |
| 2845 | |
| 2846 | /* IPSR4 */ |
| 2847 | GPIO_IFN(A17), |
| 2848 | GPIO_FN(LCDOUT9), |
| 2849 | GPIO_FN(VI4_VSYNCx), |
| 2850 | GPIO_FN(DU_DG1), |
| 2851 | GPIO_IFN(A18), |
| 2852 | GPIO_FN(LCDOUT10), |
| 2853 | GPIO_FN(VI4_HSYNCx), |
| 2854 | GPIO_FN(DU_DG2), |
| 2855 | GPIO_IFN(A19), |
| 2856 | GPIO_FN(LCDOUT11), |
| 2857 | GPIO_FN(VI4_CLKENB), |
| 2858 | GPIO_FN(DU_DG3), |
| 2859 | GPIO_IFN(CS0x), |
| 2860 | GPIO_FN(VI5_CLKENB), |
| 2861 | GPIO_IFN(CS1x_A26), |
| 2862 | GPIO_FN(VI5_CLK), |
| 2863 | GPIO_FN(EX_WAIT0_B), |
| 2864 | GPIO_IFN(BSx), |
| 2865 | GPIO_FN(QSTVA_QVS), |
| 2866 | GPIO_FN(MSIOF3_SCK_D), |
| 2867 | GPIO_FN(SCK3), |
| 2868 | GPIO_FN(HSCK3), |
| 2869 | GPIO_FN(CAN1_TX), |
| 2870 | GPIO_FN(CANFD1_TX), |
| 2871 | GPIO_FN(IETX_A), |
| 2872 | GPIO_IFN(RDx), |
| 2873 | GPIO_FN(MSIOF3_SYNC_D), |
| 2874 | GPIO_FN(RX3_A), |
| 2875 | GPIO_FN(HRX3_A), |
| 2876 | GPIO_FN(CAN0_TX_A), |
| 2877 | GPIO_FN(CANFD0_TX_A), |
| 2878 | GPIO_IFN(RD_WRx), |
| 2879 | GPIO_FN(MSIOF3_RXD_D), |
| 2880 | GPIO_FN(TX3_A), |
| 2881 | GPIO_FN(HTX3_A), |
| 2882 | GPIO_FN(CAN0_RX_A), |
| 2883 | GPIO_FN(CANFD0_RX_A), |
| 2884 | |
| 2885 | /* IPSR5 */ |
| 2886 | GPIO_IFN(WE0x), |
| 2887 | GPIO_FN(MSIIOF3_TXD_D), |
| 2888 | GPIO_FN(CTS3x), |
| 2889 | GPIO_FN(HCTS3x), |
| 2890 | GPIO_FN(SCL6_B), |
| 2891 | GPIO_FN(CAN_CLK), |
| 2892 | GPIO_FN(IECLK_A), |
| 2893 | GPIO_IFN(WE1x), |
| 2894 | GPIO_FN(MSIOF3_SS1_D), |
| 2895 | GPIO_FN(RTS3x_TANS), |
| 2896 | GPIO_FN(HRTS3x), |
| 2897 | GPIO_FN(SDA6_B), |
| 2898 | GPIO_FN(CAN1_RX), |
| 2899 | GPIO_FN(CANFD1_RX), |
| 2900 | GPIO_FN(IERX_A), |
| 2901 | GPIO_IFN(EX_WAIT0_A), |
| 2902 | GPIO_FN(QCLK), |
| 2903 | GPIO_FN(VI4_CLK), |
| 2904 | GPIO_FN(DU_DOTCLKOUT0), |
| 2905 | GPIO_IFN(D0), |
| 2906 | GPIO_FN(MSIOF2_SS1_B), |
| 2907 | GPIO_FN(MSIOF3_SCK_A), |
| 2908 | GPIO_FN(VI4_DATA16), |
| 2909 | GPIO_FN(VI5_DATA0), |
| 2910 | GPIO_IFN(D1), |
| 2911 | GPIO_FN(MSIOF2_SS2_B), |
| 2912 | GPIO_FN(MSIOF3_SYNC_A), |
| 2913 | GPIO_FN(VI4_DATA17), |
| 2914 | GPIO_FN(VI5_DATA1), |
| 2915 | GPIO_IFN(D2), |
| 2916 | GPIO_FN(MSIOF3_RXD_A), |
| 2917 | GPIO_FN(VI4_DATA18), |
| 2918 | GPIO_FN(VI5_DATA2), |
| 2919 | GPIO_IFN(D3), |
| 2920 | GPIO_FN(MSIOF3_TXD_A), |
| 2921 | GPIO_FN(VI4_DATA19), |
| 2922 | GPIO_FN(VI5_DATA3), |
| 2923 | GPIO_IFN(D4), |
| 2924 | GPIO_FN(MSIOF2_SCK_B), |
| 2925 | GPIO_FN(VI4_DATA20), |
| 2926 | GPIO_FN(VI5_DATA4), |
| 2927 | |
| 2928 | /* IPSR6 */ |
| 2929 | GPIO_IFN(D5), |
| 2930 | GPIO_FN(MSIOF2_SYNC_B), |
| 2931 | GPIO_FN(VI4_DATA21), |
| 2932 | GPIO_FN(VI5_DATA5), |
| 2933 | GPIO_IFN(D6), |
| 2934 | GPIO_FN(MSIOF2_RXD_B), |
| 2935 | GPIO_FN(VI4_DATA22), |
| 2936 | GPIO_FN(VI5_DATA6), |
| 2937 | GPIO_IFN(D7), |
| 2938 | GPIO_FN(MSIOF2_TXD_B), |
| 2939 | GPIO_FN(VI4_DATA23), |
| 2940 | GPIO_FN(VI5_DATA7), |
| 2941 | GPIO_IFN(D8), |
| 2942 | GPIO_FN(LCDOUT0), |
| 2943 | GPIO_FN(MSIOF2_SCK_D), |
| 2944 | GPIO_FN(SCK4_C), |
| 2945 | GPIO_FN(VI4_DATA0_A), |
| 2946 | GPIO_FN(DU_DR0), |
| 2947 | GPIO_IFN(D9), |
| 2948 | GPIO_FN(LCDOUT1), |
| 2949 | GPIO_FN(MSIOF2_SYNC_D), |
| 2950 | GPIO_FN(VI4_DATA1_A), |
| 2951 | GPIO_FN(DU_DR1), |
| 2952 | GPIO_IFN(D10), |
| 2953 | GPIO_FN(LCDOUT2), |
| 2954 | GPIO_FN(MSIOF2_RXD_D), |
| 2955 | GPIO_FN(HRX3_B), |
| 2956 | GPIO_FN(VI4_DATA2_A), |
| 2957 | GPIO_FN(CTS4x_C), |
| 2958 | GPIO_FN(DU_DR2), |
| 2959 | GPIO_IFN(D11), |
| 2960 | GPIO_FN(LCDOUT3), |
| 2961 | GPIO_FN(MSIOF2_TXD_D), |
| 2962 | GPIO_FN(HTX3_B), |
| 2963 | GPIO_FN(VI4_DATA3_A), |
| 2964 | GPIO_FN(RTS4x_TANS_C), |
| 2965 | GPIO_FN(DU_DR3), |
| 2966 | GPIO_IFN(D12), |
| 2967 | GPIO_FN(LCDOUT4), |
| 2968 | GPIO_FN(MSIOF2_SS1_D), |
| 2969 | GPIO_FN(RX4_C), |
| 2970 | GPIO_FN(VI4_DATA4_A), |
| 2971 | GPIO_FN(DU_DR4), |
| 2972 | |
| 2973 | /* IPSR7 */ |
| 2974 | GPIO_IFN(D13), |
| 2975 | GPIO_FN(LCDOUT5), |
| 2976 | GPIO_FN(MSIOF2_SS2_D), |
| 2977 | GPIO_FN(TX4_C), |
| 2978 | GPIO_FN(VI4_DATA5_A), |
| 2979 | GPIO_FN(DU_DR5), |
| 2980 | GPIO_IFN(D14), |
| 2981 | GPIO_FN(LCDOUT6), |
| 2982 | GPIO_FN(MSIOF3_SS1_A), |
| 2983 | GPIO_FN(HRX3_C), |
| 2984 | GPIO_FN(VI4_DATA6_A), |
| 2985 | GPIO_FN(DU_DR6), |
| 2986 | GPIO_FN(SCL6_C), |
| 2987 | GPIO_IFN(D15), |
| 2988 | GPIO_FN(LCDOUT7), |
| 2989 | GPIO_FN(MSIOF3_SS2_A), |
| 2990 | GPIO_FN(HTX3_C), |
| 2991 | GPIO_FN(VI4_DATA7_A), |
| 2992 | GPIO_FN(DU_DR7), |
| 2993 | GPIO_FN(SDA6_C), |
| 2994 | GPIO_FN(FSCLKST), |
| 2995 | GPIO_IFN(SD0_CLK), |
| 2996 | GPIO_FN(MSIOF1_SCK_E), |
| 2997 | GPIO_FN(STP_OPWM_0_B), |
| 2998 | GPIO_IFN(SD0_CMD), |
| 2999 | GPIO_FN(MSIOF1_SYNC_E), |
| 3000 | GPIO_FN(STP_IVCXO27_0_B), |
| 3001 | GPIO_IFN(SD0_DAT0), |
| 3002 | GPIO_FN(MSIOF1_RXD_E), |
| 3003 | GPIO_FN(TS_SCK0_B), |
| 3004 | GPIO_FN(STP_ISCLK_0_B), |
| 3005 | GPIO_IFN(SD0_DAT1), |
| 3006 | GPIO_FN(MSIOF1_TXD_E), |
| 3007 | GPIO_FN(TS_SPSYNC0_B), |
| 3008 | GPIO_FN(STP_ISSYNC_0_B), |
| 3009 | |
| 3010 | /* IPSR8 */ |
| 3011 | GPIO_IFN(SD0_DAT2), |
| 3012 | GPIO_FN(MSIOF1_SS1_E), |
| 3013 | GPIO_FN(TS_SDAT0_B), |
| 3014 | GPIO_FN(STP_ISD_0_B), |
| 3015 | |
| 3016 | GPIO_IFN(SD0_DAT3), |
| 3017 | GPIO_FN(MSIOF1_SS2_E), |
| 3018 | GPIO_FN(TS_SDEN0_B), |
| 3019 | GPIO_FN(STP_ISEN_0_B), |
| 3020 | |
| 3021 | GPIO_IFN(SD1_CLK), |
| 3022 | GPIO_FN(MSIOF1_SCK_G), |
| 3023 | GPIO_FN(SIM0_CLK_A), |
| 3024 | |
| 3025 | GPIO_IFN(SD1_CMD), |
| 3026 | GPIO_FN(MSIOF1_SYNC_G), |
| 3027 | GPIO_FN(NFCEx_B), |
| 3028 | GPIO_FN(SIM0_D_A), |
| 3029 | GPIO_FN(STP_IVCXO27_1_B), |
| 3030 | |
| 3031 | GPIO_IFN(SD1_DAT0), |
| 3032 | GPIO_FN(SD2_DAT4), |
| 3033 | GPIO_FN(MSIOF1_RXD_G), |
| 3034 | GPIO_FN(NFWPx_B), |
| 3035 | GPIO_FN(TS_SCK1_B), |
| 3036 | GPIO_FN(STP_ISCLK_1_B), |
| 3037 | |
| 3038 | GPIO_IFN(SD1_DAT1), |
| 3039 | GPIO_FN(SD2_DAT5), |
| 3040 | GPIO_FN(MSIOF1_TXD_G), |
| 3041 | GPIO_FN(NFDATA14_B), |
| 3042 | GPIO_FN(TS_SPSYNC1_B), |
| 3043 | GPIO_FN(STP_ISSYNC_1_B), |
| 3044 | |
| 3045 | GPIO_IFN(SD1_DAT2), |
| 3046 | GPIO_FN(SD2_DAT6), |
| 3047 | GPIO_FN(MSIOF1_SS1_G), |
| 3048 | GPIO_FN(NFDATA15_B), |
| 3049 | GPIO_FN(TS_SDAT1_B), |
| 3050 | GPIO_FN(STP_IOD_1_B), |
| 3051 | |
| 3052 | GPIO_IFN(SD1_DAT3), |
| 3053 | GPIO_FN(SD2_DAT7), |
| 3054 | GPIO_FN(MSIOF1_SS2_G), |
| 3055 | GPIO_FN(NFRBx_B), |
| 3056 | GPIO_FN(TS_SDEN1_B), |
| 3057 | GPIO_FN(STP_ISEN_1_B), |
| 3058 | |
| 3059 | /* IPSR9 */ |
| 3060 | GPIO_IFN(SD2_CLK), |
| 3061 | GPIO_FN(NFDATA8), |
| 3062 | |
| 3063 | GPIO_IFN(SD2_CMD), |
| 3064 | GPIO_FN(NFDATA9), |
| 3065 | |
| 3066 | GPIO_IFN(SD2_DAT0), |
| 3067 | GPIO_FN(NFDATA10), |
| 3068 | |
| 3069 | GPIO_IFN(SD2_DAT1), |
| 3070 | GPIO_FN(NFDATA11), |
| 3071 | |
| 3072 | GPIO_IFN(SD2_DAT2), |
| 3073 | GPIO_FN(NFDATA12), |
| 3074 | |
| 3075 | GPIO_IFN(SD2_DAT3), |
| 3076 | GPIO_FN(NFDATA13), |
| 3077 | |
| 3078 | GPIO_IFN(SD2_DS), |
| 3079 | GPIO_FN(NFALE), |
| 3080 | |
| 3081 | GPIO_IFN(SD3_CLK), |
| 3082 | GPIO_FN(NFWEx), |
| 3083 | |
| 3084 | /* IPSR10 */ |
| 3085 | GPIO_IFN(SD3_CMD), |
| 3086 | GPIO_FN(NFREx), |
| 3087 | |
| 3088 | GPIO_IFN(SD3_DAT0), |
| 3089 | GPIO_FN(NFDATA0), |
| 3090 | |
| 3091 | GPIO_IFN(SD3_DAT1), |
| 3092 | GPIO_FN(NFDATA1), |
| 3093 | |
| 3094 | GPIO_IFN(SD3_DAT2), |
| 3095 | GPIO_FN(NFDATA2), |
| 3096 | |
| 3097 | GPIO_IFN(SD3_DAT3), |
| 3098 | GPIO_FN(NFDATA3), |
| 3099 | |
| 3100 | GPIO_IFN(SD3_DAT4), |
| 3101 | GPIO_FN(SD2_CD_A), |
| 3102 | GPIO_FN(NFDATA4), |
| 3103 | |
| 3104 | GPIO_IFN(SD3_DAT5), |
| 3105 | GPIO_FN(SD2_WP_A), |
| 3106 | GPIO_FN(NFDATA5), |
| 3107 | |
| 3108 | GPIO_IFN(SD3_DAT6), |
| 3109 | GPIO_FN(SD3_CD), |
| 3110 | GPIO_FN(NFDATA6), |
| 3111 | |
| 3112 | /* IPSR11 */ |
| 3113 | GPIO_IFN(SD3_DAT7), |
| 3114 | GPIO_FN(SD3_WP), |
| 3115 | GPIO_FN(NFDATA7), |
| 3116 | |
| 3117 | GPIO_IFN(SD3_DS), |
| 3118 | GPIO_FN(NFCLE), |
| 3119 | |
| 3120 | GPIO_IFN(SD0_CD), |
| 3121 | GPIO_FN(NFDATA14_A), |
| 3122 | GPIO_FN(SCL2_B), |
| 3123 | GPIO_FN(SIM0_RST_A), |
| 3124 | |
| 3125 | GPIO_IFN(SD0_WP), |
| 3126 | GPIO_FN(NFDATA15_A), |
| 3127 | GPIO_FN(SDA2_B), |
| 3128 | |
| 3129 | GPIO_IFN(SD1_CD), |
| 3130 | GPIO_FN(NFRBx_A), |
| 3131 | GPIO_FN(SIM0_CLK_B), |
| 3132 | |
| 3133 | GPIO_IFN(SD1_WP), |
| 3134 | GPIO_FN(NFCEx_A), |
| 3135 | GPIO_FN(SIM0_D_B), |
| 3136 | |
| 3137 | GPIO_IFN(SCK0), |
| 3138 | GPIO_FN(HSCK1_B), |
| 3139 | GPIO_FN(MSIOF1_SS2_B), |
| 3140 | GPIO_FN(AUDIO_CLKC_B), |
| 3141 | GPIO_FN(SDA2_A), |
| 3142 | GPIO_FN(SIM0_RST_B), |
| 3143 | GPIO_FN(STP_OPWM_0_C), |
| 3144 | GPIO_FN(RIF0_CLK_B), |
| 3145 | GPIO_FN(ADICHS2), |
| 3146 | GPIO_FN(SCK5_B), |
| 3147 | |
| 3148 | GPIO_IFN(RX0), |
| 3149 | GPIO_FN(HRX1_B), |
| 3150 | GPIO_FN(TS_SCK0_C), |
| 3151 | GPIO_FN(STP_ISCLK_0_C), |
| 3152 | GPIO_FN(RIF0_D0_B), |
| 3153 | |
| 3154 | /* IPSR12 */ |
| 3155 | GPIO_IFN(TX0), |
| 3156 | GPIO_FN(HTX1_B), |
| 3157 | GPIO_FN(TS_SPSYNC0_C), |
| 3158 | GPIO_FN(STP_ISSYNC_0_C), |
| 3159 | GPIO_FN(RIF0_D1_B), |
| 3160 | |
| 3161 | GPIO_IFN(CTS0x), |
| 3162 | GPIO_FN(HCTS1x_B), |
| 3163 | GPIO_FN(MSIOF1_SYNC_B), |
| 3164 | GPIO_FN(TS_SPSYNC1_C), |
| 3165 | GPIO_FN(STP_ISSYNC_1_C), |
| 3166 | GPIO_FN(RIF1_SYNC_B), |
| 3167 | GPIO_FN(AUDIO_CLKOUT_C), |
| 3168 | GPIO_FN(ADICS_SAMP), |
| 3169 | |
| 3170 | GPIO_IFN(RTS0x_TANS), |
| 3171 | GPIO_FN(HRTS1x_B), |
| 3172 | GPIO_FN(MSIOF1_SS1_B), |
| 3173 | GPIO_FN(AUDIO_CLKA_B), |
| 3174 | GPIO_FN(SCL2_A), |
| 3175 | GPIO_FN(STP_IVCXO27_1_C), |
| 3176 | GPIO_FN(RIF0_SYNC_B), |
| 3177 | GPIO_FN(ADICHS1), |
| 3178 | |
| 3179 | GPIO_IFN(RX1_A), |
| 3180 | GPIO_FN(HRX1_A), |
| 3181 | GPIO_FN(TS_SDAT0_C), |
| 3182 | GPIO_FN(STP_ISD_0_C), |
| 3183 | GPIO_FN(RIF1_CLK_C), |
| 3184 | |
| 3185 | GPIO_IFN(TX1_A), |
| 3186 | GPIO_FN(HTX1_A), |
| 3187 | GPIO_FN(TS_SDEN0_C), |
| 3188 | GPIO_FN(STP_ISEN_0_C), |
| 3189 | GPIO_FN(RIF1_D0_C), |
| 3190 | |
| 3191 | GPIO_IFN(CTS1x), |
| 3192 | GPIO_FN(HCTS1x_A), |
| 3193 | GPIO_FN(MSIOF1_RXD_B), |
| 3194 | GPIO_FN(TS_SDEN1_C), |
| 3195 | GPIO_FN(STP_ISEN_1_C), |
| 3196 | GPIO_FN(RIF1_D0_B), |
| 3197 | GPIO_FN(ADIDATA), |
| 3198 | |
| 3199 | GPIO_IFN(RTS1x_TANS), |
| 3200 | GPIO_FN(HRTS1x_A), |
| 3201 | GPIO_FN(MSIOF1_TXD_B), |
| 3202 | GPIO_FN(TS_SDAT1_C), |
| 3203 | GPIO_FN(STP_ISD_1_C), |
| 3204 | GPIO_FN(RIF1_D1_B), |
| 3205 | GPIO_FN(ADICHS0), |
| 3206 | |
| 3207 | GPIO_IFN(SCK2), |
| 3208 | GPIO_FN(SCIF_CLK_B), |
| 3209 | GPIO_FN(MSIOF1_SCK_B), |
| 3210 | GPIO_FN(TS_SCK1_C), |
| 3211 | GPIO_FN(STP_ISCLK_1_C), |
| 3212 | GPIO_FN(RIF1_CLK_B), |
| 3213 | GPIO_FN(ADICLK), |
| 3214 | |
| 3215 | /* IPSR13 */ |
| 3216 | GPIO_IFN(TX2_A), |
| 3217 | GPIO_FN(SD2_CD_B), |
| 3218 | GPIO_FN(SCL1_A), |
| 3219 | GPIO_FN(FMCLK_A), |
| 3220 | GPIO_FN(RIF1_D1_C), |
| 3221 | GPIO_FN(FSO_CFE_0_B), |
| 3222 | |
| 3223 | GPIO_IFN(RX2_A), |
| 3224 | GPIO_FN(SD2_WP_B), |
| 3225 | GPIO_FN(SDA1_A), |
| 3226 | GPIO_FN(FMIN_A), |
| 3227 | GPIO_FN(RIF1_SYNC_C), |
| 3228 | GPIO_FN(FSO_CEF_1_B), |
| 3229 | |
| 3230 | GPIO_IFN(HSCK0), |
| 3231 | GPIO_FN(MSIOF1_SCK_D), |
| 3232 | GPIO_FN(AUDIO_CLKB_A), |
| 3233 | GPIO_FN(SSI_SDATA1_B), |
| 3234 | GPIO_FN(TS_SCK0_D), |
| 3235 | GPIO_FN(STP_ISCLK_0_D), |
| 3236 | GPIO_FN(RIF0_CLK_C), |
| 3237 | GPIO_FN(RX5_B), |
| 3238 | |
| 3239 | GPIO_IFN(HRX0), |
| 3240 | GPIO_FN(MSIOF1_RXD_D), |
| 3241 | GPIO_FN(SS1_SDATA2_B), |
| 3242 | GPIO_FN(TS_SDEN0_D), |
| 3243 | GPIO_FN(STP_ISEN_0_D), |
| 3244 | GPIO_FN(RIF0_D0_C), |
| 3245 | |
| 3246 | GPIO_IFN(HTX0), |
| 3247 | GPIO_FN(MSIOF1_TXD_D), |
| 3248 | GPIO_FN(SSI_SDATA9_B), |
| 3249 | GPIO_FN(TS_SDAT0_D), |
| 3250 | GPIO_FN(STP_ISD_0_D), |
| 3251 | GPIO_FN(RIF0_D1_C), |
| 3252 | |
| 3253 | GPIO_IFN(HCTS0x), |
| 3254 | GPIO_FN(RX2_B), |
| 3255 | GPIO_FN(MSIOF1_SYNC_D), |
| 3256 | GPIO_FN(SSI_SCK9_A), |
| 3257 | GPIO_FN(TS_SPSYNC0_D), |
| 3258 | GPIO_FN(STP_ISSYNC_0_D), |
| 3259 | GPIO_FN(RIF0_SYNC_C), |
| 3260 | GPIO_FN(AUDIO_CLKOUT1_A), |
| 3261 | |
| 3262 | GPIO_IFN(HRTS0x), |
| 3263 | GPIO_FN(TX2_B), |
| 3264 | GPIO_FN(MSIOF1_SS1_D), |
| 3265 | GPIO_FN(SSI_WS9_A), |
| 3266 | GPIO_FN(STP_IVCXO27_0_D), |
| 3267 | GPIO_FN(BPFCLK_A), |
| 3268 | GPIO_FN(AUDIO_CLKOUT2_A), |
| 3269 | |
| 3270 | GPIO_IFN(MSIOF0_SYNC), |
| 3271 | GPIO_FN(AUDIO_CLKOUT_A), |
| 3272 | GPIO_FN(TX5_B), |
| 3273 | GPIO_FN(BPFCLK_D), |
| 3274 | |
| 3275 | /* IPSR14 */ |
| 3276 | GPIO_IFN(MSIOF0_SS1), |
| 3277 | GPIO_FN(RX5_A), |
| 3278 | GPIO_FN(NFWPx_A), |
| 3279 | GPIO_FN(AUDIO_CLKA_C), |
| 3280 | GPIO_FN(SSI_SCK2_A), |
| 3281 | GPIO_FN(STP_IVCXO27_0_C), |
| 3282 | GPIO_FN(AUDIO_CLKOUT3_A), |
| 3283 | GPIO_FN(TCLK1_B), |
| 3284 | |
| 3285 | GPIO_IFN(MSIOF0_SS2), |
| 3286 | GPIO_FN(TX5_A), |
| 3287 | GPIO_FN(MSIOF1_SS2_D), |
| 3288 | GPIO_FN(AUDIO_CLKC_A), |
| 3289 | GPIO_FN(SSI_WS2_A), |
| 3290 | GPIO_FN(STP_OPWM_0_D), |
| 3291 | GPIO_FN(AUDIO_CLKOUT_D), |
| 3292 | GPIO_FN(SPEEDIN_B), |
| 3293 | |
| 3294 | GPIO_IFN(MLB_CLK), |
| 3295 | GPIO_FN(MSIOF1_SCK_F), |
| 3296 | GPIO_FN(SCL1_B), |
| 3297 | |
| 3298 | GPIO_IFN(MLB_SIG), |
| 3299 | GPIO_FN(RX1_B), |
| 3300 | GPIO_FN(MSIOF1_SYNC_F), |
| 3301 | GPIO_FN(SDA1_B), |
| 3302 | |
| 3303 | GPIO_IFN(MLB_DAT), |
| 3304 | GPIO_FN(TX1_B), |
| 3305 | GPIO_FN(MSIOF1_RXD_F), |
| 3306 | |
| 3307 | GPIO_IFN(SSI_SCK0129), |
| 3308 | GPIO_FN(MSIOF1_TXD_F), |
| 3309 | GPIO_FN(MOUT0), |
| 3310 | |
| 3311 | GPIO_IFN(SSI_WS0129), |
| 3312 | GPIO_FN(MSIOF1_SS1_F), |
| 3313 | GPIO_FN(MOUT1), |
| 3314 | |
| 3315 | GPIO_IFN(SSI_SDATA0), |
| 3316 | GPIO_FN(MSIOF1_SS2_F), |
| 3317 | GPIO_FN(MOUT2), |
| 3318 | |
| 3319 | /* IPSR15 */ |
| 3320 | GPIO_IFN(SSI_SDATA1_A), |
| 3321 | GPIO_FN(MOUT5), |
| 3322 | |
| 3323 | GPIO_IFN(SSI_SDATA2_A), |
| 3324 | GPIO_FN(SSI_SCK1_B), |
| 3325 | GPIO_FN(MOUT6), |
| 3326 | |
| 3327 | GPIO_IFN(SSI_SCK34), |
| 3328 | GPIO_FN(MSIOF1_SS1_A), |
| 3329 | GPIO_FN(STP_OPWM_0_A), |
| 3330 | |
| 3331 | GPIO_IFN(SSI_WS34), |
| 3332 | GPIO_FN(HCTS2x_A), |
| 3333 | GPIO_FN(MSIOF1_SS2_A), |
| 3334 | GPIO_FN(STP_IVCXO27_0_A), |
| 3335 | |
| 3336 | GPIO_IFN(SSI_SDATA3), |
| 3337 | GPIO_FN(HRTS2x_A), |
| 3338 | GPIO_FN(MSIOF1_TXD_A), |
| 3339 | GPIO_FN(TS_SCK0_A), |
| 3340 | GPIO_FN(STP_ISCLK_0_A), |
| 3341 | GPIO_FN(RIF0_D1_A), |
| 3342 | GPIO_FN(RIF2_D0_A), |
| 3343 | |
| 3344 | GPIO_IFN(SSI_SCK4), |
| 3345 | GPIO_FN(HRX2_A), |
| 3346 | GPIO_FN(MSIOF1_SCK_A), |
| 3347 | GPIO_FN(TS_SDAT0_A), |
| 3348 | GPIO_FN(STP_ISD_0_A), |
| 3349 | GPIO_FN(RIF0_CLK_A), |
| 3350 | GPIO_FN(RIF2_CLK_A), |
| 3351 | |
| 3352 | GPIO_IFN(SSI_WS4), |
| 3353 | GPIO_FN(HTX2_A), |
| 3354 | GPIO_FN(MSIOF1_SYNC_A), |
| 3355 | GPIO_FN(TS_SDEN0_A), |
| 3356 | GPIO_FN(STP_ISEN_0_A), |
| 3357 | GPIO_FN(RIF0_SYNC_A), |
| 3358 | GPIO_FN(RIF2_SYNC_A), |
| 3359 | |
| 3360 | GPIO_IFN(SSI_SDATA4), |
| 3361 | GPIO_FN(HSCK2_A), |
| 3362 | GPIO_FN(MSIOF1_RXD_A), |
| 3363 | GPIO_FN(TS_SPSYNC0_A), |
| 3364 | GPIO_FN(STP_ISSYNC_0_A), |
| 3365 | GPIO_FN(RIF0_D0_A), |
| 3366 | GPIO_FN(RIF2_D1_A), |
| 3367 | |
| 3368 | /* IPSR16 */ |
| 3369 | GPIO_IFN(SSI_SCK6), |
| 3370 | GPIO_FN(SIM0_RST_D), |
| 3371 | GPIO_FN(FSO_TOE_A), |
| 3372 | |
| 3373 | GPIO_IFN(SSI_WS6), |
| 3374 | GPIO_FN(SIM0_D_D), |
| 3375 | |
| 3376 | GPIO_IFN(SSI_SDATA6), |
| 3377 | GPIO_FN(SIM0_CLK_D), |
| 3378 | |
| 3379 | GPIO_IFN(SSI_SCK78), |
| 3380 | GPIO_FN(HRX2_B), |
| 3381 | GPIO_FN(MSIOF1_SCK_C), |
| 3382 | GPIO_FN(TS_SCK1_A), |
| 3383 | GPIO_FN(STP_ISCLK_1_A), |
| 3384 | GPIO_FN(RIF1_CLK_A), |
| 3385 | GPIO_FN(RIF3_CLK_A), |
| 3386 | |
| 3387 | GPIO_IFN(SSI_WS78), |
| 3388 | GPIO_FN(HTX2_B), |
| 3389 | GPIO_FN(MSIOF1_SYNC_C), |
| 3390 | GPIO_FN(TS_SDAT1_A), |
| 3391 | GPIO_FN(STP_ISD_1_A), |
| 3392 | GPIO_FN(RIF1_SYNC_A), |
| 3393 | GPIO_FN(RIF3_SYNC_A), |
| 3394 | |
| 3395 | GPIO_IFN(SSI_SDATA7), |
| 3396 | GPIO_FN(HCTS2x_B), |
| 3397 | GPIO_FN(MSIOF1_RXD_C), |
| 3398 | GPIO_FN(TS_SDEN1_A), |
| 3399 | GPIO_FN(STP_IEN_1_A), |
| 3400 | GPIO_FN(RIF1_D0_A), |
| 3401 | GPIO_FN(RIF3_D0_A), |
| 3402 | GPIO_FN(TCLK2_A), |
| 3403 | |
| 3404 | GPIO_IFN(SSI_SDATA8), |
| 3405 | GPIO_FN(HRTS2x_B), |
| 3406 | GPIO_FN(MSIOF1_TXD_C), |
| 3407 | GPIO_FN(TS_SPSYNC1_A), |
| 3408 | GPIO_FN(STP_ISSYNC_1_A), |
| 3409 | GPIO_FN(RIF1_D1_A), |
| 3410 | GPIO_FN(EIF3_D1_A), |
| 3411 | |
| 3412 | GPIO_IFN(SSI_SDATA9_A), |
| 3413 | GPIO_FN(HSCK2_B), |
| 3414 | GPIO_FN(MSIOF1_SS1_C), |
| 3415 | GPIO_FN(HSCK1_A), |
| 3416 | GPIO_FN(SSI_WS1_B), |
| 3417 | GPIO_FN(SCK1), |
| 3418 | GPIO_FN(STP_IVCXO27_1_A), |
| 3419 | GPIO_FN(SCK5), |
| 3420 | |
| 3421 | /* IPSR17 */ |
| 3422 | GPIO_IFN(AUDIO_CLKA_A), |
| 3423 | GPIO_FN(CC5_OSCOUT), |
| 3424 | |
| 3425 | GPIO_IFN(AUDIO_CLKB_B), |
| 3426 | GPIO_FN(SCIF_CLK_A), |
| 3427 | GPIO_FN(STP_IVCXO27_1_D), |
| 3428 | GPIO_FN(REMOCON_A), |
| 3429 | GPIO_FN(TCLK1_A), |
| 3430 | |
| 3431 | GPIO_IFN(USB0_PWEN), |
| 3432 | GPIO_FN(SIM0_RST_C), |
| 3433 | GPIO_FN(TS_SCK1_D), |
| 3434 | GPIO_FN(STP_ISCLK_1_D), |
| 3435 | GPIO_FN(BPFCLK_B), |
| 3436 | GPIO_FN(RIF3_CLK_B), |
| 3437 | GPIO_FN(FSO_CFE_1_A), |
| 3438 | GPIO_FN(HSCK2_C), |
| 3439 | |
| 3440 | GPIO_IFN(USB0_OVC), |
| 3441 | GPIO_FN(SIM0_D_C), |
| 3442 | GPIO_FN(TS_SDAT1_D), |
| 3443 | GPIO_FN(STP_ISD_1_D), |
| 3444 | GPIO_FN(RIF3_SYNC_B), |
| 3445 | GPIO_FN(HRX2_C), |
| 3446 | |
| 3447 | GPIO_IFN(USB1_PWEN), |
| 3448 | GPIO_FN(SIM0_CLK_C), |
| 3449 | GPIO_FN(SSI_SCK1_A), |
| 3450 | GPIO_FN(TS_SCK0_E), |
| 3451 | GPIO_FN(STP_ISCLK_0_E), |
| 3452 | GPIO_FN(FMCLK_B), |
| 3453 | GPIO_FN(RIF2_CLK_B), |
| 3454 | GPIO_FN(SPEEDIN_A), |
| 3455 | GPIO_FN(HTX2_C), |
| 3456 | |
| 3457 | GPIO_IFN(USB1_OVC), |
| 3458 | GPIO_FN(MSIOF1_SS2_C), |
| 3459 | GPIO_FN(SSI_WS1_A), |
| 3460 | GPIO_FN(TS_SDAT0_E), |
| 3461 | GPIO_FN(STP_ISD_0_E), |
| 3462 | GPIO_FN(FMIN_B), |
| 3463 | GPIO_FN(RIF2_SYNC_B), |
| 3464 | GPIO_FN(REMOCON_B), |
| 3465 | GPIO_FN(HCTS2x_C), |
| 3466 | |
| 3467 | GPIO_IFN(USB30_PWEN), |
| 3468 | GPIO_FN(AUDIO_CLKOUT_B), |
| 3469 | GPIO_FN(SSI_SCK2_B), |
| 3470 | GPIO_FN(TS_SDEN1_D), |
| 3471 | GPIO_FN(STP_ISEN_1_D), |
| 3472 | GPIO_FN(STP_OPWM_0_E), |
| 3473 | GPIO_FN(RIF3_D0_B), |
| 3474 | GPIO_FN(TCLK2_B), |
| 3475 | GPIO_FN(TPU0TO0), |
| 3476 | GPIO_FN(BPFCLK_C), |
| 3477 | GPIO_FN(HRTS2x_C), |
| 3478 | |
| 3479 | GPIO_IFN(USB30_OVC), |
| 3480 | GPIO_FN(AUDIO_CLKOUT1_B), |
| 3481 | GPIO_FN(SSI_WS2_B), |
| 3482 | GPIO_FN(TS_SPSYNC1_D), |
| 3483 | GPIO_FN(STP_ISSYNC_1_D), |
| 3484 | GPIO_FN(STP_IVCXO27_0_E), |
| 3485 | GPIO_FN(RIF3_D1_B), |
| 3486 | GPIO_FN(FSO_TOE_B), |
| 3487 | GPIO_FN(TPU0TO1), |
| 3488 | |
| 3489 | /* IPSR18 */ |
| 3490 | GPIO_IFN(GP6_30), |
| 3491 | GPIO_FN(AUDIO_CLKOUT2_B), |
| 3492 | GPIO_FN(SSI_SCK9_B), |
| 3493 | GPIO_FN(TS_SDEN0_E), |
| 3494 | GPIO_FN(STP_ISEN_0_E), |
| 3495 | GPIO_FN(RIF2_D0_B), |
| 3496 | GPIO_FN(FSO_CFE_0_A), |
| 3497 | GPIO_FN(TPU0TO2), |
| 3498 | GPIO_FN(FMCLK_C), |
| 3499 | GPIO_FN(FMCLK_D), |
| 3500 | |
| 3501 | GPIO_IFN(GP6_31), |
| 3502 | GPIO_FN(AUDIO_CLKOUT3_B), |
| 3503 | GPIO_FN(SSI_WS9_B), |
| 3504 | GPIO_FN(TS_SPSYNC0_E), |
| 3505 | GPIO_FN(STP_ISSYNC_0_E), |
| 3506 | GPIO_FN(RIF2_D1_B), |
| 3507 | GPIO_FN(TPU0TO3), |
| 3508 | GPIO_FN(FMIN_C), |
| 3509 | GPIO_FN(FMIN_D), |
| 3510 | }; |
| 3511 | |
| 3512 | static struct pinmux_cfg_reg pinmux_config_regs[] = { |
| 3513 | /* GPSR0(0xE6060100) md[3:1] controls initial value */ |
| 3514 | /* md[3:1] .. 0 : 0x0000FFFF */ |
| 3515 | /* .. other : 0x00000000 */ |
| 3516 | { PINMUX_CFG_REG("GPSR0", 0xE6060100, 32, 1) { |
| 3517 | 0, 0, |
| 3518 | 0, 0, |
| 3519 | 0, 0, |
| 3520 | 0, 0, |
| 3521 | 0, 0, |
| 3522 | 0, 0, |
| 3523 | 0, 0, |
| 3524 | 0, 0, |
| 3525 | |
| 3526 | 0, 0, |
| 3527 | 0, 0, |
| 3528 | 0, 0, |
| 3529 | 0, 0, |
| 3530 | 0, 0, |
| 3531 | 0, 0, |
| 3532 | 0, 0, |
| 3533 | 0, 0, |
| 3534 | |
| 3535 | GP_0_15_FN, GFN_D15, |
| 3536 | GP_0_14_FN, GFN_D14, |
| 3537 | GP_0_13_FN, GFN_D13, |
| 3538 | GP_0_12_FN, GFN_D12, |
| 3539 | GP_0_11_FN, GFN_D11, |
| 3540 | GP_0_10_FN, GFN_D10, |
| 3541 | GP_0_9_FN, GFN_D9, |
| 3542 | GP_0_8_FN, GFN_D8, |
| 3543 | GP_0_7_FN, GFN_D7, |
| 3544 | GP_0_6_FN, GFN_D6, |
| 3545 | GP_0_5_FN, GFN_D5, |
| 3546 | GP_0_4_FN, GFN_D4, |
| 3547 | GP_0_3_FN, GFN_D3, |
| 3548 | GP_0_2_FN, GFN_D2, |
| 3549 | GP_0_1_FN, GFN_D1, |
| 3550 | GP_0_0_FN, GFN_D0 } |
| 3551 | }, |
| 3552 | /* GPSR1(0xE6060104) is md[3:1] controls initial value */ |
| 3553 | /* md[3:1] .. 0 : 0x0EFFFFFF */ |
| 3554 | /* .. other : 0x00000000 */ |
| 3555 | { PINMUX_CFG_REG("GPSR1", 0xE6060104, 32, 1) { |
| 3556 | 0, 0, |
| 3557 | 0, 0, |
| 3558 | 0, 0, |
| 3559 | GP_1_28_FN, GFN_CLKOUT, |
| 3560 | GP_1_27_FN, GFN_EX_WAIT0_A, |
| 3561 | GP_1_26_FN, GFN_WE1x, |
| 3562 | GP_1_25_FN, GFN_WE0x, |
| 3563 | GP_1_24_FN, GFN_RD_WRx, |
| 3564 | GP_1_23_FN, GFN_RDx, |
| 3565 | GP_1_22_FN, GFN_BSx, |
| 3566 | GP_1_21_FN, GFN_CS1x_A26, |
| 3567 | GP_1_20_FN, GFN_CS0x, |
| 3568 | GP_1_19_FN, GFN_A19, |
| 3569 | GP_1_18_FN, GFN_A18, |
| 3570 | GP_1_17_FN, GFN_A17, |
| 3571 | GP_1_16_FN, GFN_A16, |
| 3572 | GP_1_15_FN, GFN_A15, |
| 3573 | GP_1_14_FN, GFN_A14, |
| 3574 | GP_1_13_FN, GFN_A13, |
| 3575 | GP_1_12_FN, GFN_A12, |
| 3576 | GP_1_11_FN, GFN_A11, |
| 3577 | GP_1_10_FN, GFN_A10, |
| 3578 | GP_1_9_FN, GFN_A9, |
| 3579 | GP_1_8_FN, GFN_A8, |
| 3580 | GP_1_7_FN, GFN_A7, |
| 3581 | GP_1_6_FN, GFN_A6, |
| 3582 | GP_1_5_FN, GFN_A5, |
| 3583 | GP_1_4_FN, GFN_A4, |
| 3584 | GP_1_3_FN, GFN_A3, |
| 3585 | GP_1_2_FN, GFN_A2, |
| 3586 | GP_1_1_FN, GFN_A1, |
| 3587 | GP_1_0_FN, GFN_A0 } |
| 3588 | }, |
| 3589 | /* GPSR2(0xE6060108) is md[3:1] controls */ |
| 3590 | /* md[3:1] .. 0 : 0x000003C0 */ |
| 3591 | /* .. other : 0x00000200 */ |
| 3592 | { PINMUX_CFG_REG("GPSR2", 0xE6060108, 32, 1) { |
| 3593 | 0, 0, |
| 3594 | 0, 0, |
| 3595 | 0, 0, |
| 3596 | 0, 0, |
| 3597 | 0, 0, |
| 3598 | 0, 0, |
| 3599 | 0, 0, |
| 3600 | 0, 0, |
| 3601 | |
| 3602 | 0, 0, |
| 3603 | 0, 0, |
| 3604 | 0, 0, |
| 3605 | 0, 0, |
| 3606 | 0, 0, |
| 3607 | 0, 0, |
| 3608 | 0, 0, |
| 3609 | 0, 0, |
| 3610 | |
| 3611 | 0, 0, |
| 3612 | GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A, |
| 3613 | GP_2_13_FN, GFN_AVB_AVTP_MATCH_A, |
| 3614 | GP_2_12_FN, GFN_AVB_LINK, |
| 3615 | GP_2_11_FN, GFN_AVB_PHY_INT, |
| 3616 | GP_2_10_FN, GFN_AVB_MAGIC, |
| 3617 | GP_2_9_FN, GFN_AVB_MDC, |
| 3618 | GP_2_8_FN, GFN_PWM2_A, |
| 3619 | GP_2_7_FN, GFN_PWM1_A, |
| 3620 | GP_2_6_FN, GFN_PWM0, |
| 3621 | GP_2_5_FN, GFN_IRQ5, |
| 3622 | GP_2_4_FN, GFN_IRQ4, |
| 3623 | GP_2_3_FN, GFN_IRQ3, |
| 3624 | GP_2_2_FN, GFN_IRQ2, |
| 3625 | GP_2_1_FN, GFN_IRQ1, |
| 3626 | GP_2_0_FN, GFN_IRQ0 } |
| 3627 | }, |
| 3628 | |
| 3629 | /* GPSR3 */ |
| 3630 | { PINMUX_CFG_REG("GPSR3", 0xE606010C, 32, 1) { |
| 3631 | 0, 0, |
| 3632 | 0, 0, |
| 3633 | 0, 0, |
| 3634 | 0, 0, |
| 3635 | 0, 0, |
| 3636 | 0, 0, |
| 3637 | 0, 0, |
| 3638 | 0, 0, |
| 3639 | |
| 3640 | 0, 0, |
| 3641 | 0, 0, |
| 3642 | 0, 0, |
| 3643 | 0, 0, |
| 3644 | 0, 0, |
| 3645 | 0, 0, |
| 3646 | 0, 0, |
| 3647 | 0, 0, |
| 3648 | |
| 3649 | GP_3_15_FN, GFN_SD1_WP, |
| 3650 | GP_3_14_FN, GFN_SD1_CD, |
| 3651 | GP_3_13_FN, GFN_SD0_WP, |
| 3652 | GP_3_12_FN, GFN_SD0_CD, |
| 3653 | GP_3_11_FN, GFN_SD1_DAT3, |
| 3654 | GP_3_10_FN, GFN_SD1_DAT2, |
| 3655 | GP_3_9_FN, GFN_SD1_DAT1, |
| 3656 | GP_3_8_FN, GFN_SD1_DAT0, |
| 3657 | GP_3_7_FN, GFN_SD1_CMD, |
| 3658 | GP_3_6_FN, GFN_SD1_CLK, |
| 3659 | GP_3_5_FN, GFN_SD0_DAT3, |
| 3660 | GP_3_4_FN, GFN_SD0_DAT2, |
| 3661 | GP_3_3_FN, GFN_SD0_DAT1, |
| 3662 | GP_3_2_FN, GFN_SD0_DAT0, |
| 3663 | GP_3_1_FN, GFN_SD0_CMD, |
| 3664 | GP_3_0_FN, GFN_SD0_CLK } |
| 3665 | }, |
| 3666 | /* GPSR4 */ |
| 3667 | { PINMUX_CFG_REG("GPSR4", 0xE6060110, 32, 1) { |
| 3668 | 0, 0, |
| 3669 | 0, 0, |
| 3670 | 0, 0, |
| 3671 | 0, 0, |
| 3672 | 0, 0, |
| 3673 | 0, 0, |
| 3674 | 0, 0, |
| 3675 | 0, 0, |
| 3676 | |
| 3677 | 0, 0, |
| 3678 | 0, 0, |
| 3679 | 0, 0, |
| 3680 | 0, 0, |
| 3681 | 0, 0, |
| 3682 | 0, 0, |
| 3683 | GP_4_17_FN, GFN_SD3_DS, |
| 3684 | GP_4_16_FN, GFN_SD3_DAT7, |
| 3685 | |
| 3686 | GP_4_15_FN, GFN_SD3_DAT6, |
| 3687 | GP_4_14_FN, GFN_SD3_DAT5, |
| 3688 | GP_4_13_FN, GFN_SD3_DAT4, |
| 3689 | GP_4_12_FN, FN_SD3_DAT3, |
| 3690 | GP_4_11_FN, FN_SD3_DAT2, |
| 3691 | GP_4_10_FN, FN_SD3_DAT1, |
| 3692 | GP_4_9_FN, FN_SD3_DAT0, |
| 3693 | GP_4_8_FN, FN_SD3_CMD, |
| 3694 | GP_4_7_FN, FN_SD3_CLK, |
| 3695 | GP_4_6_FN, GFN_SD2_DS, |
| 3696 | GP_4_5_FN, GFN_SD2_DAT3, |
| 3697 | GP_4_4_FN, GFN_SD2_DAT2, |
| 3698 | GP_4_3_FN, GFN_SD2_DAT1, |
| 3699 | GP_4_2_FN, GFN_SD2_DAT0, |
| 3700 | GP_4_1_FN, FN_SD2_CMD, |
| 3701 | GP_4_0_FN, GFN_SD2_CLK } |
| 3702 | }, |
| 3703 | /* GPSR5 */ |
| 3704 | { PINMUX_CFG_REG("GPSR5", 0xE6060114, 32, 1) { |
| 3705 | 0, 0, |
| 3706 | 0, 0, |
| 3707 | 0, 0, |
| 3708 | 0, 0, |
| 3709 | 0, 0, |
| 3710 | 0, 0, |
| 3711 | GP_5_25_FN, GFN_MLB_DAT, |
| 3712 | GP_5_24_FN, GFN_MLB_SIG, |
| 3713 | |
| 3714 | GP_5_23_FN, GFN_MLB_CLK, |
| 3715 | GP_5_22_FN, FN_MSIOF0_RXD, |
| 3716 | GP_5_21_FN, GFN_MSIOF0_SS2, |
| 3717 | GP_5_20_FN, FN_MSIOF0_TXD, |
| 3718 | GP_5_19_FN, GFN_MSIOF0_SS1, |
| 3719 | GP_5_18_FN, GFN_MSIOF0_SYNC, |
| 3720 | GP_5_17_FN, FN_MSIOF0_SCK, |
| 3721 | GP_5_16_FN, GFN_HRTS0x, |
| 3722 | GP_5_15_FN, GFN_HCTS0x, |
| 3723 | GP_5_14_FN, GFN_HTX0, |
| 3724 | GP_5_13_FN, GFN_HRX0, |
| 3725 | GP_5_12_FN, GFN_HSCK0, |
| 3726 | GP_5_11_FN, GFN_RX2_A, |
| 3727 | GP_5_10_FN, GFN_TX2_A, |
| 3728 | GP_5_9_FN, GFN_SCK2, |
| 3729 | GP_5_8_FN, GFN_RTS1x_TANS, |
| 3730 | GP_5_7_FN, GFN_CTS1x, |
| 3731 | GP_5_6_FN, GFN_TX1_A, |
| 3732 | GP_5_5_FN, GFN_RX1_A, |
| 3733 | GP_5_4_FN, GFN_RTS0x_TANS, |
| 3734 | GP_5_3_FN, GFN_CTS0x, |
| 3735 | GP_5_2_FN, GFN_TX0, |
| 3736 | GP_5_1_FN, GFN_RX0, |
| 3737 | GP_5_0_FN, GFN_SCK0 } |
| 3738 | }, |
| 3739 | /* GPSR6 */ |
| 3740 | { PINMUX_CFG_REG("GPSR6", 0xE6060118, 32, 1) { |
| 3741 | GP_6_31_FN, GFN_GP6_31, |
| 3742 | GP_6_30_FN, GFN_GP6_30, |
| 3743 | GP_6_29_FN, GFN_USB30_OVC, |
| 3744 | GP_6_28_FN, GFN_USB30_PWEN, |
| 3745 | GP_6_27_FN, GFN_USB1_OVC, |
| 3746 | GP_6_26_FN, GFN_USB1_PWEN, |
| 3747 | GP_6_25_FN, GFN_USB0_OVC, |
| 3748 | GP_6_24_FN, GFN_USB0_PWEN, |
| 3749 | GP_6_23_FN, GFN_AUDIO_CLKB_B, |
| 3750 | GP_6_22_FN, GFN_AUDIO_CLKA_A, |
| 3751 | GP_6_21_FN, GFN_SSI_SDATA9_A, |
| 3752 | GP_6_20_FN, GFN_SSI_SDATA8, |
| 3753 | GP_6_19_FN, GFN_SSI_SDATA7, |
| 3754 | GP_6_18_FN, GFN_SSI_WS78, |
| 3755 | GP_6_17_FN, GFN_SSI_SCK78, |
| 3756 | GP_6_16_FN, GFN_SSI_SDATA6, |
| 3757 | GP_6_15_FN, GFN_SSI_WS6, |
| 3758 | GP_6_14_FN, GFN_SSI_SCK6, |
| 3759 | GP_6_13_FN, FN_SSI_SDATA5, |
| 3760 | GP_6_12_FN, FN_SSI_WS5, |
| 3761 | GP_6_11_FN, FN_SSI_SCK5, |
| 3762 | GP_6_10_FN, GFN_SSI_SDATA4, |
| 3763 | GP_6_9_FN, GFN_SSI_WS4, |
| 3764 | GP_6_8_FN, GFN_SSI_SCK4, |
| 3765 | GP_6_7_FN, GFN_SSI_SDATA3, |
| 3766 | GP_6_6_FN, GFN_SSI_WS34, |
| 3767 | GP_6_5_FN, GFN_SSI_SCK34, |
| 3768 | GP_6_4_FN, GFN_SSI_SDATA2_A, |
| 3769 | GP_6_3_FN, GFN_SSI_SDATA1_A, |
| 3770 | GP_6_2_FN, GFN_SSI_SDATA0, |
| 3771 | GP_6_1_FN, GFN_SSI_WS01239, |
| 3772 | GP_6_0_FN, GFN_SSI_SCK01239 } |
| 3773 | }, |
| 3774 | /* GPSR7 */ |
| 3775 | { PINMUX_CFG_REG("GPSR7", 0xE606011C, 32, 1) { |
| 3776 | 0, 0, |
| 3777 | 0, 0, |
| 3778 | 0, 0, |
| 3779 | 0, 0, |
| 3780 | 0, 0, |
| 3781 | 0, 0, |
| 3782 | 0, 0, |
| 3783 | 0, 0, |
| 3784 | |
| 3785 | 0, 0, |
| 3786 | 0, 0, |
| 3787 | 0, 0, |
| 3788 | 0, 0, |
| 3789 | 0, 0, |
| 3790 | 0, 0, |
| 3791 | 0, 0, |
| 3792 | 0, 0, |
| 3793 | |
| 3794 | 0, 0, |
| 3795 | 0, 0, |
| 3796 | 0, 0, |
| 3797 | 0, 0, |
| 3798 | 0, 0, |
| 3799 | 0, 0, |
| 3800 | 0, 0, |
| 3801 | 0, 0, |
| 3802 | |
| 3803 | 0, 0, |
| 3804 | 0, 0, |
| 3805 | 0, 0, |
| 3806 | 0, 0, |
| 3807 | GP_7_3_FN, FN_HDMI1_CEC, |
| 3808 | GP_7_2_FN, FN_HDMI0_CEC, |
| 3809 | GP_7_1_FN, FN_AVS2, |
| 3810 | GP_7_0_FN, FN_AVS1 } |
| 3811 | }, |
| 3812 | { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060200, 32, |
| 3813 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 3814 | /* IPSR0_31_28 [4] */ |
| 3815 | IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP, |
| 3816 | FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B, |
| 3817 | FN_MSIOF3_SS1_E, |
| 3818 | 0, 0, 0, 0, |
| 3819 | 0, 0, 0, 0, |
| 3820 | /* IPSR0_27_24 [4] */ |
| 3821 | IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE, |
| 3822 | FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B, |
| 3823 | FN_MSIOF3_SS2_E, |
| 3824 | 0, 0, 0, 0, |
| 3825 | 0, 0, 0, 0, |
| 3826 | /* IPSR0_23_20 [4] */ |
| 3827 | IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A, |
| 3828 | 0, 0, 0, 0, |
| 3829 | 0, 0, 0, 0, |
| 3830 | 0, 0, 0, 0, |
| 3831 | /* IPSR0_19_16 [4] */ |
| 3832 | IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A, |
| 3833 | 0, 0, 0, 0, |
| 3834 | 0, 0, 0, 0, |
| 3835 | 0, 0, 0, 0, |
| 3836 | /* IPSR0_15_12 [4] */ |
| 3837 | IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A, |
| 3838 | 0, 0, 0, 0, |
| 3839 | 0, 0, 0, 0, |
| 3840 | 0, 0, 0, 0, |
| 3841 | /* IPSR0_11_8 [4] */ |
| 3842 | IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A, |
| 3843 | 0, 0, 0, 0, |
| 3844 | 0, 0, 0, 0, |
| 3845 | 0, 0, 0, 0, |
| 3846 | /* IPSR0_7_4 [4] */ |
| 3847 | IFN_AVB_MAGIC, 0, FN_MSIOF2_SS1_C, FN_SCK4_A, |
| 3848 | 0, 0, 0, 0, |
| 3849 | 0, 0, 0, 0, |
| 3850 | 0, 0, 0, 0, |
| 3851 | /* IPSR0_3_0 [4] */ |
| 3852 | IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0, |
| 3853 | 0, 0, 0, 0, |
| 3854 | 0, 0, 0, 0, |
| 3855 | 0, 0, 0, 0, |
| 3856 | } |
| 3857 | }, |
| 3858 | { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060204, 32, |
| 3859 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 3860 | /* IPSR1_31_28 [4] */ |
| 3861 | IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0, |
| 3862 | FN_VI4_DATA8, 0, FN_DU_DB0, 0, |
| 3863 | 0, FN_PWM3_A, 0, 0, |
| 3864 | 0, 0, 0, 0, |
| 3865 | /* IPSR1_27_24 [4] */ |
| 3866 | IFN_PWM2_A, FN_PWMFSW0, 0, FN_HTX3_D, |
| 3867 | 0, 0, 0, 0, |
| 3868 | 0, FN_IETX_B, 0, 0, |
| 3869 | 0, 0, 0, 0, |
| 3870 | /* IPSR1_23_20 [4] */ |
| 3871 | IFN_PWM1_A, 0, 0, FN_HRX3_D, |
| 3872 | FN_VI4_DATA7_B, 0, 0, 0, |
| 3873 | 0, FN_IERX_B, 0, 0, |
| 3874 | 0, 0, 0, 0, |
| 3875 | /* IPSR1_19_16 [4] */ |
| 3876 | IFN_PWM0, FN_AVB_AVTP_PPS, 0, 0, |
| 3877 | FN_VI4_DATA6_B, 0, 0, 0, |
| 3878 | 0, FN_IECLK_B, 0, 0, |
| 3879 | 0, 0, 0, 0, |
| 3880 | /* IPSR1_15_12 [4] */ |
| 3881 | IFN_IRQ5, FN_QSTB_QHE, 0, FN_DU_EXVSYNC_DU_VSYNC, |
| 3882 | FN_VI4_DATA5_B, 0, 0, FN_MSIOF3_TXD_E, |
| 3883 | 0, FN_PWM6_B, 0, 0, |
| 3884 | 0, 0, 0, 0, |
| 3885 | /* IPSR1_11_8 [4] */ |
| 3886 | IFN_IRQ4, FN_QSTH_QHS, 0, FN_DU_EXHSYNC_DU_HSYNC, |
| 3887 | FN_VI4_DATA4_B, 0, 0, FN_MSIOF3_RXD_E, |
| 3888 | 0, FN_PWM5_B, 0, 0, |
| 3889 | 0, 0, 0, 0, |
| 3890 | /* IPSR1_7_4 [4] */ |
| 3891 | IFN_IRQ3, FN_QSTVB_QVE, 0, FN_DU_DOTCLKOUT1, |
| 3892 | FN_VI4_DATA3_B, 0, 0, FN_MSIOF3_SCK_E, |
| 3893 | 0, FN_PWM4_B, 0, 0, |
| 3894 | 0, 0, 0, 0, |
| 3895 | /* IPSR1_3_0 [4] */ |
| 3896 | IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE, |
| 3897 | FN_VI4_DATA2_B, 0, 0, FN_MSIOF3_SYNC_E, |
| 3898 | 0, FN_PWM3_B, 0, 0, |
| 3899 | 0, 0, 0, 0 |
| 3900 | } |
| 3901 | }, |
| 3902 | { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060208, 32, |
| 3903 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 3904 | /* IPSR2_31_28 [4] */ |
| 3905 | IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B, |
| 3906 | 0, 0, 0, FN_SDA6_A, |
| 3907 | FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0, |
| 3908 | 0, 0, 0, 0, |
| 3909 | /* IPSR2_27_24 [4] */ |
| 3910 | IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B, |
| 3911 | FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0, |
| 3912 | 0, 0, 0, 0, |
| 3913 | 0, 0, 0, 0, |
| 3914 | /* IPSR2_23_20 [4] */ |
| 3915 | IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B, |
| 3916 | FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0, |
| 3917 | 0, 0, 0, 0, |
| 3918 | 0, 0, 0, 0, |
| 3919 | /* IPSR2_19_16 [4] */ |
| 3920 | IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B, |
| 3921 | FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0, |
| 3922 | 0, 0, 0, 0, |
| 3923 | 0, 0, 0, 0, |
| 3924 | /* IPSR2_15_12 [4] */ |
| 3925 | IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0, |
| 3926 | FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0, |
| 3927 | 0, 0, 0, 0, |
| 3928 | 0, 0, 0, 0, |
| 3929 | /* IPSR2_11_8 [4] */ |
| 3930 | IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0, |
| 3931 | FN_VI4_DATA11, 0, FN_DU_DB3, 0, |
| 3932 | 0, FN_PWM6_A, 0, 0, |
| 3933 | 0, 0, 0, 0, |
| 3934 | /* IPSR2_7_4 [4] */ |
| 3935 | IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0, |
| 3936 | FN_VI4_DATA10, 0, FN_DU_DB2, 0, |
| 3937 | 0, FN_PWM5_A, 0, 0, |
| 3938 | 0, 0, 0, 0, |
| 3939 | /* IPSR2_3_0 [4] */ |
| 3940 | IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0, |
| 3941 | FN_VI4_DATA9, 0, FN_DU_DB1, 0, |
| 3942 | 0, FN_PWM4_A, 0, 0, |
| 3943 | 0, 0, 0, 0, |
| 3944 | } |
| 3945 | }, |
| 3946 | { PINMUX_CFG_REG_VAR("IPSR3", 0xE606020C, 32, |
| 3947 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 3948 | /* IPSR3_31_28 [4] */ |
| 3949 | IFN_A16, FN_LCDOUT8, 0, 0, |
| 3950 | FN_VI4_FIELD, 0, FN_DU_DG0, 0, |
| 3951 | 0, 0, 0, 0, |
| 3952 | 0, 0, 0, 0, |
| 3953 | /* IPSR3_27_24 [4] */ |
| 3954 | IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0, |
| 3955 | FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0, |
| 3956 | 0, 0, 0, 0, |
| 3957 | 0, 0, 0, 0, |
| 3958 | /* IPSR3_23_20 [4] */ |
| 3959 | IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0, |
| 3960 | FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0, |
| 3961 | 0, 0, 0, 0, |
| 3962 | 0, 0, 0, 0, |
| 3963 | /* IPSR3_19_16 [4] */ |
| 3964 | IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0, |
| 3965 | FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0, |
| 3966 | 0, 0, 0, 0, |
| 3967 | 0, 0, 0, 0, |
| 3968 | /* IPSR3_15_12 [4] */ |
| 3969 | IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0, |
| 3970 | FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0, |
| 3971 | 0, 0, 0, 0, |
| 3972 | 0, 0, 0, 0, |
| 3973 | /* IPSR3_11_8 [4] */ |
| 3974 | IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B, |
| 3975 | FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A, |
| 3976 | FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, FN_SPV_EVEN, 0, |
| 3977 | 0, 0, 0, 0, |
| 3978 | /* IPSR3_7_4 [4] */ |
| 3979 | IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B, |
| 3980 | 0, FN_VI5_HSYNCx, 0, 0, |
| 3981 | 0, 0, 0, 0, |
| 3982 | 0, 0, 0, 0, |
| 3983 | /* IPSR3_3_0 [4] */ |
| 3984 | IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B, |
| 3985 | 0, FN_VI5_VSYNCx, 0, 0, |
| 3986 | 0, 0, 0, 0, |
| 3987 | 0, 0, 0, 0, |
| 3988 | } |
| 3989 | }, |
| 3990 | { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060210, 32, |
| 3991 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 3992 | /* IPSR4_31_28 [4] */ |
| 3993 | IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A, |
| 3994 | FN_HTX3_A, 0, 0, 0, |
| 3995 | FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0, |
| 3996 | 0, 0, 0, 0, |
| 3997 | /* IPSR4_27_24 [4] */ |
| 3998 | IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A, |
| 3999 | FN_HRX3_A, 0, 0, 0, |
| 4000 | FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0, |
| 4001 | 0, 0, 0, 0, |
| 4002 | /* IPSR4_23_20 [4] */ |
| 4003 | IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3, |
| 4004 | FN_HSCK3, 0, 0, 0, |
| 4005 | FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0, |
| 4006 | 0, 0, 0, 0, |
| 4007 | /* IPSR4_19_16 [4] */ |
| 4008 | IFN_CS1x_A26, 0, 0, 0, |
| 4009 | 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B, |
| 4010 | 0, 0, 0, 0, |
| 4011 | 0, 0, 0, 0, |
| 4012 | /* IPSR4_15_12 [4] */ |
| 4013 | IFN_CS0x, 0, 0, 0, |
| 4014 | 0, FN_VI5_CLKENB, 0, 0, |
| 4015 | 0, 0, 0, 0, |
| 4016 | 0, 0, 0, 0, |
| 4017 | /* IPSR4_11_8 [4] */ |
| 4018 | IFN_A19, FN_LCDOUT11, 0, 0, |
| 4019 | FN_VI4_CLKENB, 0, FN_DU_DG3, 0, |
| 4020 | 0, 0, 0, 0, |
| 4021 | 0, 0, 0, 0, |
| 4022 | /* IPSR4_7_4 [4] */ |
| 4023 | IFN_A18, FN_LCDOUT10, 0, 0, |
| 4024 | FN_VI4_HSYNCx, 0, FN_DU_DG2, 0, |
| 4025 | 0, 0, 0, 0, |
| 4026 | 0, 0, 0, 0, |
| 4027 | /* IPSR4_3_0 [4] */ |
| 4028 | IFN_A17, FN_LCDOUT9, 0, 0, |
| 4029 | FN_VI4_VSYNCx, 0, FN_DU_DG1, 0, |
| 4030 | 0, 0, 0, 0, |
| 4031 | 0, 0, 0, 0, |
| 4032 | } |
| 4033 | }, |
| 4034 | { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060214, 32, |
| 4035 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4036 | /* IPSR5_31_28 [4] */ |
| 4037 | IFN_D4, FN_MSIOF2_SCK_B, 0, 0, |
| 4038 | FN_VI4_DATA20, FN_VI5_DATA4, 0, 0, |
| 4039 | 0, 0, 0, 0, |
| 4040 | 0, 0, 0, 0, |
| 4041 | /* IPSR5_27_24 [4] */ |
| 4042 | IFN_D3, 0, FN_MSIOF3_TXD_A, 0, |
| 4043 | FN_VI4_DATA19, FN_VI5_DATA3, 0, 0, |
| 4044 | 0, 0, 0, 0, |
| 4045 | 0, 0, 0, 0, |
| 4046 | /* IPSR5_23_20 [4] */ |
| 4047 | IFN_D2, 0, FN_MSIOF3_RXD_A, 0, |
| 4048 | FN_VI4_DATA18, FN_VI5_DATA2, 0, 0, |
| 4049 | 0, 0, 0, 0, |
| 4050 | 0, 0, 0, 0, |
| 4051 | /* IPSR5_19_16 [4] */ |
| 4052 | IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0, |
| 4053 | FN_VI4_DATA17, FN_VI5_DATA1, 0, 0, |
| 4054 | 0, 0, 0, 0, |
| 4055 | 0, 0, 0, 0, |
| 4056 | /* IPSR5_15_12 [4] */ |
| 4057 | IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0, |
| 4058 | FN_VI4_DATA16, FN_VI5_DATA0, 0, 0, |
| 4059 | 0, 0, 0, 0, |
| 4060 | 0, 0, 0, 0, |
| 4061 | /* IPSR5_11_8 [4] */ |
| 4062 | IFN_EX_WAIT0_A, FN_QCLK, 0, 0, |
| 4063 | FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0, |
| 4064 | 0, 0, 0, 0, |
| 4065 | 0, 0, 0, 0, |
| 4066 | /* IPSR5_7_4 [4] */ |
| 4067 | IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS, |
| 4068 | FN_HRTS3x, 0, 0, FN_SDA6_B, |
| 4069 | FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0, |
| 4070 | 0, 0, 0, 0, |
| 4071 | /* IPSR5_3_0 [4] */ |
| 4072 | IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x, |
| 4073 | FN_HCTS3x, 0, 0, FN_SCL6_B, |
| 4074 | FN_CAN_CLK, 0, FN_IECLK_A, 0, |
| 4075 | 0, 0, 0, 0, |
| 4076 | } |
| 4077 | }, |
| 4078 | { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060218, 32, |
| 4079 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4080 | /* IPSR6_31_28 [4] */ |
| 4081 | IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C, |
| 4082 | FN_VI4_DATA4_A, 0, FN_DU_DR4, 0, |
| 4083 | 0, 0, 0, 0, |
| 4084 | 0, 0, 0, 0, |
| 4085 | /* IPSR6_27_24 [4] */ |
| 4086 | IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B, |
| 4087 | FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0, |
| 4088 | 0, 0, 0, 0, |
| 4089 | 0, 0, 0, 0, |
| 4090 | /* IPSR6_23_20 [4] */ |
| 4091 | IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B, |
| 4092 | FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0, |
| 4093 | 0, 0, 0, 0, |
| 4094 | 0, 0, 0, 0, |
| 4095 | /* IPSR6_19_16 [4] */ |
| 4096 | IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0, |
| 4097 | FN_VI4_DATA1_A, 0, FN_DU_DR1, 0, |
| 4098 | 0, 0, 0, 0, |
| 4099 | 0, 0, 0, 0, |
| 4100 | /* IPSR6_15_12 [4] */ |
| 4101 | IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C, |
| 4102 | FN_VI4_DATA0_A, 0, FN_DU_DR0, 0, |
| 4103 | 0, 0, 0, 0, |
| 4104 | 0, 0, 0, 0, |
| 4105 | /* IPSR6_11_8 [4] */ |
| 4106 | IFN_D7, FN_MSIOF2_TXD_B, 0, 0, |
| 4107 | FN_VI4_DATA23, FN_VI5_DATA7, 0, 0, |
| 4108 | 0, 0, 0, 0, |
| 4109 | 0, 0, 0, 0, |
| 4110 | /* IPSR6_7_4 [4] */ |
| 4111 | IFN_D6, FN_MSIOF2_RXD_B, 0, 0, |
| 4112 | FN_VI4_DATA22, FN_VI5_DATA6, 0, 0, |
| 4113 | 0, 0, 0, 0, |
| 4114 | 0, 0, 0, 0, |
| 4115 | /* IPSR6_3_0 [4] */ |
| 4116 | IFN_D5, FN_MSIOF2_SYNC_B, 0, 0, |
| 4117 | FN_VI4_DATA21, FN_VI5_DATA5, 0, 0, |
| 4118 | 0, 0, 0, 0, |
| 4119 | 0, 0, 0, 0, |
| 4120 | } |
| 4121 | }, |
| 4122 | { PINMUX_CFG_REG_VAR("IPSR7", 0xE606021C, 32, |
| 4123 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4124 | /* IPSR7_31_28 [4] */ |
| 4125 | IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0, |
| 4126 | 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0, |
| 4127 | 0, 0, 0, 0, |
| 4128 | 0, 0, 0, 0, |
| 4129 | /* IPSR7_27_24 [4] */ |
| 4130 | IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0, |
| 4131 | 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0, |
| 4132 | 0, 0, 0, 0, |
| 4133 | 0, 0, 0, 0, |
| 4134 | /* IPSR7_23_20 [4] */ |
| 4135 | IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0, |
| 4136 | 0, 0, FN_STP_IVCXO27_0_B, 0, |
| 4137 | 0, 0, 0, 0, |
| 4138 | 0, 0, 0, 0, |
| 4139 | /* IPSR7_19_16 [4] */ |
| 4140 | IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0, |
| 4141 | 0, 0, FN_STP_OPWM_0_B, 0, |
| 4142 | 0, 0, 0, 0, |
| 4143 | 0, 0, 0, 0, |
| 4144 | /* IPSR7_15_12 [4] */ |
| 4145 | FN_FSCLKST, 0, 0, 0, |
| 4146 | 0, 0, 0, 0, |
| 4147 | 0, 0, 0, 0, |
| 4148 | 0, 0, 0, 0, |
| 4149 | /* IPSR7_11_8 [4] */ |
| 4150 | IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C, |
| 4151 | FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C, |
| 4152 | 0, 0, 0, 0, |
| 4153 | 0, 0, 0, 0, |
| 4154 | /* IPSR7_7_4 [4] */ |
| 4155 | IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C, |
| 4156 | FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C, |
| 4157 | 0, 0, 0, 0, |
| 4158 | 0, 0, 0, 0, |
| 4159 | /* IPSR7_3_0 [4] */ |
| 4160 | IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C, |
| 4161 | FN_VI4_DATA5_A, 0, FN_DU_DR5, 0, |
| 4162 | 0, 0, 0, 0, |
| 4163 | 0, 0, 0, 0, |
| 4164 | } |
| 4165 | }, |
| 4166 | { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060220, 32, |
| 4167 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4168 | /* IPSR8_31_28 [4] */ |
| 4169 | IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G, |
| 4170 | FN_NFRBx_B, |
| 4171 | 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0, |
| 4172 | 0, 0, 0, 0, |
| 4173 | 0, 0, 0, 0, |
| 4174 | /* IPSR8_27_24 [4] */ |
| 4175 | IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G, |
| 4176 | FN_NFDATA15_B, |
| 4177 | 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0, |
| 4178 | 0, 0, 0, 0, |
| 4179 | 0, 0, 0, 0, |
| 4180 | /* IPSR8_23_20 [4] */ |
| 4181 | IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G, |
| 4182 | FN_NFDATA14_B, |
| 4183 | 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0, |
| 4184 | 0, 0, 0, 0, |
| 4185 | 0, 0, 0, 0, |
| 4186 | /* IPSR8_19_16 [4] */ |
| 4187 | IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G, |
| 4188 | FN_NFWPx_B, |
| 4189 | 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0, |
| 4190 | 0, 0, 0, 0, |
| 4191 | 0, 0, 0, 0, |
| 4192 | /* IPSR8_15_12 [4] */ |
| 4193 | IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G, |
| 4194 | FN_NFCEx_B, |
| 4195 | 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0, |
| 4196 | 0, 0, 0, 0, |
| 4197 | 0, 0, 0, 0, |
| 4198 | /* IPSR8_11_8 [4] */ |
| 4199 | IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0, |
| 4200 | 0, FN_SIM0_CLK_A, 0, 0, |
| 4201 | 0, 0, 0, 0, |
| 4202 | 0, 0, 0, 0, |
| 4203 | /* IPSR8_7_4 [4] */ |
| 4204 | IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0, |
| 4205 | 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0, |
| 4206 | 0, 0, 0, 0, |
| 4207 | 0, 0, 0, 0, |
| 4208 | /* IPSR8_3_0 [4] */ |
| 4209 | IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0, |
| 4210 | 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0, |
| 4211 | 0, 0, 0, 0, |
| 4212 | 0, 0, 0, 0, |
| 4213 | } |
| 4214 | }, |
| 4215 | { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060224, 32, |
| 4216 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4217 | /* IPSR9_31_28 [4] */ |
| 4218 | IFN_SD3_CLK, 0, FN_NFWEx, 0, |
| 4219 | 0, 0, 0, 0, |
| 4220 | 0, 0, 0, 0, |
| 4221 | 0, 0, 0, 0, |
| 4222 | /* IPSR9_27_24 [4] */ |
| 4223 | IFN_SD2_DS, 0, FN_NFALE, 0, |
| 4224 | 0, 0, 0, 0, |
| 4225 | 0, 0, 0, 0, |
| 4226 | 0, 0, 0, 0, |
| 4227 | /* IPSR9_23_20 [4] */ |
| 4228 | IFN_SD2_DAT3, 0, FN_NFDATA13, 0, |
| 4229 | 0, 0, 0, 0, |
| 4230 | 0, 0, 0, 0, |
| 4231 | 0, 0, 0, 0, |
| 4232 | /* IPSR9_19_16 [4] */ |
| 4233 | IFN_SD2_DAT2, 0, FN_NFDATA12, 0, |
| 4234 | 0, 0, 0, 0, |
| 4235 | 0, 0, 0, 0, |
| 4236 | 0, 0, 0, 0, |
| 4237 | /* IPSR9_15_12 [4] */ |
| 4238 | IFN_SD2_DAT1, 0, FN_NFDATA11, 0, |
| 4239 | 0, 0, 0, 0, |
| 4240 | 0, 0, 0, 0, |
| 4241 | 0, 0, 0, 0, |
| 4242 | /* IPSR9_11_8 [4] */ |
| 4243 | IFN_SD2_DAT0, 0, FN_NFDATA10, 0, |
| 4244 | 0, 0, 0, 0, |
| 4245 | 0, 0, 0, 0, |
| 4246 | 0, 0, 0, 0, |
| 4247 | /* IPSR9_7_4 [4] */ |
| 4248 | IFN_SD2_CMD, 0, FN_NFDATA9, 0, |
| 4249 | 0, 0, 0, 0, |
| 4250 | 0, 0, 0, 0, |
| 4251 | 0, 0, 0, 0, |
| 4252 | /* IPSR9_3_0 [4] */ |
| 4253 | IFN_SD3_CLK, 0, FN_NFDATA8, 0, |
| 4254 | 0, 0, 0, 0, |
| 4255 | 0, 0, 0, 0, |
| 4256 | 0, 0, 0, 0, |
| 4257 | } |
| 4258 | }, |
| 4259 | { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060228, 32, |
| 4260 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4261 | /* IPSR10_31_28 [4] */ |
| 4262 | IFN_SD3_DAT6, FN_SD3_CD, FN_NFDATA6, 0, |
| 4263 | 0, 0, 0, 0, |
| 4264 | 0, 0, 0, 0, |
| 4265 | 0, 0, 0, 0, |
| 4266 | /* IPSR10_27_24 [4] */ |
| 4267 | IFN_SD3_DAT5, FN_SD2_WP_A, FN_NFDATA5, 0, |
| 4268 | 0, 0, 0, 0, |
| 4269 | 0, 0, 0, 0, |
| 4270 | 0, 0, 0, 0, |
| 4271 | /* IPSR10_23_20 [4] */ |
| 4272 | IFN_SD3_DAT4, FN_SD2_CD_A, FN_NFDATA4, 0, |
| 4273 | 0, 0, 0, 0, |
| 4274 | 0, 0, 0, 0, |
| 4275 | 0, 0, 0, 0, |
| 4276 | /* IPSR10_19_16 [4] */ |
| 4277 | IFN_SD3_DAT3, 0, FN_NFDATA3, 0, |
| 4278 | 0, 0, 0, 0, |
| 4279 | 0, 0, 0, 0, |
| 4280 | 0, 0, 0, 0, |
| 4281 | /* IPSR10_15_12 [4] */ |
| 4282 | IFN_SD3_DAT2, 0, FN_NFDATA2, 0, |
| 4283 | 0, 0, 0, 0, |
| 4284 | 0, 0, 0, 0, |
| 4285 | 0, 0, 0, 0, |
| 4286 | /* IPSR10_11_8 [4] */ |
| 4287 | IFN_SD3_DAT1, 0, FN_NFDATA1, 0, |
| 4288 | 0, 0, 0, 0, |
| 4289 | 0, 0, 0, 0, |
| 4290 | 0, 0, 0, 0, |
| 4291 | /* IPSR10_7_4 [4] */ |
| 4292 | IFN_SD3_DAT0, 0, FN_NFDATA0, 0, |
| 4293 | 0, 0, 0, 0, |
| 4294 | 0, 0, 0, 0, |
| 4295 | 0, 0, 0, 0, |
| 4296 | /* IPSR10_3_0 [4] */ |
| 4297 | IFN_SD3_CMD, 0, FN_NFREx, 0, |
| 4298 | 0, 0, 0, 0, |
| 4299 | 0, 0, 0, 0, |
| 4300 | 0, 0, 0, 0, |
| 4301 | } |
| 4302 | }, |
| 4303 | { PINMUX_CFG_REG_VAR("IPSR11", 0xE606022C, 32, |
| 4304 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4305 | /* IPSR11_31_28 [4] */ |
| 4306 | IFN_RX0, FN_HRX1_B, 0, 0, |
| 4307 | 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B, |
| 4308 | 0, 0, 0, 0, |
| 4309 | 0, 0, 0, 0, |
| 4310 | /* IPSR11_27_24 [4] */ |
| 4311 | IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B, |
| 4312 | FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM_0_C, |
| 4313 | FN_RIF0_CLK_B, |
| 4314 | 0, FN_ADICHS2, 0, FN_RIF0_CLK_B, |
| 4315 | 0, 0, 0, 0, |
| 4316 | /* IPSR11_23_20 [4] */ |
| 4317 | IFN_SD1_WP, 0, FN_NFCEx_A, 0, |
| 4318 | 0, FN_SIM0_D_B, 0, 0, |
| 4319 | 0, 0, 0, 0, |
| 4320 | 0, 0, 0, 0, |
| 4321 | /* IPSR11_19_16 [4] */ |
| 4322 | IFN_SD1_CD, 0, FN_NFRBx_A, 0, |
| 4323 | 0, FN_SIM0_CLK_B, 0, 0, |
| 4324 | 0, 0, 0, 0, |
| 4325 | 0, 0, 0, 0, |
| 4326 | /* IPSR11_15_12 [4] */ |
| 4327 | IFN_SD0_WP, 0, FN_NFDATA15_A, 0, |
| 4328 | FN_SDA2_B, 0, 0, 0, |
| 4329 | 0, 0, 0, 0, |
| 4330 | 0, 0, 0, 0, |
| 4331 | /* IPSR11_11_8 [4] */ |
| 4332 | IFN_SD0_CD, 0, FN_NFDATA14_A, 0, |
| 4333 | FN_SCL2_B, FN_SIM0_RST_A, 0, 0, |
| 4334 | 0, 0, 0, 0, |
| 4335 | 0, 0, 0, 0, |
| 4336 | /* IPSR11_7_4 [4] */ |
| 4337 | IFN_SD3_DS, 0, FN_NFCLE, 0, |
| 4338 | 0, 0, 0, 0, |
| 4339 | 0, 0, 0, 0, |
| 4340 | 0, 0, 0, 0, |
| 4341 | /* IPSR11_3_0 [4] */ |
| 4342 | IFN_SD3_DAT7, FN_SD3_WP, FN_NFDATA7, 0, |
| 4343 | 0, 0, 0, 0, |
| 4344 | 0, 0, 0, 0, |
| 4345 | 0, 0, 0, 0, |
| 4346 | } |
| 4347 | }, |
| 4348 | { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060230, 32, |
| 4349 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4350 | /* IPSR12_31_28 [4] */ |
| 4351 | IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0, |
| 4352 | 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B, |
| 4353 | 0, FN_ADICLK, 0, 0, |
| 4354 | 0, 0, 0, 0, |
| 4355 | /* IPSR12_27_24 [4] */ |
| 4356 | IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0, |
| 4357 | 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B, |
| 4358 | 0, FN_ADICHS0, 0, 0, |
| 4359 | 0, 0, 0, 0, |
| 4360 | /* IPSR12_23_20 [4] */ |
| 4361 | IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0, |
| 4362 | 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B, |
| 4363 | 0, FN_ADIDATA, 0, 0, |
| 4364 | /* IPSR12_19_16 [4] */ |
| 4365 | IFN_TX1_A, FN_HTX1_A, 0, 0, |
| 4366 | 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C, |
| 4367 | 0, 0, 0, 0, |
| 4368 | 0, 0, 0, 0, |
| 4369 | /* IPSR12_15_12 [4] */ |
| 4370 | IFN_RX1_A, FN_HRX1_A, 0, 0, |
| 4371 | 0, FN_TS_SDAT0_C, FN_STP_ISD_0_C, FN_RIF1_CLK_C, |
| 4372 | 0, 0, 0, 0, |
| 4373 | 0, 0, 0, 0, |
| 4374 | /* IPSR12_11_8 [4] */ |
| 4375 | IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B, |
| 4376 | FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B, |
| 4377 | 0, FN_ADICHS1, 0, 0, |
| 4378 | 0, 0, 0, 0, |
| 4379 | /* IPSR12_7_4 [4] */ |
| 4380 | IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0, |
| 4381 | 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B, |
| 4382 | FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0, |
| 4383 | 0, 0, 0, 0, |
| 4384 | /* IPSR12_3_0 [4] */ |
| 4385 | IFN_TX0, FN_HTX1_B, 0, 0, |
| 4386 | 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B, |
| 4387 | 0, 0, 0, 0, |
| 4388 | 0, 0, 0, 0, |
| 4389 | } |
| 4390 | }, |
| 4391 | { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060234, 32, |
| 4392 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4393 | /* IPSR13_31_28 [4] */ |
| 4394 | IFN_MSIOF0_SYNC, 0, 0, 0, |
| 4395 | 0, 0, 0, 0, |
| 4396 | FN_AUDIO_CLKOUT_A, 0, FN_TX5_B, 0, |
| 4397 | 0, FN_BPFCLK_D, 0, 0, |
| 4398 | /* IPSR13_27_24 [4] */ |
| 4399 | IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0, |
| 4400 | FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A, |
| 4401 | FN_AUDIO_CLKOUT2_A, 0, 0, 0, |
| 4402 | 0, 0, 0, 0, |
| 4403 | /* IPSR13_23_20 [4] */ |
| 4404 | IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0, |
| 4405 | FN_SSI_SCK9_A, FN_TS_SPSYNC0_D, FN_STP_ISSYNC_0_D, |
| 4406 | FN_RIF0_SYNC_C, |
| 4407 | FN_AUDIO_CLKOUT1_A, 0, 0, 0, |
| 4408 | 0, 0, 0, 0, |
| 4409 | /* IPSR13_19_16 [4] */ |
| 4410 | IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0, |
| 4411 | FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C, |
| 4412 | 0, 0, 0, 0, |
| 4413 | 0, 0, 0, 0, |
| 4414 | /* IPSR13_15_12 [4] */ |
| 4415 | IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0, |
| 4416 | FN_SS1_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C, |
| 4417 | 0, 0, 0, 0, |
| 4418 | 0, 0, 0, 0, |
| 4419 | /* IPSR13_11_8 [4] */ |
| 4420 | IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A, |
| 4421 | FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C, |
| 4422 | 0, 0, FN_RX5_B, 0, |
| 4423 | 0, 0, 0, 0, |
| 4424 | /* IPSR13_7_4 [4] */ |
| 4425 | IFN_RX2_A, 0, 0, FN_SD2_WP_B, |
| 4426 | FN_SDA1_A, 0, FN_FMIN_A, FN_RIF1_SYNC_C, |
| 4427 | 0, FN_FSO_CEF_1_B, 0, 0, |
| 4428 | 0, 0, 0, 0, |
| 4429 | /* IPSR13_3_0 [4] */ |
| 4430 | IFN_TX2_A, 0, 0, FN_SD2_CD_B, |
| 4431 | FN_SCL1_A, 0, FN_FMCLK_A, FN_RIF1_D1_C, |
| 4432 | 0, FN_FSO_CFE_0_B, 0, 0, |
| 4433 | 0, 0, 0, 0, |
| 4434 | } |
| 4435 | }, |
| 4436 | { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060238, 32, |
| 4437 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4438 | /* IPSR14_31_28 [4] */ |
| 4439 | IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0, |
| 4440 | 0, 0, 0, FN_MOUT2, |
| 4441 | 0, 0, 0, 0, |
| 4442 | 0, 0, 0, 0, |
| 4443 | /* IPSR14_27_24 [4] */ |
| 4444 | IFN_SSI_WS0129, 0, FN_MSIOF1_SS1_F, 0, |
| 4445 | 0, 0, 0, FN_MOUT1, |
| 4446 | 0, 0, 0, 0, |
| 4447 | 0, 0, 0, 0, |
| 4448 | /* IPSR14_23_20 [4] */ |
| 4449 | IFN_SSI_SCK0129, 0, FN_MSIOF1_TXD_F, 0, |
| 4450 | 0, 0, 0, FN_MOUT0, |
| 4451 | 0, 0, 0, 0, |
| 4452 | 0, 0, 0, 0, |
| 4453 | /* IPSR14_19_16 [4] */ |
| 4454 | IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0, |
| 4455 | 0, 0, 0, 0, |
| 4456 | 0, 0, 0, 0, |
| 4457 | 0, 0, 0, 0, |
| 4458 | /* IPSR14_15_12 [4] */ |
| 4459 | IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0, |
| 4460 | FN_SDA1_B, 0, 0, 0, |
| 4461 | 0, 0, 0, 0, |
| 4462 | 0, 0, 0, 0, |
| 4463 | /* IPSR14_11_8 [4] */ |
| 4464 | IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0, |
| 4465 | FN_SCL1_B, 0, 0, 0, |
| 4466 | 0, 0, 0, 0, |
| 4467 | 0, 0, 0, 0, |
| 4468 | /* IPSR14_7_4 [4] */ |
| 4469 | IFN_MSIOF0_SS2, FN_TX5_A, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A, |
| 4470 | FN_SSI_WS2_A, 0, FN_STP_OPWM_0_D, 0, |
| 4471 | FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0, |
| 4472 | /* IPSR14_3_0 [4] */ |
| 4473 | IFN_MSIOF0_SS1, FN_RX5_A, 0, FN_AUDIO_CLKA_C, |
| 4474 | FN_SSI_SCK2_A, 0, FN_STP_IVCXO27_0_C, 0, |
| 4475 | FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0, |
| 4476 | 0, 0, 0, 0, |
| 4477 | } |
| 4478 | }, |
| 4479 | { PINMUX_CFG_REG_VAR("IPSR15", 0xE606023C, 32, |
| 4480 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4481 | /* IPSR15_31_28 [4] */ |
| 4482 | IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0, |
| 4483 | 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A, |
| 4484 | FN_RIF2_D1_A, 0, 0, 0, |
| 4485 | 0, 0, 0, 0, |
| 4486 | /* IPSR15_27_24 [4] */ |
| 4487 | IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0, |
| 4488 | 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A, |
| 4489 | FN_RIF2_SYNC_A, 0, 0, 0, |
| 4490 | 0, 0, 0, 0, |
| 4491 | /* IPSR15_23_20 [4] */ |
| 4492 | IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0, |
| 4493 | 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A, |
| 4494 | FN_RIF2_CLK_A, 0, 0, 0, |
| 4495 | 0, 0, 0, 0, |
| 4496 | /* IPSR15_19_16 [4] */ |
| 4497 | IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0, |
| 4498 | 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A, |
| 4499 | FN_RIF2_D0_A, 0, 0, 0, |
| 4500 | 0, 0, 0, 0, |
| 4501 | /* IPSR15_15_12 [4] */ |
| 4502 | IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0, |
| 4503 | 0, 0, FN_STP_IVCXO27_0_A, 0, |
| 4504 | 0, 0, 0, 0, |
| 4505 | 0, 0, 0, 0, |
| 4506 | /* IPSR15_11_8 [4] */ |
| 4507 | IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0, |
| 4508 | 0, 0, FN_STP_OPWM_0_A, 0, |
| 4509 | 0, 0, 0, 0, |
| 4510 | 0, 0, 0, 0, |
| 4511 | /* IPSR15_7_4 [4] */ |
| 4512 | IFN_SSI_SDATA2_A, 0, 0, 0, |
| 4513 | FN_SSI_SCK1_B, 0, 0, FN_MOUT6, |
| 4514 | 0, 0, 0, 0, |
| 4515 | 0, 0, 0, 0, |
| 4516 | /* IPSR15_3_0 [4] */ |
| 4517 | IFN_SSI_SDATA1_A, 0, 0, 0, |
| 4518 | 0, 0, 0, FN_MOUT5, |
| 4519 | 0, 0, 0, 0, |
| 4520 | 0, 0, 0, 0, |
| 4521 | } |
| 4522 | }, |
| 4523 | { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060240, 32, |
| 4524 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4525 | /* IPSR16_31_28 [4] */ |
| 4526 | IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A, |
| 4527 | FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5, |
| 4528 | 0, 0, 0, 0, |
| 4529 | 0, 0, 0, 0, |
| 4530 | /* IPSR16_27_24 [4] */ |
| 4531 | IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0, |
| 4532 | 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A, |
| 4533 | FN_EIF3_D1_A, 0, 0, 0, |
| 4534 | 0, 0, 0, 0, |
| 4535 | /* IPSR16_23_20 [4] */ |
| 4536 | IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0, |
| 4537 | 0, FN_TS_SDEN1_A, FN_STP_IEN_1_A, FN_RIF1_D0_A, |
| 4538 | FN_RIF3_D0_A, 0, FN_TCLK2_A, 0, |
| 4539 | /* IPSR16_19_16 [4] */ |
| 4540 | IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0, |
| 4541 | 0, FN_TS_SDAT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A, |
| 4542 | FN_RIF3_SYNC_A, 0, 0, 0, |
| 4543 | 0, 0, 0, 0, |
| 4544 | /* IPSR16_15_12 [4] */ |
| 4545 | IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0, |
| 4546 | 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A, |
| 4547 | FN_RIF3_CLK_A, 0, 0, 0, |
| 4548 | 0, 0, 0, 0, |
| 4549 | /* IPSR16_11_8 [4] */ |
| 4550 | IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D, |
| 4551 | 0, 0, 0, 0, |
| 4552 | 0, 0, 0, 0, |
| 4553 | 0, 0, 0, 0, |
| 4554 | /* IPSR16_7_4 [4] */ |
| 4555 | IFN_SSI_WS6, 0, 0, FN_SIM0_D_D, |
| 4556 | 0, 0, 0, 0, |
| 4557 | 0, 0, 0, 0, |
| 4558 | 0, 0, 0, 0, |
| 4559 | /* IPSR16_3_0 [4] */ |
| 4560 | IFN_SSI_SCK6, 0, 0, FN_SIM0_RST_D, |
| 4561 | 0, 0, 0, 0, |
| 4562 | 0, 0, FN_FSO_TOE_A, 0, |
| 4563 | 0, 0, 0, 0, |
| 4564 | } |
| 4565 | }, |
| 4566 | { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060244, 32, |
| 4567 | 4, 4, 4, 4, 4, 4, 4, 4) { |
| 4568 | /* IPSR17_31_28 [4] */ |
| 4569 | IFN_USB30_OVC, 0, FN_AUDIO_CLKOUT1_B, 0, |
| 4570 | FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D, |
| 4571 | FN_STP_IVCXO27_0_E, |
| 4572 | FN_RIF3_D1_B, 0, FN_FSO_TOE_B, FN_TPU0TO1, |
| 4573 | 0, 0, 0, 0, |
| 4574 | /* IPSR17_27_24 [4] */ |
| 4575 | IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B, |
| 4576 | FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E, |
| 4577 | FN_RIF3_D0_B, 0, FN_TCLK2_B, FN_TPU0TO0, |
| 4578 | FN_BPFCLK_C, FN_HRTS2x_C, 0, 0, |
| 4579 | /* IPSR17_23_20 [4] */ |
| 4580 | IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0, |
| 4581 | FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B, |
| 4582 | FN_RIF2_SYNC_B, 0, FN_REMOCON_B, 0, |
| 4583 | 0, FN_HCTS2x_C, 0, 0, |
| 4584 | /* IPSR17_19_16 [4] */ |
| 4585 | IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C, |
| 4586 | FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B, |
| 4587 | FN_RIF2_CLK_B, 0, FN_SPEEDIN_A, 0, |
| 4588 | 0, FN_HTX2_C, 0, 0, |
| 4589 | /* IPSR17_15_12 [4] */ |
| 4590 | IFN_USB0_OVC, 0, 0, FN_SIM0_D_C, |
| 4591 | 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0, |
| 4592 | FN_RIF3_SYNC_B, 0, 0, 0, |
| 4593 | 0, FN_HRX2_C, 0, 0, |
| 4594 | /* IPSR17_11_8 [4] */ |
| 4595 | IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C, |
| 4596 | 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B, |
| 4597 | FN_RIF3_CLK_B, 0, FN_FSO_CFE_1_A, 0, |
| 4598 | 0, FN_HSCK2_C, 0, 0, |
| 4599 | /* IPSR17_7_4 [4] */ |
| 4600 | IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0, |
| 4601 | 0, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A, |
| 4602 | 0, 0, FN_TCLK1_A, 0, |
| 4603 | 0, 0, 0, 0, |
| 4604 | /* IPSR17_3_0 [4] */ |
| 4605 | IFN_AUDIO_CLKA_A, 0, 0, 0, |
| 4606 | 0, 0, 0, 0, |
| 4607 | 0, 0, 0, FN_CC5_OSCOUT, |
| 4608 | 0, 0, 0, 0, |
| 4609 | } |
| 4610 | }, |
| 4611 | { PINMUX_CFG_REG_VAR("IPSR18", 0xE6060248, 32, |
| 4612 | 1, 1, 1, 1, 1, 1, 1, 1, |
| 4613 | 1, 1, 1, 1, 1, 1, 1, 1, |
| 4614 | 1, 1, 1, 1, 1, 1, 1, 1, |
| 4615 | 4, 4) { |
| 4616 | /* reserved [31..24] */ |
| 4617 | 0, 0, |
| 4618 | 0, 0, |
| 4619 | 0, 0, |
| 4620 | 0, 0, |
| 4621 | 0, 0, |
| 4622 | 0, 0, |
| 4623 | 0, 0, |
| 4624 | 0, 0, |
| 4625 | /* reserved [23..16] */ |
| 4626 | 0, 0, |
| 4627 | 0, 0, |
| 4628 | 0, 0, |
| 4629 | 0, 0, |
| 4630 | 0, 0, |
| 4631 | 0, 0, |
| 4632 | 0, 0, |
| 4633 | 0, 0, |
| 4634 | /* reserved [15..8] */ |
| 4635 | 0, 0, |
| 4636 | 0, 0, |
| 4637 | 0, 0, |
| 4638 | 0, 0, |
| 4639 | 0, 0, |
| 4640 | 0, 0, |
| 4641 | 0, 0, |
| 4642 | 0, 0, |
| 4643 | /* IPSR18_7_4 [4] */ |
| 4644 | IFN_GP6_31, 0, 0, FN_AUDIO_CLKOUT3_B, |
| 4645 | FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0, |
| 4646 | FN_RIF2_D1_B, 0, 0, FN_TPU0TO3, |
| 4647 | FN_FMIN_C, FN_FMIN_D, 0, 0, |
| 4648 | /* IPSR18_3_0 [4] */ |
| 4649 | IFN_GP6_30, 0, 0, FN_AUDIO_CLKOUT2_B, |
| 4650 | FN_SSI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0, |
| 4651 | FN_RIF2_D0_B, 0, FN_FSO_CFE_0_A, FN_TPU0TO2, |
| 4652 | FN_FMCLK_C, FN_FMCLK_D, 0, 0, |
| 4653 | } |
| 4654 | }, |
| 4655 | { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE6060500, 32, |
| 4656 | 3, 2, 3, |
| 4657 | 1, 1, 1, 1, 1, 2, 1, |
| 4658 | 1, 2, 1, 1, 1, 2, |
| 4659 | 2, 1, 2, 1, 1, 1) { |
| 4660 | /* SEL_MSIOF3 [3] */ |
| 4661 | FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1, |
| 4662 | FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3, |
| 4663 | FN_SEL_MSIOF3_4, FN_SEL_MSIOF3_5, |
| 4664 | FN_SEL_MSIOF3_6, 0, |
| 4665 | /* SEL_MSIOF2 [2] */ |
| 4666 | FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1, |
| 4667 | FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3, |
| 4668 | /* SEL_MSIOF1 [3] */ |
| 4669 | FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1, |
| 4670 | FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3, |
| 4671 | FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5, |
| 4672 | FN_SEL_MSIOF1_6, 0, |
| 4673 | |
| 4674 | /* SEL_LBSC [1] */ |
| 4675 | FN_SEL_LBSC_0, FN_SEL_LBSC_1, |
| 4676 | /* SEL_IEBUS [1] */ |
| 4677 | FN_SEL_IEBUS_0, FN_SEL_IEBUS_1, |
| 4678 | /* SEL_I2C2 [1] */ |
| 4679 | FN_SEL_I2C2_0, FN_SEL_I2C2_1, |
| 4680 | /* SEL_I2C1 [1] */ |
| 4681 | FN_SEL_I2C1_0, FN_SEL_I2C1_1, |
| 4682 | /* SEL_HSCIF4 [1] */ |
| 4683 | FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1, |
| 4684 | /* SEL_HSCIF3 [2] */ |
| 4685 | FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1, |
| 4686 | FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3, |
| 4687 | /* SEL_HSCIF1 [1] */ |
| 4688 | FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1, |
| 4689 | |
| 4690 | /* SEL_FSO [1] */ |
| 4691 | FN_SEL_FSO_0, FN_SEL_FSO_1, |
| 4692 | /* SEL_HSCIF2 [2] */ |
| 4693 | FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, |
| 4694 | FN_SEL_HSCIF2_2, 0, |
| 4695 | /* SEL_ETHERAVB [1] */ |
| 4696 | FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1, |
| 4697 | /* SEL_DRIF3 [1] */ |
| 4698 | FN_SEL_DRIF3_0, FN_SEL_DRIF3_1, |
| 4699 | /* SEL_DRIF2 [1] */ |
| 4700 | FN_SEL_DRIF2_0, FN_SEL_DRIF2_1, |
| 4701 | /* SEL_DRIF1 [2] */ |
| 4702 | FN_SEL_DRIF1_0, FN_SEL_DRIF1_1, |
| 4703 | FN_SEL_DRIF1_2, 0, |
| 4704 | |
| 4705 | /* SEL_DRIF0 [2] */ |
| 4706 | FN_SEL_DRIF0_0, FN_SEL_DRIF0_1, |
| 4707 | FN_SEL_DRIF0_2, 0, |
| 4708 | /* SEL_CANFD0 [1] */ |
| 4709 | FN_SEL_CANFD_0, FN_SEL_CANFD_1, |
| 4710 | /* SEL_ADG [2] */ |
| 4711 | FN_SEL_ADG_0, FN_SEL_ADG_1, |
| 4712 | FN_SEL_ADG_2, FN_SEL_ADG_3, |
| 4713 | /* reserved [3] */ |
| 4714 | 0, 0, |
| 4715 | 0, 0, |
| 4716 | 0, 0, |
| 4717 | } |
| 4718 | }, |
| 4719 | { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE6060504, 32, |
| 4720 | 2, 3, 1, 2, |
| 4721 | 3, 1, 1, 2, 1, |
| 4722 | 2, 1, 1, 1, 1, 1, 1, |
| 4723 | 1, 1, 1, 1, 1, 1, 1, 1) { |
| 4724 | /* SEL_TSIF1 [2] */ |
| 4725 | FN_SEL_TSIF1_0, |
| 4726 | FN_SEL_TSIF1_1, |
| 4727 | FN_SEL_TSIF1_2, |
| 4728 | FN_SEL_TSIF1_3, |
| 4729 | /* SEL_TSIF0 [3] */ |
| 4730 | FN_SEL_TSIF0_0, |
| 4731 | FN_SEL_TSIF0_1, |
| 4732 | FN_SEL_TSIF0_2, |
| 4733 | FN_SEL_TSIF0_3, |
| 4734 | FN_SEL_TSIF0_4, |
| 4735 | 0, |
| 4736 | 0, |
| 4737 | 0, |
| 4738 | /* SEL_TIMER_TMU [1] */ |
| 4739 | FN_SEL_TIMER_TMU_0, |
| 4740 | FN_SEL_TIMER_TMU_1, |
| 4741 | /* SEL_SSP1_1 [2] */ |
| 4742 | FN_SEL_SSP1_1_0, |
| 4743 | FN_SEL_SSP1_1_1, |
| 4744 | FN_SEL_SSP1_1_2, |
| 4745 | FN_SEL_SSP1_1_3, |
| 4746 | |
| 4747 | /* SEL_SSP1_0 [3] */ |
| 4748 | FN_SEL_SSP1_0_0, |
| 4749 | FN_SEL_SSP1_0_1, |
| 4750 | FN_SEL_SSP1_0_2, |
| 4751 | FN_SEL_SSP1_0_3, |
| 4752 | FN_SEL_SSP1_0_4, |
| 4753 | 0, |
| 4754 | 0, |
| 4755 | 0, |
| 4756 | /* SEL_SSI [1] */ |
| 4757 | FN_SEL_SSI_0, |
| 4758 | FN_SEL_SSI_1, |
| 4759 | /* SEL_SPEED_PULSE_IF [1] */ |
| 4760 | FN_SEL_SPEED_PULSE_IF_0, |
| 4761 | FN_SEL_SPEED_PULSE_IF_1, |
| 4762 | /* SEL_SIMCARD [2] */ |
| 4763 | FN_SEL_SIMCARD_0, |
| 4764 | FN_SEL_SIMCARD_1, |
| 4765 | FN_SEL_SIMCARD_2, |
| 4766 | FN_SEL_SIMCARD_3, |
| 4767 | /* SEL_SDHI2 [1] */ |
| 4768 | FN_SEL_SDHI2_0, |
| 4769 | FN_SEL_SDHI2_1, |
| 4770 | |
| 4771 | /* SEL_SCIF4 [2] */ |
| 4772 | FN_SEL_SCIF4_0, |
| 4773 | FN_SEL_SCIF4_1, |
| 4774 | FN_SEL_SCIF4_2, |
| 4775 | 0, |
| 4776 | /* SEL_SCIF3 [1] */ |
| 4777 | FN_SEL_SCIF3_0, |
| 4778 | FN_SEL_SCIF3_1, |
| 4779 | /* SEL_SCIF2 [1] */ |
| 4780 | FN_SEL_SCIF2_0, |
| 4781 | FN_SEL_SCIF2_1, |
| 4782 | /* SEL_SCIF1 [1] */ |
| 4783 | FN_SEL_SCIF1_0, |
| 4784 | FN_SEL_SCIF1_1, |
| 4785 | /* SEL_SCIF [1] */ |
| 4786 | FN_SEL_SCIF_0, |
| 4787 | FN_SEL_SCIF_1, |
| 4788 | /* SEL_REMOCON [1] */ |
| 4789 | FN_SEL_REMOCON_0, |
| 4790 | FN_SEL_REMOCON_1, |
| 4791 | /* reserved [2] */ |
| 4792 | 0, 0, |
| 4793 | |
| 4794 | 0, 0, |
| 4795 | /* SEL_RCAN [1] */ |
| 4796 | FN_SEL_RCAN_0, |
| 4797 | FN_SEL_RCAN_1, |
| 4798 | /* SEL_PWM6 [1] */ |
| 4799 | FN_SEL_PWM6_0, |
| 4800 | FN_SEL_PWM6_1, |
| 4801 | /* SEL_PWM5 [1] */ |
| 4802 | FN_SEL_PWM5_0, |
| 4803 | FN_SEL_PWM5_1, |
| 4804 | /* SEL_PWM4 [1] */ |
| 4805 | FN_SEL_PWM4_0, |
| 4806 | FN_SEL_PWM4_1, |
| 4807 | /* SEL_PWM3 [1] */ |
| 4808 | FN_SEL_PWM3_0, |
| 4809 | FN_SEL_PWM3_1, |
| 4810 | /* SEL_PWM2 [1] */ |
| 4811 | FN_SEL_PWM2_0, |
| 4812 | FN_SEL_PWM2_1, |
| 4813 | /* SEL_PWM1 [1] */ |
| 4814 | FN_SEL_PWM1_0, |
| 4815 | FN_SEL_PWM1_1, |
| 4816 | } |
| 4817 | }, |
| 4818 | { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060508, 32, |
| 4819 | 1, 1, 1, 2, 1, |
| 4820 | 3, 1, 1, 1, 1, 1, 1, |
| 4821 | 1, 1, 1, 1, 1, 1, 1, 1, |
| 4822 | 1, 1, 1, 1, 1, 1, 1, 1, |
| 4823 | 1) { |
| 4824 | /* I2C_SEL_5 [1] */ |
| 4825 | FN_I2C_SEL_5_0, |
| 4826 | FN_I2C_SEL_5_1, |
| 4827 | /* I2C_SEL_3 [1] */ |
| 4828 | FN_I2C_SEL_3_0, |
| 4829 | FN_I2C_SEL_3_1, |
| 4830 | /* I2C_SEL_0 [1] */ |
| 4831 | FN_I2C_SEL_0_0, |
| 4832 | FN_I2C_SEL_0_1, |
| 4833 | /* SEL_FM [2] */ |
| 4834 | FN_SEL_FM_0, |
| 4835 | FN_SEL_FM_1, |
| 4836 | FN_SEL_FM_2, |
| 4837 | FN_SEL_FM_3, |
| 4838 | /* SEL_SCIF5 [1] */ |
| 4839 | FN_SEL_SCIF5_0, |
| 4840 | FN_SEL_SCIF5_1, |
| 4841 | |
| 4842 | /* SEL_I2C6 [3] */ |
| 4843 | FN_SEL_I2C6_0, |
| 4844 | FN_SEL_I2C6_1, |
| 4845 | FN_SEL_I2C6_2, |
| 4846 | 0, |
| 4847 | 0, |
| 4848 | 0, |
| 4849 | 0, |
| 4850 | 0, |
| 4851 | /* SEL_NDF [1] */ |
| 4852 | FN_SEL_NDF_0, |
| 4853 | FN_SEL_NDF_1, |
| 4854 | /* SEL_SSI2 [1] */ |
| 4855 | FN_SEL_SSI2_0, |
| 4856 | FN_SEL_SSI2_1, |
| 4857 | /* SEL_SSI9 [1] */ |
| 4858 | FN_SEL_SSI9_0, |
| 4859 | FN_SEL_SSI9_1, |
| 4860 | /* SEL_TIMER_TME2 [1] */ |
| 4861 | FN_SEL_TIMER_TMU2_0, |
| 4862 | FN_SEL_TIMER_TMU2_1, |
| 4863 | /* SEL_ADG_B [1] */ |
| 4864 | FN_SEL_ADG_B_0, |
| 4865 | FN_SEL_ADG_B_1, |
| 4866 | |
| 4867 | /* SEL_ADG_C [1] */ |
| 4868 | FN_SEL_ADG_C_0, |
| 4869 | FN_SEL_ADG_C_1, |
| 4870 | /* reserved [16] */ |
| 4871 | 0, 0, |
| 4872 | 0, 0, |
| 4873 | 0, 0, |
| 4874 | 0, 0, |
| 4875 | 0, 0, |
| 4876 | 0, 0, |
| 4877 | 0, 0, |
| 4878 | 0, 0, |
| 4879 | 0, 0, |
| 4880 | 0, 0, |
| 4881 | 0, 0, |
| 4882 | 0, 0, |
| 4883 | 0, 0, |
| 4884 | 0, 0, |
| 4885 | 0, 0, |
| 4886 | 0, 0, |
| 4887 | |
| 4888 | /* SEL_VIN4 [1] */ |
| 4889 | FN_SEL_VIN4_0, |
| 4890 | FN_SEL_VIN4_1, |
| 4891 | } |
| 4892 | }, |
| 4893 | |
| 4894 | /* under construction */ |
| 4895 | { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { |
| 4896 | 0, 0, |
| 4897 | 0, 0, |
| 4898 | 0, 0, |
| 4899 | 0, 0, |
| 4900 | 0, 0, |
| 4901 | 0, 0, |
| 4902 | 0, 0, |
| 4903 | 0, 0, |
| 4904 | |
| 4905 | 0, 0, |
| 4906 | 0, 0, |
| 4907 | 0, 0, |
| 4908 | 0, 0, |
| 4909 | 0, 0, |
| 4910 | 0, 0, |
| 4911 | 0, 0, |
| 4912 | 0, 0, |
| 4913 | |
| 4914 | GP_0_15_IN, GP_0_15_OUT, |
| 4915 | GP_0_14_IN, GP_0_14_OUT, |
| 4916 | GP_0_13_IN, GP_0_13_OUT, |
| 4917 | GP_0_12_IN, GP_0_12_OUT, |
| 4918 | GP_0_11_IN, GP_0_11_OUT, |
| 4919 | GP_0_10_IN, GP_0_10_OUT, |
| 4920 | GP_0_9_IN, GP_0_9_OUT, |
| 4921 | GP_0_8_IN, GP_0_8_OUT, |
| 4922 | GP_0_7_IN, GP_0_7_OUT, |
| 4923 | GP_0_6_IN, GP_0_6_OUT, |
| 4924 | GP_0_5_IN, GP_0_5_OUT, |
| 4925 | GP_0_4_IN, GP_0_4_OUT, |
| 4926 | GP_0_3_IN, GP_0_3_OUT, |
| 4927 | GP_0_2_IN, GP_0_2_OUT, |
| 4928 | GP_0_1_IN, GP_0_1_OUT, |
| 4929 | GP_0_0_IN, GP_0_0_OUT, |
| 4930 | } |
| 4931 | }, |
| 4932 | { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) { |
| 4933 | 0, 0, |
| 4934 | 0, 0, |
| 4935 | 0, 0, |
| 4936 | GP_1_28_IN, GP_1_28_OUT, |
| 4937 | GP_1_27_IN, GP_1_27_OUT, |
| 4938 | GP_1_26_IN, GP_1_26_OUT, |
| 4939 | GP_1_25_IN, GP_1_25_OUT, |
| 4940 | GP_1_24_IN, GP_1_24_OUT, |
| 4941 | GP_1_23_IN, GP_1_23_OUT, |
| 4942 | GP_1_22_IN, GP_1_22_OUT, |
| 4943 | GP_1_21_IN, GP_1_21_OUT, |
| 4944 | GP_1_20_IN, GP_1_20_OUT, |
| 4945 | GP_1_19_IN, GP_1_19_OUT, |
| 4946 | GP_1_18_IN, GP_1_18_OUT, |
| 4947 | GP_1_17_IN, GP_1_17_OUT, |
| 4948 | GP_1_16_IN, GP_1_16_OUT, |
| 4949 | GP_1_15_IN, GP_1_15_OUT, |
| 4950 | GP_1_14_IN, GP_1_14_OUT, |
| 4951 | GP_1_13_IN, GP_1_13_OUT, |
| 4952 | GP_1_12_IN, GP_1_12_OUT, |
| 4953 | GP_1_11_IN, GP_1_11_OUT, |
| 4954 | GP_1_10_IN, GP_1_10_OUT, |
| 4955 | GP_1_9_IN, GP_1_9_OUT, |
| 4956 | GP_1_8_IN, GP_1_8_OUT, |
| 4957 | GP_1_7_IN, GP_1_7_OUT, |
| 4958 | GP_1_6_IN, GP_1_6_OUT, |
| 4959 | GP_1_5_IN, GP_1_5_OUT, |
| 4960 | GP_1_4_IN, GP_1_4_OUT, |
| 4961 | GP_1_3_IN, GP_1_3_OUT, |
| 4962 | GP_1_2_IN, GP_1_2_OUT, |
| 4963 | GP_1_1_IN, GP_1_1_OUT, |
| 4964 | GP_1_0_IN, GP_1_0_OUT, |
| 4965 | } |
| 4966 | }, |
| 4967 | { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { |
| 4968 | 0, 0, |
| 4969 | 0, 0, |
| 4970 | 0, 0, |
| 4971 | 0, 0, |
| 4972 | 0, 0, |
| 4973 | 0, 0, |
| 4974 | 0, 0, |
| 4975 | 0, 0, |
| 4976 | |
| 4977 | 0, 0, |
| 4978 | 0, 0, |
| 4979 | 0, 0, |
| 4980 | 0, 0, |
| 4981 | 0, 0, |
| 4982 | 0, 0, |
| 4983 | 0, 0, |
| 4984 | 0, 0, |
| 4985 | |
| 4986 | 0, 0, |
| 4987 | GP_2_14_IN, GP_2_14_OUT, |
| 4988 | GP_2_13_IN, GP_2_13_OUT, |
| 4989 | GP_2_12_IN, GP_2_12_OUT, |
| 4990 | GP_2_11_IN, GP_2_11_OUT, |
| 4991 | GP_2_10_IN, GP_2_10_OUT, |
| 4992 | GP_2_9_IN, GP_2_9_OUT, |
| 4993 | GP_2_8_IN, GP_2_8_OUT, |
| 4994 | GP_2_7_IN, GP_2_7_OUT, |
| 4995 | GP_2_6_IN, GP_2_6_OUT, |
| 4996 | GP_2_5_IN, GP_2_5_OUT, |
| 4997 | GP_2_4_IN, GP_2_4_OUT, |
| 4998 | GP_2_3_IN, GP_2_3_OUT, |
| 4999 | GP_2_2_IN, GP_2_2_OUT, |
| 5000 | GP_2_1_IN, GP_2_1_OUT, |
| 5001 | GP_2_0_IN, GP_2_0_OUT, |
| 5002 | } |
| 5003 | }, |
| 5004 | { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { |
| 5005 | 0, 0, |
| 5006 | 0, 0, |
| 5007 | 0, 0, |
| 5008 | 0, 0, |
| 5009 | 0, 0, |
| 5010 | 0, 0, |
| 5011 | 0, 0, |
| 5012 | 0, 0, |
| 5013 | |
| 5014 | 0, 0, |
| 5015 | 0, 0, |
| 5016 | 0, 0, |
| 5017 | 0, 0, |
| 5018 | 0, 0, |
| 5019 | 0, 0, |
| 5020 | 0, 0, |
| 5021 | 0, 0, |
| 5022 | |
| 5023 | GP_3_15_IN, GP_3_15_OUT, |
| 5024 | GP_3_14_IN, GP_3_14_OUT, |
| 5025 | GP_3_13_IN, GP_3_13_OUT, |
| 5026 | GP_3_12_IN, GP_3_12_OUT, |
| 5027 | GP_3_11_IN, GP_3_11_OUT, |
| 5028 | GP_3_10_IN, GP_3_10_OUT, |
| 5029 | GP_3_9_IN, GP_3_9_OUT, |
| 5030 | GP_3_8_IN, GP_3_8_OUT, |
| 5031 | GP_3_7_IN, GP_3_7_OUT, |
| 5032 | GP_3_6_IN, GP_3_6_OUT, |
| 5033 | GP_3_5_IN, GP_3_5_OUT, |
| 5034 | GP_3_4_IN, GP_3_4_OUT, |
| 5035 | GP_3_3_IN, GP_3_3_OUT, |
| 5036 | GP_3_2_IN, GP_3_2_OUT, |
| 5037 | GP_3_1_IN, GP_3_1_OUT, |
| 5038 | GP_3_0_IN, GP_3_0_OUT, |
| 5039 | } |
| 5040 | }, |
| 5041 | { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { |
| 5042 | 0, 0, |
| 5043 | 0, 0, |
| 5044 | 0, 0, |
| 5045 | 0, 0, |
| 5046 | 0, 0, |
| 5047 | 0, 0, |
| 5048 | 0, 0, |
| 5049 | 0, 0, |
| 5050 | |
| 5051 | 0, 0, |
| 5052 | 0, 0, |
| 5053 | 0, 0, |
| 5054 | 0, 0, |
| 5055 | 0, 0, |
| 5056 | 0, 0, |
| 5057 | GP_4_17_IN, GP_4_17_OUT, |
| 5058 | GP_4_16_IN, GP_4_16_OUT, |
| 5059 | |
| 5060 | GP_4_15_IN, GP_4_15_OUT, |
| 5061 | GP_4_14_IN, GP_4_14_OUT, |
| 5062 | GP_4_13_IN, GP_4_13_OUT, |
| 5063 | GP_4_12_IN, GP_4_12_OUT, |
| 5064 | GP_4_11_IN, GP_4_11_OUT, |
| 5065 | GP_4_10_IN, GP_4_10_OUT, |
| 5066 | GP_4_9_IN, GP_4_9_OUT, |
| 5067 | GP_4_8_IN, GP_4_8_OUT, |
| 5068 | GP_4_7_IN, GP_4_7_OUT, |
| 5069 | GP_4_6_IN, GP_4_6_OUT, |
| 5070 | GP_4_5_IN, GP_4_5_OUT, |
| 5071 | GP_4_4_IN, GP_4_4_OUT, |
| 5072 | GP_4_3_IN, GP_4_3_OUT, |
| 5073 | GP_4_2_IN, GP_4_2_OUT, |
| 5074 | GP_4_1_IN, GP_4_1_OUT, |
| 5075 | GP_4_0_IN, GP_4_0_OUT, |
| 5076 | } |
| 5077 | }, |
| 5078 | { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { |
| 5079 | 0, 0, |
| 5080 | 0, 0, |
| 5081 | 0, 0, |
| 5082 | 0, 0, |
| 5083 | 0, 0, |
| 5084 | 0, 0, |
| 5085 | GP_5_25_IN, GP_5_25_OUT, |
| 5086 | GP_5_24_IN, GP_5_24_OUT, |
| 5087 | |
| 5088 | GP_5_23_IN, GP_5_23_OUT, |
| 5089 | GP_5_22_IN, GP_5_22_OUT, |
| 5090 | GP_5_21_IN, GP_5_21_OUT, |
| 5091 | GP_5_20_IN, GP_5_20_OUT, |
| 5092 | GP_5_19_IN, GP_5_19_OUT, |
| 5093 | GP_5_18_IN, GP_5_18_OUT, |
| 5094 | GP_5_17_IN, GP_5_17_OUT, |
| 5095 | GP_5_16_IN, GP_5_16_OUT, |
| 5096 | |
| 5097 | GP_5_15_IN, GP_5_15_OUT, |
| 5098 | GP_5_14_IN, GP_5_14_OUT, |
| 5099 | GP_5_13_IN, GP_5_13_OUT, |
| 5100 | GP_5_12_IN, GP_5_12_OUT, |
| 5101 | GP_5_11_IN, GP_5_11_OUT, |
| 5102 | GP_5_10_IN, GP_5_10_OUT, |
| 5103 | GP_5_9_IN, GP_5_9_OUT, |
| 5104 | GP_5_8_IN, GP_5_8_OUT, |
| 5105 | GP_5_7_IN, GP_5_7_OUT, |
| 5106 | GP_5_6_IN, GP_5_6_OUT, |
| 5107 | GP_5_5_IN, GP_5_5_OUT, |
| 5108 | GP_5_4_IN, GP_5_4_OUT, |
| 5109 | GP_5_3_IN, GP_5_3_OUT, |
| 5110 | GP_5_2_IN, GP_5_2_OUT, |
| 5111 | GP_5_1_IN, GP_5_1_OUT, |
| 5112 | GP_5_0_IN, GP_5_0_OUT, |
| 5113 | } |
| 5114 | }, |
| 5115 | { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) { |
| 5116 | GP_INOUTSEL(6) |
| 5117 | } |
| 5118 | }, |
| 5119 | { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) { |
| 5120 | 0, 0, |
| 5121 | 0, 0, |
| 5122 | 0, 0, |
| 5123 | 0, 0, |
| 5124 | 0, 0, |
| 5125 | 0, 0, |
| 5126 | 0, 0, |
| 5127 | 0, 0, |
| 5128 | |
| 5129 | 0, 0, |
| 5130 | 0, 0, |
| 5131 | 0, 0, |
| 5132 | 0, 0, |
| 5133 | 0, 0, |
| 5134 | 0, 0, |
| 5135 | 0, 0, |
| 5136 | 0, 0, |
| 5137 | |
| 5138 | 0, 0, |
| 5139 | 0, 0, |
| 5140 | 0, 0, |
| 5141 | 0, 0, |
| 5142 | 0, 0, |
| 5143 | 0, 0, |
| 5144 | 0, 0, |
| 5145 | 0, 0, |
| 5146 | |
| 5147 | 0, 0, |
| 5148 | 0, 0, |
| 5149 | 0, 0, |
| 5150 | 0, 0, |
| 5151 | GP_6_3_IN, GP_6_3_OUT, |
| 5152 | GP_6_2_IN, GP_6_2_OUT, |
| 5153 | GP_6_1_IN, GP_6_1_OUT, |
| 5154 | GP_6_0_IN, GP_6_0_OUT, |
| 5155 | } |
| 5156 | }, |
| 5157 | { }, |
| 5158 | }; |
| 5159 | |
| 5160 | static struct pinmux_data_reg pinmux_data_regs[] = { |
| 5161 | /* use OUTDT registers? */ |
| 5162 | { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { |
| 5163 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5164 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5165 | GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA, |
| 5166 | GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA, |
| 5167 | GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA, |
| 5168 | GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA } |
| 5169 | }, |
| 5170 | { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) { |
| 5171 | 0, 0, 0, GP_1_28_DATA, |
| 5172 | GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA, |
| 5173 | GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA, |
| 5174 | GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA, |
| 5175 | GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA, |
| 5176 | GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA, |
| 5177 | GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA, |
| 5178 | GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA } |
| 5179 | }, |
| 5180 | { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { |
| 5181 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5182 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5183 | 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA, |
| 5184 | GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA, |
| 5185 | GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA, |
| 5186 | GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA } |
| 5187 | }, |
| 5188 | { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { |
| 5189 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5190 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5191 | GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA, |
| 5192 | GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA, |
| 5193 | GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA, |
| 5194 | GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA } |
| 5195 | }, |
| 5196 | { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { |
| 5197 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5198 | 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA, |
| 5199 | GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA, |
| 5200 | GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA, |
| 5201 | GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA, |
| 5202 | GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA } |
| 5203 | }, |
| 5204 | { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { |
| 5205 | 0, 0, 0, 0, |
| 5206 | 0, 0, GP_5_25_DATA, GP_5_24_DATA, |
| 5207 | GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA, |
| 5208 | GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA, |
| 5209 | GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA, |
| 5210 | GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA, |
| 5211 | GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA, |
| 5212 | GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA } |
| 5213 | }, |
| 5214 | { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) { |
| 5215 | GP_INDT(6) } |
| 5216 | }, |
| 5217 | { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) { |
| 5218 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5219 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5220 | 0, 0, 0, 0, 0, 0, 0, 0, |
| 5221 | 0, 0, 0, 0, |
| 5222 | GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA } |
| 5223 | }, |
| 5224 | { }, |
| 5225 | }; |
| 5226 | |
| 5227 | static struct pinmux_info r8a7796_pinmux_info = { |
| 5228 | .name = "r8a7796_pfc", |
| 5229 | |
| 5230 | .unlock_reg = 0xe6060000, /* PMMR */ |
| 5231 | |
| 5232 | .reserved_id = PINMUX_RESERVED, |
| 5233 | .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, |
| 5234 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, |
| 5235 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, |
| 5236 | .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, |
| 5237 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, |
| 5238 | |
| 5239 | .first_gpio = GPIO_GP_0_0, |
| 5240 | .last_gpio = GPIO_FN_FMIN_D, |
| 5241 | |
| 5242 | .gpios = pinmux_gpios, |
| 5243 | .cfg_regs = pinmux_config_regs, |
| 5244 | .data_regs = pinmux_data_regs, |
| 5245 | |
| 5246 | .gpio_data = pinmux_data, |
| 5247 | .gpio_data_size = ARRAY_SIZE(pinmux_data), |
| 5248 | }; |
| 5249 | |
| 5250 | void r8a7796_pinmux_init(void) |
| 5251 | { |
| 5252 | register_pinmux(&r8a7796_pinmux_info); |
| 5253 | } |