blob: 5fd80217deb69eb95139f14119a0d8d1795515d0 [file] [log] [blame]
Heiko Stübnere1de6112017-03-26 21:09:55 +02001CONFIG_ARM=y
2# CONFIG_SPL_USE_ARCH_MEMCPY is not set
3# CONFIG_SPL_USE_ARCH_MEMSET is not set
4CONFIG_ARCH_ROCKCHIP=y
5CONFIG_SYS_MALLOC_F_LEN=0x2000
6CONFIG_ROCKCHIP_RK3188=y
Philipp Tomsich798370f2017-06-29 11:21:15 +02007CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
Philipp Tomsichfefc4ec2017-08-03 22:52:04 +02008CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
Heiko Stübnere1de6112017-03-26 21:09:55 +02009CONFIG_TARGET_ROCK=y
10CONFIG_SPL_STACK_R_ADDR=0x60080000
11CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock"
Tom Rini256aa742017-06-19 09:47:40 -040012CONFIG_DEBUG_UART=y
Simon Glass73c18b42017-07-23 21:19:39 -060013CONFIG_ENV_IS_IN_MMC=y
Heiko Stübnere1de6112017-03-26 21:09:55 +020014# CONFIG_DISPLAY_CPUINFO is not set
15CONFIG_SPL_STACK_R=y
16CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
17# CONFIG_CMD_IMLS is not set
Tom Rini78873cd2017-08-14 19:58:53 -040018CONFIG_CMD_I2C=y
Heiko Stübnere1de6112017-03-26 21:09:55 +020019CONFIG_CMD_MMC=y
20CONFIG_CMD_SF=y
21CONFIG_CMD_SPI=y
Heiko Stübnere1de6112017-03-26 21:09:55 +020022# CONFIG_CMD_SETEXPR is not set
23CONFIG_CMD_CACHE=y
24CONFIG_CMD_TIME=y
25CONFIG_CMD_REGULATOR=y
26CONFIG_SPL_OF_CONTROL=y
27CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
28CONFIG_SPL_OF_PLATDATA=y
29CONFIG_REGMAP=y
30CONFIG_SYSCON=y
31# CONFIG_SPL_SIMPLE_BUS is not set
32CONFIG_CLK=y
33CONFIG_ROCKCHIP_GPIO=y
34CONFIG_SYS_I2C_ROCKCHIP=y
35CONFIG_LED=y
36CONFIG_MMC_DW=y
37CONFIG_MMC_DW_ROCKCHIP=y
38CONFIG_PINCTRL=y
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +020039CONFIG_PINCTRL_ROCKCHIP_RK3188=y
Heiko Stübnere1de6112017-03-26 21:09:55 +020040CONFIG_DM_PMIC=y
41# CONFIG_SPL_PMIC_CHILDREN is not set
42CONFIG_PMIC_ACT8846=y
43CONFIG_REGULATOR_ACT8846=y
44CONFIG_DM_REGULATOR_FIXED=y
45CONFIG_RAM=y
Alexandru Gagniucb1ab1892017-03-27 12:54:19 -070046# CONFIG_TPL_DM_SERIAL is not set
Heiko Stübnere1de6112017-03-26 21:09:55 +020047CONFIG_DEBUG_UART_BASE=0x20064000
48CONFIG_DEBUG_UART_CLOCK=24000000
49CONFIG_DEBUG_UART_SHIFT=2
50CONFIG_SYS_NS16550=y
51CONFIG_SYSRESET=y
52CONFIG_SPL_TINY_MEMSET=y
Philipp Tomsichfefc4ec2017-08-03 22:52:04 +020053CONFIG_TPL_TINY_MEMSET=y
Heiko Stübnere1de6112017-03-26 21:09:55 +020054CONFIG_CMD_DHRYSTONE=y
55CONFIG_ERRNO_STR=y