| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Configuration file for the SAMA5D27 SOM1 EK Board. |
| 4 | * |
| 5 | * Copyright (C) 2017 Microchip Corporation |
| 6 | * Wenyou Yang <wenyou.yang@microchip.com> |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_H |
| 10 | #define __CONFIG_H |
| 11 | |
| 12 | #include "at91-sama5_common.h" |
| 13 | |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 14 | #undef CONFIG_SYS_AT91_MAIN_CLOCK |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 15 | #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ |
| 16 | |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 17 | #ifdef CONFIG_SPL_BUILD |
| 18 | #define CONFIG_SYS_INIT_SP_ADDR 0x218000 |
| 19 | #else |
| 20 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| Clément Léger | c58913b | 2021-08-16 14:25:40 +0200 | [diff] [blame] | 21 | (0x22000000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 22 | #endif |
| 23 | |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 24 | /* SPL */ |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 25 | #define CONFIG_SPL_MAX_SIZE 0x10000 |
| 26 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
| 27 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 |
| 28 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 |
| 29 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 |
| 30 | |
| 31 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
| 32 | |
| 33 | #ifdef CONFIG_SD_BOOT |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 34 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
| 35 | #endif |
| 36 | |
| Wenyou Yang | eebb073 | 2017-09-13 14:58:54 +0800 | [diff] [blame] | 37 | #endif |