Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 2 | /* |
| 3 | * Board functions for Compulab CM-FX6 board |
| 4 | * |
| 5 | * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ |
| 6 | * |
| 7 | * Author: Nikita Kiryanov <nikita@compulab.co.il> |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <common.h> |
Simon Glass | bf8950e | 2017-07-29 11:35:25 -0600 | [diff] [blame] | 11 | #include <ahci.h> |
Simon Glass | c0d07c2 | 2014-10-01 19:57:28 -0600 | [diff] [blame] | 12 | #include <dm.h> |
Simon Glass | bf8950e | 2017-07-29 11:35:25 -0600 | [diff] [blame] | 13 | #include <dwc_ahsata.h> |
Simon Glass | 5e6201b | 2019-08-01 09:46:51 -0600 | [diff] [blame] | 14 | #include <env.h> |
Yangbo Lu | 7334038 | 2019-06-21 11:42:28 +0800 | [diff] [blame] | 15 | #include <fsl_esdhc_imx.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 16 | #include <init.h> |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 17 | #include <miiphy.h> |
Christopher Spinrath | d706b57 | 2016-07-12 23:37:36 +0200 | [diff] [blame] | 18 | #include <mtd_node.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 19 | #include <net.h> |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 20 | #include <netdev.h> |
Nikita Kiryanov | 9b1bc39 | 2015-07-23 17:19:29 +0300 | [diff] [blame] | 21 | #include <errno.h> |
Nikita Kiryanov | 7eeccf4 | 2015-08-30 15:36:47 +0300 | [diff] [blame] | 22 | #include <usb.h> |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 23 | #include <fdt_support.h> |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 24 | #include <sata.h> |
Nikita Kiryanov | 7f9ceea | 2015-01-14 10:42:54 +0200 | [diff] [blame] | 25 | #include <splash.h> |
Nikita Kiryanov | 59d0609 | 2014-08-20 15:09:01 +0300 | [diff] [blame] | 26 | #include <asm/arch/crm_regs.h> |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 27 | #include <asm/arch/sys_proto.h> |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 28 | #include <asm/arch/iomux.h> |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 29 | #include <asm/arch/mxc_hdmi.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame^] | 30 | #include <asm/global_data.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 31 | #include <asm/mach-imx/mxc_i2c.h> |
| 32 | #include <asm/mach-imx/sata.h> |
| 33 | #include <asm/mach-imx/video.h> |
Nikita Kiryanov | 59d0609 | 2014-08-20 15:09:01 +0300 | [diff] [blame] | 34 | #include <asm/io.h> |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 35 | #include <asm/gpio.h> |
Masahiro Yamada | 22c97de | 2014-10-24 12:41:19 +0900 | [diff] [blame] | 36 | #include <dm/platform_data/serial_mxc.h> |
Simon Glass | bf8950e | 2017-07-29 11:35:25 -0600 | [diff] [blame] | 37 | #include <dm/device-internal.h> |
Christopher Spinrath | d706b57 | 2016-07-12 23:37:36 +0200 | [diff] [blame] | 38 | #include <jffs2/load_kernel.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 39 | #include <linux/delay.h> |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 40 | #include "common.h" |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 41 | #include "../common/eeprom.h" |
Nikita Kiryanov | 12ffcf4 | 2015-01-14 10:42:53 +0200 | [diff] [blame] | 42 | #include "../common/common.h" |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 43 | |
| 44 | DECLARE_GLOBAL_DATA_PTR; |
| 45 | |
Nikita Kiryanov | 12ffcf4 | 2015-01-14 10:42:53 +0200 | [diff] [blame] | 46 | #ifdef CONFIG_SPLASH_SCREEN |
| 47 | static struct splash_location cm_fx6_splash_locations[] = { |
| 48 | { |
| 49 | .name = "sf", |
| 50 | .storage = SPLASH_STORAGE_SF, |
Nikita Kiryanov | 7428271 | 2015-10-29 11:54:41 +0200 | [diff] [blame] | 51 | .flags = SPLASH_STORAGE_RAW, |
Nikita Kiryanov | 12ffcf4 | 2015-01-14 10:42:53 +0200 | [diff] [blame] | 52 | .offset = 0x100000, |
| 53 | }, |
Nikita Kiryanov | b9035ad | 2015-10-29 11:54:44 +0200 | [diff] [blame] | 54 | { |
| 55 | .name = "mmc_fs", |
| 56 | .storage = SPLASH_STORAGE_MMC, |
| 57 | .flags = SPLASH_STORAGE_FS, |
| 58 | .devpart = "2:1", |
| 59 | }, |
| 60 | { |
| 61 | .name = "usb_fs", |
| 62 | .storage = SPLASH_STORAGE_USB, |
| 63 | .flags = SPLASH_STORAGE_FS, |
| 64 | .devpart = "0:1", |
| 65 | }, |
| 66 | { |
| 67 | .name = "sata_fs", |
| 68 | .storage = SPLASH_STORAGE_SATA, |
| 69 | .flags = SPLASH_STORAGE_FS, |
| 70 | .devpart = "0:1", |
| 71 | }, |
Nikita Kiryanov | 12ffcf4 | 2015-01-14 10:42:53 +0200 | [diff] [blame] | 72 | }; |
| 73 | |
| 74 | int splash_screen_prepare(void) |
| 75 | { |
Nikita Kiryanov | 7f9ceea | 2015-01-14 10:42:54 +0200 | [diff] [blame] | 76 | return splash_source_load(cm_fx6_splash_locations, |
| 77 | ARRAY_SIZE(cm_fx6_splash_locations)); |
Nikita Kiryanov | 12ffcf4 | 2015-01-14 10:42:53 +0200 | [diff] [blame] | 78 | } |
| 79 | #endif |
| 80 | |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 81 | #ifdef CONFIG_IMX_HDMI |
| 82 | static void cm_fx6_enable_hdmi(struct display_info_t const *dev) |
| 83 | { |
Nikita Kiryanov | a0f47eb | 2015-07-23 17:19:31 +0300 | [diff] [blame] | 84 | struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; |
| 85 | imx_setup_hdmi(); |
| 86 | setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK); |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 87 | imx_enable_hdmi_phy(); |
| 88 | } |
| 89 | |
Nikita Kiryanov | 9b1bc39 | 2015-07-23 17:19:29 +0300 | [diff] [blame] | 90 | static struct display_info_t preset_hdmi_1024X768 = { |
| 91 | .bus = -1, |
| 92 | .addr = 0, |
| 93 | .pixfmt = IPU_PIX_FMT_RGB24, |
| 94 | .enable = cm_fx6_enable_hdmi, |
| 95 | .mode = { |
| 96 | .name = "HDMI", |
| 97 | .refresh = 60, |
| 98 | .xres = 1024, |
| 99 | .yres = 768, |
| 100 | .pixclock = 40385, |
| 101 | .left_margin = 220, |
| 102 | .right_margin = 40, |
| 103 | .upper_margin = 21, |
| 104 | .lower_margin = 7, |
| 105 | .hsync_len = 60, |
| 106 | .vsync_len = 10, |
| 107 | .sync = FB_SYNC_EXT, |
| 108 | .vmode = FB_VMODE_NONINTERLACED, |
| 109 | } |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 110 | }; |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 111 | |
| 112 | static void cm_fx6_setup_display(void) |
| 113 | { |
Nikita Kiryanov | 2d61809 | 2015-07-23 17:19:28 +0300 | [diff] [blame] | 114 | struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 115 | |
| 116 | enable_ipu_clock(); |
Nikita Kiryanov | 2d61809 | 2015-07-23 17:19:28 +0300 | [diff] [blame] | 117 | clrbits_le32(&iomuxc_regs->gpr[3], MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK); |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 118 | } |
Nikita Kiryanov | 9b1bc39 | 2015-07-23 17:19:29 +0300 | [diff] [blame] | 119 | |
| 120 | int board_video_skip(void) |
| 121 | { |
| 122 | int ret; |
| 123 | struct display_info_t *preset; |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 124 | char const *panel = env_get("displaytype"); |
Nikita Kiryanov | ba182c7 | 2015-07-23 17:19:30 +0300 | [diff] [blame] | 125 | |
| 126 | if (!panel) /* Also accept panel for backward compatibility */ |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 127 | panel = env_get("panel"); |
Nikita Kiryanov | 9b1bc39 | 2015-07-23 17:19:29 +0300 | [diff] [blame] | 128 | |
| 129 | if (!panel) |
| 130 | return -ENOENT; |
| 131 | |
| 132 | if (!strcmp(panel, "HDMI")) |
| 133 | preset = &preset_hdmi_1024X768; |
| 134 | else |
| 135 | return -EINVAL; |
| 136 | |
| 137 | ret = ipuv3_fb_init(&preset->mode, 0, preset->pixfmt); |
| 138 | if (ret) { |
| 139 | printf("Can't init display %s: %d\n", preset->mode.name, ret); |
| 140 | return ret; |
| 141 | } |
| 142 | |
| 143 | preset->enable(preset); |
| 144 | printf("Display: %s (%ux%u)\n", preset->mode.name, preset->mode.xres, |
| 145 | preset->mode.yres); |
| 146 | |
| 147 | return 0; |
| 148 | } |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 149 | #else |
| 150 | static inline void cm_fx6_setup_display(void) {} |
| 151 | #endif /* CONFIG_VIDEO_IPUV3 */ |
| 152 | |
Suniel Mahesh | 1610285 | 2019-11-20 15:25:00 +0530 | [diff] [blame] | 153 | int ipu_displays_init(void) |
| 154 | { |
| 155 | return board_video_skip(); |
| 156 | } |
| 157 | |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 158 | #ifdef CONFIG_DWC_AHSATA |
| 159 | static int cm_fx6_issd_gpios[] = { |
| 160 | /* The order of the GPIOs in the array is important! */ |
Nikita Kiryanov | 97d5daf | 2014-10-29 17:56:21 +0200 | [diff] [blame] | 161 | CM_FX6_SATA_LDO_EN, |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 162 | CM_FX6_SATA_PHY_SLP, |
| 163 | CM_FX6_SATA_NRSTDLY, |
| 164 | CM_FX6_SATA_PWREN, |
| 165 | CM_FX6_SATA_NSTANDBY1, |
| 166 | CM_FX6_SATA_NSTANDBY2, |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 167 | }; |
| 168 | |
| 169 | static void cm_fx6_sata_power(int on) |
| 170 | { |
| 171 | int i; |
| 172 | |
| 173 | if (!on) { /* tell the iSSD that the power will be removed */ |
| 174 | gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 1); |
| 175 | mdelay(10); |
| 176 | } |
| 177 | |
| 178 | for (i = 0; i < ARRAY_SIZE(cm_fx6_issd_gpios); i++) { |
| 179 | gpio_direction_output(cm_fx6_issd_gpios[i], on); |
| 180 | udelay(100); |
| 181 | } |
| 182 | |
| 183 | if (!on) /* for compatibility lower the power loss interrupt */ |
| 184 | gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0); |
| 185 | } |
| 186 | |
| 187 | static iomux_v3_cfg_t const sata_pads[] = { |
| 188 | /* SATA PWR */ |
| 189 | IOMUX_PADS(PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 190 | IOMUX_PADS(PAD_EIM_A22__GPIO2_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 191 | IOMUX_PADS(PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 192 | IOMUX_PADS(PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 193 | /* SATA CTRL */ |
| 194 | IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 195 | IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 196 | IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 197 | IOMUX_PADS(PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 198 | IOMUX_PADS(PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 199 | }; |
| 200 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 201 | static int cm_fx6_setup_issd(void) |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 202 | { |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 203 | int ret, i; |
| 204 | |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 205 | SETUP_IOMUX_PADS(sata_pads); |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 206 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 207 | for (i = 0; i < ARRAY_SIZE(cm_fx6_issd_gpios); i++) { |
| 208 | ret = gpio_request(cm_fx6_issd_gpios[i], "sata"); |
| 209 | if (ret) |
| 210 | return ret; |
| 211 | } |
| 212 | |
| 213 | ret = gpio_request(CM_FX6_SATA_PWLOSS_INT, "sata_pwloss_int"); |
| 214 | if (ret) |
| 215 | return ret; |
| 216 | |
| 217 | return 0; |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | #define CM_FX6_SATA_INIT_RETRIES 10 |
Simon Glass | bf8950e | 2017-07-29 11:35:25 -0600 | [diff] [blame] | 221 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 222 | #else |
| 223 | static int cm_fx6_setup_issd(void) { return 0; } |
Nikita Kiryanov | 2fe0b7b | 2014-08-20 15:09:06 +0300 | [diff] [blame] | 224 | #endif |
| 225 | |
Nikita Kiryanov | 675a1d9 | 2014-08-20 15:09:04 +0300 | [diff] [blame] | 226 | #ifdef CONFIG_SYS_I2C_MXC |
| 227 | #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 228 | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ |
| 229 | PAD_CTL_ODE | PAD_CTL_SRE_FAST) |
| 230 | |
| 231 | I2C_PADS(i2c0_pads, |
| 232 | PAD_EIM_D21__I2C1_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 233 | PAD_EIM_D21__GPIO3_IO21 | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 234 | IMX_GPIO_NR(3, 21), |
| 235 | PAD_EIM_D28__I2C1_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 236 | PAD_EIM_D28__GPIO3_IO28 | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 237 | IMX_GPIO_NR(3, 28)); |
| 238 | |
| 239 | I2C_PADS(i2c1_pads, |
| 240 | PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 241 | PAD_KEY_COL3__GPIO4_IO12 | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 242 | IMX_GPIO_NR(4, 12), |
| 243 | PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 244 | PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 245 | IMX_GPIO_NR(4, 13)); |
| 246 | |
| 247 | I2C_PADS(i2c2_pads, |
| 248 | PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 249 | PAD_GPIO_3__GPIO1_IO03 | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 250 | IMX_GPIO_NR(1, 3), |
| 251 | PAD_GPIO_6__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 252 | PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(I2C_PAD_CTRL), |
| 253 | IMX_GPIO_NR(1, 6)); |
| 254 | |
| 255 | |
Simon Glass | 8d91436 | 2014-10-01 19:57:24 -0600 | [diff] [blame] | 256 | static int cm_fx6_setup_one_i2c(int busnum, struct i2c_pads_info *pads) |
Nikita Kiryanov | 675a1d9 | 2014-08-20 15:09:04 +0300 | [diff] [blame] | 257 | { |
Simon Glass | 8d91436 | 2014-10-01 19:57:24 -0600 | [diff] [blame] | 258 | int ret; |
| 259 | |
| 260 | ret = setup_i2c(busnum, CONFIG_SYS_I2C_SPEED, 0x7f, pads); |
| 261 | if (ret) |
| 262 | printf("Warning: I2C%d setup failed: %d\n", busnum, ret); |
| 263 | |
| 264 | return ret; |
| 265 | } |
| 266 | |
| 267 | static int cm_fx6_setup_i2c(void) |
| 268 | { |
| 269 | int ret = 0, err; |
| 270 | |
| 271 | /* i2c<x>_pads are wierd macro variables; we can't use an array */ |
| 272 | err = cm_fx6_setup_one_i2c(0, I2C_PADS_INFO(i2c0_pads)); |
| 273 | if (err) |
| 274 | ret = err; |
| 275 | err = cm_fx6_setup_one_i2c(1, I2C_PADS_INFO(i2c1_pads)); |
| 276 | if (err) |
| 277 | ret = err; |
| 278 | err = cm_fx6_setup_one_i2c(2, I2C_PADS_INFO(i2c2_pads)); |
| 279 | if (err) |
| 280 | ret = err; |
| 281 | |
| 282 | return ret; |
Nikita Kiryanov | 675a1d9 | 2014-08-20 15:09:04 +0300 | [diff] [blame] | 283 | } |
| 284 | #else |
Simon Glass | 8d91436 | 2014-10-01 19:57:24 -0600 | [diff] [blame] | 285 | static int cm_fx6_setup_i2c(void) { return 0; } |
Nikita Kiryanov | 675a1d9 | 2014-08-20 15:09:04 +0300 | [diff] [blame] | 286 | #endif |
| 287 | |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 288 | #ifdef CONFIG_USB_EHCI_MX6 |
| 289 | #define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ |
| 290 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ |
| 291 | PAD_CTL_HYS | PAD_CTL_SRE_SLOW) |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 292 | #define MX6_USBNC_BASEADDR 0x2184800 |
| 293 | #define USBNC_USB_H1_PWR_POL (1 << 9) |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 294 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 295 | static int cm_fx6_setup_usb_host(void) |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 296 | { |
| 297 | int err; |
| 298 | |
| 299 | err = gpio_request(CM_FX6_USB_HUB_RST, "usb hub rst"); |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 300 | if (err) |
| 301 | return err; |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 302 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 303 | SETUP_IOMUX_PAD(PAD_GPIO_0__USB_H1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)); |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 304 | SETUP_IOMUX_PAD(PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL)); |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 305 | |
| 306 | return 0; |
| 307 | } |
| 308 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 309 | static int cm_fx6_setup_usb_otg(void) |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 310 | { |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 311 | int err; |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 312 | struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; |
| 313 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 314 | err = gpio_request(SB_FX6_USB_OTG_PWR, "usb-pwr"); |
| 315 | if (err) { |
| 316 | printf("USB OTG pwr gpio request failed: %d\n", err); |
| 317 | return err; |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 318 | } |
| 319 | |
| 320 | SETUP_IOMUX_PAD(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL)); |
| 321 | SETUP_IOMUX_PAD(PAD_ENET_RX_ER__USB_OTG_ID | |
| 322 | MUX_PAD_CTRL(WEAK_PULLDOWN)); |
| 323 | clrbits_le32(&iomux->gpr[1], IOMUXC_GPR1_OTG_ID_MASK); |
| 324 | /* disable ext. charger detect, or it'll affect signal quality at dp. */ |
| 325 | return gpio_direction_output(SB_FX6_USB_OTG_PWR, 0); |
| 326 | } |
| 327 | |
Nikita Kiryanov | 7eeccf4 | 2015-08-30 15:36:47 +0300 | [diff] [blame] | 328 | int board_usb_phy_mode(int port) |
| 329 | { |
| 330 | return USB_INIT_HOST; |
| 331 | } |
| 332 | |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 333 | int board_ehci_hcd_init(int port) |
| 334 | { |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 335 | int ret; |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 336 | u32 *usbnc_usb_uh1_ctrl = (u32 *)(MX6_USBNC_BASEADDR + 4); |
| 337 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 338 | /* Only 1 host controller in use. port 0 is OTG & needs no attention */ |
| 339 | if (port != 1) |
| 340 | return 0; |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 341 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 342 | /* Set PWR polarity to match power switch's enable polarity */ |
| 343 | setbits_le32(usbnc_usb_uh1_ctrl, USBNC_USB_H1_PWR_POL); |
| 344 | ret = gpio_direction_output(CM_FX6_USB_HUB_RST, 0); |
| 345 | if (ret) |
| 346 | return ret; |
| 347 | |
| 348 | udelay(10); |
| 349 | ret = gpio_direction_output(CM_FX6_USB_HUB_RST, 1); |
| 350 | if (ret) |
| 351 | return ret; |
| 352 | |
| 353 | mdelay(1); |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 354 | |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | int board_ehci_power(int port, int on) |
| 359 | { |
| 360 | if (port == 0) |
| 361 | return gpio_direction_output(SB_FX6_USB_OTG_PWR, on); |
| 362 | |
| 363 | return 0; |
| 364 | } |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 365 | #else |
| 366 | static int cm_fx6_setup_usb_otg(void) { return 0; } |
| 367 | static int cm_fx6_setup_usb_host(void) { return 0; } |
Nikita Kiryanov | a2f2f3c | 2014-08-20 15:09:03 +0300 | [diff] [blame] | 368 | #endif |
| 369 | |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 370 | #ifdef CONFIG_FEC_MXC |
| 371 | #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
| 372 | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
| 373 | |
| 374 | static int mx6_rgmii_rework(struct phy_device *phydev) |
| 375 | { |
| 376 | unsigned short val; |
| 377 | |
| 378 | /* Ar8031 phy SmartEEE feature cause link status generates glitch, |
| 379 | * which cause ethernet link down/up issue, so disable SmartEEE |
| 380 | */ |
| 381 | phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3); |
| 382 | phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); |
| 383 | phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); |
| 384 | val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); |
| 385 | val &= ~(0x1 << 8); |
| 386 | phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); |
| 387 | |
| 388 | /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ |
| 389 | phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); |
| 390 | phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); |
| 391 | phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); |
| 392 | |
| 393 | val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); |
| 394 | val &= 0xffe3; |
| 395 | val |= 0x18; |
| 396 | phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); |
| 397 | |
| 398 | /* introduce tx clock delay */ |
| 399 | phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); |
| 400 | val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); |
| 401 | val |= 0x0100; |
| 402 | phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); |
| 403 | |
| 404 | return 0; |
| 405 | } |
| 406 | |
| 407 | int board_phy_config(struct phy_device *phydev) |
| 408 | { |
| 409 | mx6_rgmii_rework(phydev); |
| 410 | |
| 411 | if (phydev->drv->config) |
| 412 | return phydev->drv->config(phydev); |
| 413 | |
| 414 | return 0; |
| 415 | } |
| 416 | |
| 417 | static iomux_v3_cfg_t const enet_pads[] = { |
| 418 | IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 419 | IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 420 | IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 421 | IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 422 | IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 423 | IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 424 | IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 425 | IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 426 | IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 427 | IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 428 | IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 429 | IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 430 | IOMUX_PADS(PAD_GPIO_0__CCM_CLKO1 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 431 | IOMUX_PADS(PAD_GPIO_3__CCM_CLKO2 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 432 | IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(0x84)), |
| 433 | IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | |
| 434 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 435 | IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | |
| 436 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 437 | IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | |
| 438 | MUX_PAD_CTRL(ENET_PAD_CTRL)), |
| 439 | }; |
| 440 | |
Nikita Kiryanov | 2c4c922 | 2015-01-14 10:42:44 +0200 | [diff] [blame] | 441 | static int handle_mac_address(char *env_var, uint eeprom_bus) |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 442 | { |
| 443 | unsigned char enetaddr[6]; |
| 444 | int rc; |
| 445 | |
Simon Glass | 399a9ce | 2017-08-03 12:22:14 -0600 | [diff] [blame] | 446 | rc = eth_env_get_enetaddr(env_var, enetaddr); |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 447 | if (rc) |
| 448 | return 0; |
| 449 | |
Nikita Kiryanov | 2c4c922 | 2015-01-14 10:42:44 +0200 | [diff] [blame] | 450 | rc = cl_eeprom_read_mac_addr(enetaddr, eeprom_bus); |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 451 | if (rc) |
| 452 | return rc; |
| 453 | |
Joe Hershberger | 8ecdbed | 2015-04-08 01:41:04 -0500 | [diff] [blame] | 454 | if (!is_valid_ethaddr(enetaddr)) |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 455 | return -1; |
| 456 | |
Simon Glass | 8551d55 | 2017-08-03 12:22:11 -0600 | [diff] [blame] | 457 | return eth_env_set_enetaddr(env_var, enetaddr); |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 458 | } |
| 459 | |
Nikita Kiryanov | 2c4c922 | 2015-01-14 10:42:44 +0200 | [diff] [blame] | 460 | #define SB_FX6_I2C_EEPROM_BUS 0 |
| 461 | #define NO_MAC_ADDR "No MAC address found for %s\n" |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 462 | int board_eth_init(struct bd_info *bis) |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 463 | { |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 464 | int err; |
| 465 | |
Nikita Kiryanov | 2c4c922 | 2015-01-14 10:42:44 +0200 | [diff] [blame] | 466 | if (handle_mac_address("ethaddr", CONFIG_SYS_I2C_EEPROM_BUS)) |
| 467 | printf(NO_MAC_ADDR, "primary NIC"); |
| 468 | |
| 469 | if (handle_mac_address("eth1addr", SB_FX6_I2C_EEPROM_BUS)) |
| 470 | printf(NO_MAC_ADDR, "secondary NIC"); |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 471 | |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 472 | SETUP_IOMUX_PADS(enet_pads); |
| 473 | /* phy reset */ |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 474 | err = gpio_request(CM_FX6_ENET_NRST, "enet_nrst"); |
| 475 | if (err) |
| 476 | printf("Etnernet NRST gpio request failed: %d\n", err); |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 477 | gpio_direction_output(CM_FX6_ENET_NRST, 0); |
| 478 | udelay(500); |
| 479 | gpio_set_value(CM_FX6_ENET_NRST, 1); |
| 480 | enable_enet_clk(1); |
| 481 | return cpu_eth_init(bis); |
| 482 | } |
| 483 | #endif |
| 484 | |
Nikita Kiryanov | 59d0609 | 2014-08-20 15:09:01 +0300 | [diff] [blame] | 485 | #ifdef CONFIG_NAND_MXS |
| 486 | static iomux_v3_cfg_t const nand_pads[] = { |
| 487 | IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 488 | IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 489 | IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 490 | IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 491 | IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 492 | IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 493 | IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 494 | IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 495 | IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 496 | IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 497 | IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 498 | IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 499 | IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 500 | IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 501 | }; |
| 502 | |
| 503 | static void cm_fx6_setup_gpmi_nand(void) |
| 504 | { |
| 505 | SETUP_IOMUX_PADS(nand_pads); |
| 506 | /* Enable clock roots */ |
| 507 | enable_usdhc_clk(1, 3); |
| 508 | enable_usdhc_clk(1, 4); |
| 509 | |
| 510 | setup_gpmi_io_clk(MXC_CCM_CS2CDR_ENFC_CLK_PODF(0xf) | |
| 511 | MXC_CCM_CS2CDR_ENFC_CLK_PRED(1) | |
| 512 | MXC_CCM_CS2CDR_ENFC_CLK_SEL(0)); |
| 513 | } |
| 514 | #else |
| 515 | static void cm_fx6_setup_gpmi_nand(void) {} |
| 516 | #endif |
| 517 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 518 | #ifdef CONFIG_MXC_SPI |
| 519 | int cm_fx6_setup_ecspi(void) |
| 520 | { |
| 521 | cm_fx6_set_ecspi_iomux(); |
| 522 | return gpio_request(CM_FX6_ECSPI_BUS0_CS0, "ecspi_bus0_cs0"); |
| 523 | } |
| 524 | #else |
| 525 | int cm_fx6_setup_ecspi(void) { return 0; } |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 526 | #endif |
| 527 | |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 528 | #ifdef CONFIG_OF_BOARD_SETUP |
Nikita Kiryanov | 0a9c1b8 | 2015-09-06 11:48:38 +0300 | [diff] [blame] | 529 | #define USDHC3_PATH "/soc/aips-bus@02100000/usdhc@02198000/" |
Christopher Spinrath | d706b57 | 2016-07-12 23:37:36 +0200 | [diff] [blame] | 530 | |
Masahiro Yamada | 20ead6f | 2018-07-19 16:28:23 +0900 | [diff] [blame] | 531 | static const struct node_info nodes[] = { |
Christopher Spinrath | d706b57 | 2016-07-12 23:37:36 +0200 | [diff] [blame] | 532 | /* |
| 533 | * Both entries target the same flash chip. The st,m25p compatible |
| 534 | * is used in the vendor device trees, while upstream uses (the |
Christopher Spinrath | 2e15832 | 2016-08-23 16:08:52 +0200 | [diff] [blame] | 535 | * documented) jedec,spi-nor compatible. |
Christopher Spinrath | d706b57 | 2016-07-12 23:37:36 +0200 | [diff] [blame] | 536 | */ |
| 537 | { "st,m25p", MTD_DEV_TYPE_NOR, }, |
| 538 | { "jedec,spi-nor", MTD_DEV_TYPE_NOR, }, |
| 539 | }; |
| 540 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 541 | int ft_board_setup(void *blob, struct bd_info *bd) |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 542 | { |
Nikita Kiryanov | 0a9c1b8 | 2015-09-06 11:48:38 +0300 | [diff] [blame] | 543 | u32 baseboard_rev; |
| 544 | int nodeoffset; |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 545 | uint8_t enetaddr[6]; |
Nikita Kiryanov | 0a9c1b8 | 2015-09-06 11:48:38 +0300 | [diff] [blame] | 546 | char baseboard_name[16]; |
| 547 | int err; |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 548 | |
Hannes Schmelzer | d3dbac8 | 2016-09-20 18:10:43 +0200 | [diff] [blame] | 549 | fdt_shrink_to_minimum(blob, 0); /* Make room for new properties */ |
Christopher Spinrath | d706b57 | 2016-07-12 23:37:36 +0200 | [diff] [blame] | 550 | |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 551 | /* MAC addr */ |
Simon Glass | 399a9ce | 2017-08-03 12:22:14 -0600 | [diff] [blame] | 552 | if (eth_env_get_enetaddr("ethaddr", enetaddr)) { |
Nikita Kiryanov | 8d25a51 | 2015-01-14 10:42:42 +0200 | [diff] [blame] | 553 | fdt_find_and_setprop(blob, |
| 554 | "/soc/aips-bus@02100000/ethernet@02188000", |
| 555 | "local-mac-address", enetaddr, 6, 1); |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 556 | } |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 557 | |
Simon Glass | 399a9ce | 2017-08-03 12:22:14 -0600 | [diff] [blame] | 558 | if (eth_env_get_enetaddr("eth1addr", enetaddr)) { |
Nikita Kiryanov | 2c4c922 | 2015-01-14 10:42:44 +0200 | [diff] [blame] | 559 | fdt_find_and_setprop(blob, "/eth@pcie", "local-mac-address", |
| 560 | enetaddr, 6, 1); |
| 561 | } |
| 562 | |
Christopher Spinrath | 2e15832 | 2016-08-23 16:08:52 +0200 | [diff] [blame] | 563 | fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); |
| 564 | |
Nikita Kiryanov | 0a9c1b8 | 2015-09-06 11:48:38 +0300 | [diff] [blame] | 565 | baseboard_rev = cl_eeprom_get_board_rev(0); |
| 566 | err = cl_eeprom_get_product_name((uchar *)baseboard_name, 0); |
| 567 | if (err || baseboard_rev == 0) |
| 568 | return 0; /* Assume not an early revision SB-FX6m baseboard */ |
| 569 | |
| 570 | if (!strncmp("SB-FX6m", baseboard_name, 7) && baseboard_rev <= 120) { |
Nikita Kiryanov | 0a9c1b8 | 2015-09-06 11:48:38 +0300 | [diff] [blame] | 571 | nodeoffset = fdt_path_offset(blob, USDHC3_PATH); |
| 572 | fdt_delprop(blob, nodeoffset, "cd-gpios"); |
Christopher Spinrath | ad3e0d7 | 2016-06-16 14:02:56 +0200 | [diff] [blame] | 573 | fdt_find_and_setprop(blob, USDHC3_PATH, "broken-cd", |
Nikita Kiryanov | 0a9c1b8 | 2015-09-06 11:48:38 +0300 | [diff] [blame] | 574 | NULL, 0, 1); |
| 575 | fdt_find_and_setprop(blob, USDHC3_PATH, "keep-power-in-suspend", |
| 576 | NULL, 0, 1); |
| 577 | } |
| 578 | |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 579 | return 0; |
Nikita Kiryanov | 5d95fd8 | 2014-08-20 15:09:02 +0300 | [diff] [blame] | 580 | } |
| 581 | #endif |
| 582 | |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 583 | int board_init(void) |
| 584 | { |
Simon Glass | 8d91436 | 2014-10-01 19:57:24 -0600 | [diff] [blame] | 585 | int ret; |
| 586 | |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 587 | gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; |
Nikita Kiryanov | 59d0609 | 2014-08-20 15:09:01 +0300 | [diff] [blame] | 588 | cm_fx6_setup_gpmi_nand(); |
Simon Glass | 8d91436 | 2014-10-01 19:57:24 -0600 | [diff] [blame] | 589 | |
Nikita Kiryanov | 2fc7d2a | 2014-10-02 17:17:24 +0300 | [diff] [blame] | 590 | ret = cm_fx6_setup_ecspi(); |
| 591 | if (ret) |
| 592 | printf("Warning: ECSPI setup failed: %d\n", ret); |
| 593 | |
| 594 | ret = cm_fx6_setup_usb_otg(); |
| 595 | if (ret) |
| 596 | printf("Warning: USB OTG setup failed: %d\n", ret); |
| 597 | |
| 598 | ret = cm_fx6_setup_usb_host(); |
| 599 | if (ret) |
| 600 | printf("Warning: USB host setup failed: %d\n", ret); |
| 601 | |
| 602 | /* |
| 603 | * cm-fx6 may have iSSD not assembled and in this case it has |
| 604 | * bypasses for a (m)SATA socket on the baseboard. The socketed |
| 605 | * device is not controlled by those GPIOs. So just print a warning |
| 606 | * if the setup fails. |
| 607 | */ |
| 608 | ret = cm_fx6_setup_issd(); |
| 609 | if (ret) |
| 610 | printf("Warning: iSSD setup failed: %d\n", ret); |
| 611 | |
Simon Glass | 8d91436 | 2014-10-01 19:57:24 -0600 | [diff] [blame] | 612 | /* Warn on failure but do not abort boot */ |
| 613 | ret = cm_fx6_setup_i2c(); |
| 614 | if (ret) |
| 615 | printf("Warning: I2C setup failed: %d\n", ret); |
Nikita Kiryanov | 59d0609 | 2014-08-20 15:09:01 +0300 | [diff] [blame] | 616 | |
Nikita Kiryanov | 8958137 | 2015-01-14 10:42:46 +0200 | [diff] [blame] | 617 | cm_fx6_setup_display(); |
| 618 | |
Simon Glass | 220b8da | 2017-07-29 11:35:27 -0600 | [diff] [blame] | 619 | /* This should be done in the MMC driver when MX6 has a clock driver */ |
Yangbo Lu | 7334038 | 2019-06-21 11:42:28 +0800 | [diff] [blame] | 620 | #ifdef CONFIG_FSL_ESDHC_IMX |
Simon Glass | 220b8da | 2017-07-29 11:35:27 -0600 | [diff] [blame] | 621 | if (IS_ENABLED(CONFIG_BLK)) { |
| 622 | int i; |
| 623 | |
| 624 | cm_fx6_set_usdhc_iomux(); |
| 625 | for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) |
| 626 | enable_usdhc_clk(1, i); |
| 627 | } |
| 628 | #endif |
| 629 | |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 630 | return 0; |
| 631 | } |
| 632 | |
Christopher Spinrath | f306a5a | 2018-01-09 22:01:35 +0100 | [diff] [blame] | 633 | int board_late_init(void) |
| 634 | { |
| 635 | #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
| 636 | char baseboard_name[16]; |
| 637 | int err; |
| 638 | |
| 639 | if (is_mx6dq()) |
| 640 | env_set("board_rev", "MX6Q"); |
| 641 | else if (is_mx6dl()) |
| 642 | env_set("board_rev", "MX6DL"); |
| 643 | |
| 644 | err = cl_eeprom_get_product_name((uchar *)baseboard_name, 0); |
| 645 | if (err) |
| 646 | return 0; |
| 647 | |
| 648 | if (!strncmp("SB-FX6m", baseboard_name, 7)) |
| 649 | env_set("board_name", "Utilite"); |
| 650 | #endif |
| 651 | return 0; |
| 652 | } |
| 653 | |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 654 | int checkboard(void) |
| 655 | { |
| 656 | puts("Board: CM-FX6\n"); |
| 657 | return 0; |
| 658 | } |
| 659 | |
Nikita Kiryanov | c69901b | 2015-08-30 15:36:48 +0300 | [diff] [blame] | 660 | int misc_init_r(void) |
| 661 | { |
| 662 | cl_print_pcb_info(); |
| 663 | |
| 664 | return 0; |
| 665 | } |
| 666 | |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 667 | int dram_init_banksize(void) |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 668 | { |
| 669 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 670 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
| 671 | |
| 672 | switch (gd->ram_size) { |
| 673 | case 0x10000000: /* DDR_16BIT_256MB */ |
| 674 | gd->bd->bi_dram[0].size = 0x10000000; |
| 675 | gd->bd->bi_dram[1].size = 0; |
| 676 | break; |
| 677 | case 0x20000000: /* DDR_32BIT_512MB */ |
| 678 | gd->bd->bi_dram[0].size = 0x20000000; |
| 679 | gd->bd->bi_dram[1].size = 0; |
| 680 | break; |
| 681 | case 0x40000000: |
| 682 | if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */ |
| 683 | gd->bd->bi_dram[0].size = 0x20000000; |
| 684 | gd->bd->bi_dram[1].size = 0x20000000; |
| 685 | } else { /* DDR_64BIT_1GB */ |
| 686 | gd->bd->bi_dram[0].size = 0x40000000; |
| 687 | gd->bd->bi_dram[1].size = 0; |
| 688 | } |
| 689 | break; |
| 690 | case 0x80000000: /* DDR_64BIT_2GB */ |
| 691 | gd->bd->bi_dram[0].size = 0x40000000; |
| 692 | gd->bd->bi_dram[1].size = 0x40000000; |
| 693 | break; |
| 694 | case 0xEFF00000: /* DDR_64BIT_4GB */ |
| 695 | gd->bd->bi_dram[0].size = 0x70000000; |
| 696 | gd->bd->bi_dram[1].size = 0x7FF00000; |
| 697 | break; |
| 698 | } |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 699 | |
| 700 | return 0; |
Nikita Kiryanov | f5cab0f | 2014-09-07 18:59:29 +0300 | [diff] [blame] | 701 | } |
| 702 | |
| 703 | int dram_init(void) |
| 704 | { |
| 705 | gd->ram_size = imx_ddr_size(); |
| 706 | switch (gd->ram_size) { |
| 707 | case 0x10000000: |
| 708 | case 0x20000000: |
| 709 | case 0x40000000: |
| 710 | case 0x80000000: |
| 711 | break; |
| 712 | case 0xF0000000: |
| 713 | gd->ram_size -= 0x100000; |
| 714 | break; |
| 715 | default: |
| 716 | printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size); |
| 717 | return -1; |
| 718 | } |
| 719 | |
| 720 | return 0; |
| 721 | } |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 722 | |
| 723 | u32 get_board_rev(void) |
| 724 | { |
Nikita Kiryanov | 7fa6835 | 2015-09-06 11:48:35 +0300 | [diff] [blame] | 725 | return cl_eeprom_get_board_rev(CONFIG_SYS_I2C_EEPROM_BUS); |
Nikita Kiryanov | 266728a | 2014-08-20 15:09:05 +0300 | [diff] [blame] | 726 | } |
| 727 | |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 728 | static struct mxc_serial_plat cm_fx6_mxc_serial_plat = { |
Simon Glass | c0d07c2 | 2014-10-01 19:57:28 -0600 | [diff] [blame] | 729 | .reg = (struct mxc_uart *)UART4_BASE, |
| 730 | }; |
| 731 | |
Simon Glass | 1d8364a | 2020-12-28 20:34:54 -0700 | [diff] [blame] | 732 | U_BOOT_DRVINFO(cm_fx6_serial) = { |
Simon Glass | c0d07c2 | 2014-10-01 19:57:28 -0600 | [diff] [blame] | 733 | .name = "serial_mxc", |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 734 | .plat = &cm_fx6_mxc_serial_plat, |
Simon Glass | c0d07c2 | 2014-10-01 19:57:28 -0600 | [diff] [blame] | 735 | }; |
Simon Glass | bf8950e | 2017-07-29 11:35:25 -0600 | [diff] [blame] | 736 | |
| 737 | #if CONFIG_IS_ENABLED(AHCI) |
| 738 | static int sata_imx_probe(struct udevice *dev) |
| 739 | { |
| 740 | int i, err; |
| 741 | |
| 742 | /* Make sure this gpio has logical 0 value */ |
| 743 | gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0); |
| 744 | udelay(100); |
| 745 | cm_fx6_sata_power(1); |
| 746 | |
| 747 | for (i = 0; i < CM_FX6_SATA_INIT_RETRIES; i++) { |
| 748 | err = setup_sata(); |
| 749 | if (err) { |
| 750 | printf("SATA setup failed: %d\n", err); |
| 751 | return err; |
| 752 | } |
| 753 | |
| 754 | udelay(100); |
| 755 | |
| 756 | err = dwc_ahsata_probe(dev); |
| 757 | if (!err) |
| 758 | break; |
| 759 | |
| 760 | /* There is no device on the SATA port */ |
| 761 | if (sata_dm_port_status(0, 0) == 0) |
| 762 | break; |
| 763 | |
| 764 | /* There's a device, but link not established. Retry */ |
| 765 | device_remove(dev, DM_REMOVE_NORMAL); |
| 766 | } |
| 767 | |
| 768 | return 0; |
| 769 | } |
| 770 | |
| 771 | static int sata_imx_remove(struct udevice *dev) |
| 772 | { |
| 773 | cm_fx6_sata_power(0); |
| 774 | mdelay(250); |
| 775 | |
| 776 | return 0; |
| 777 | } |
| 778 | |
| 779 | struct ahci_ops sata_imx_ops = { |
| 780 | .port_status = dwc_ahsata_port_status, |
| 781 | .reset = dwc_ahsata_bus_reset, |
| 782 | .scan = dwc_ahsata_scan, |
| 783 | }; |
| 784 | |
| 785 | static const struct udevice_id sata_imx_ids[] = { |
| 786 | { .compatible = "fsl,imx6q-ahci" }, |
| 787 | { } |
| 788 | }; |
| 789 | |
| 790 | U_BOOT_DRIVER(sata_imx) = { |
| 791 | .name = "dwc_ahci", |
| 792 | .id = UCLASS_AHCI, |
| 793 | .of_match = sata_imx_ids, |
| 794 | .ops = &sata_imx_ops, |
| 795 | .probe = sata_imx_probe, |
| 796 | .remove = sata_imx_remove, /* reset bus to stop it */ |
| 797 | }; |
| 798 | #endif /* AHCI */ |