blob: 3482ee91efd83da9938cb8c47682f45874cb4230 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
maxims@google.com899b40f2017-01-18 13:44:57 -08002/*
3 * Copyright (c) 2016 Google, Inc
maxims@google.com899b40f2017-01-18 13:44:57 -08004 */
5#include <common.h>
6#include <dm.h>
Simon Glass97589732020-05-10 11:40:02 -06007#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -06008#include <log.h>
maxims@google.com899b40f2017-01-18 13:44:57 -08009#include <ram.h>
10#include <timer.h>
11#include <asm/io.h>
12#include <asm/arch/timer.h>
13#include <asm/arch/wdt.h>
14#include <linux/err.h>
15#include <dm/uclass.h>
16
17/*
18 * Second Watchdog Timer by default is configured
19 * to trigger secondary boot source.
20 */
21#define AST_2ND_BOOT_WDT 1
22
23/*
24 * Third Watchdog Timer by default is configured
25 * to toggle Flash address mode switch before reset.
26 */
27#define AST_FLASH_ADDR_DETECT_WDT 2
28
29DECLARE_GLOBAL_DATA_PTR;
30
maxims@google.com899b40f2017-01-18 13:44:57 -080031int board_init(void)
32{
33 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
34
35 return 0;
36}
37
38int dram_init(void)
39{
40 struct udevice *dev;
41 struct ram_info ram;
42 int ret;
43
44 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
45 if (ret) {
46 debug("DRAM FAIL1\r\n");
47 return ret;
48 }
49
50 ret = ram_get_info(dev, &ram);
51 if (ret) {
52 debug("DRAM FAIL2\r\n");
53 return ret;
54 }
55
56 gd->ram_size = ram.size;
57
58 return 0;
59}