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git01.mediatek.com / filogic / uboot / 3ba671bb4f70bed2e44f189696c853e7ca1ea30a / . / include / configs / hsdk.h
blob: 0ce65e7755eaead298a4e1ff38b7921db59fae70 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]2/*
3 * Copyright (C) 2017 Synopsys, Inc. All rights reserved.
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]4 */
5
6#ifndef _CONFIG_HSDK_H_
7#define _CONFIG_HSDK_H_
8
9#include <linux/sizes.h>
10
11/*
12 * CPU configuration
13 */
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]14#define NR_CPUS 4
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]15#define ARC_PERIPHERAL_BASE 0xF0000000
16#define ARC_DWMMC_BASE (ARC_PERIPHERAL_BASE + 0xA000)
17#define ARC_DWGMAC_BASE (ARC_PERIPHERAL_BASE + 0x18000)
18
19/*
20 * Memory configuration
21 */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]22
23#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
24#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
25#define CONFIG_SYS_SDRAM_SIZE SZ_1G
26
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]27/*
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]28 * UART configuration
29 */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]30#define CONFIG_SYS_NS16550_SERIAL
31#define CONFIG_SYS_NS16550_CLK 33330000
32#define CONFIG_SYS_NS16550_MEM32
33
34/*
35 * Ethernet PHY configuration
36 */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]37
38/*
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]39 * Environment settings
40 */
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]41#define CONFIG_EXTRA_ENV_SETTINGS \
Eugeniy Paltsev55457592018-06-04 14:52:32 +0300[diff] [blame]42 "upgrade=if mmc rescan && " \
43 "fatload mmc 0:1 ${loadaddr} u-boot-update.scr && " \
44 "iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \
45 "\"Fail to upgrade.\n" \
46 "Do you have u-boot-update.scr and u-boot.head on first (FAT) SD card partition?\"" \
47 "; fi\0" \
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]48 "core_dccm_0=0x10\0" \
49 "core_dccm_1=0x6\0" \
50 "core_dccm_2=0x10\0" \
51 "core_dccm_3=0x6\0" \
52 "core_iccm_0=0x10\0" \
53 "core_iccm_1=0x6\0" \
54 "core_iccm_2=0x10\0" \
55 "core_iccm_3=0x6\0" \
56 "core_mask=0xF\0" \
57 "dcache_ena=0x1\0" \
58 "icache_ena=0x1\0" \
59 "non_volatile_limit=0xE\0" \
60 "hsdk_hs34=setenv core_mask 0x2; setenv icache_ena 0x0; \
61setenv dcache_ena 0x0; setenv core_iccm_1 0x7; \
62setenv core_dccm_1 0x8; setenv non_volatile_limit 0x0;\0" \
63 "hsdk_hs36=setenv core_mask 0x1; setenv icache_ena 0x1; \
64setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
65setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;\0" \
66 "hsdk_hs36_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; \
67setenv dcache_ena 0x1; setenv core_iccm_1 0x7; \
68setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;\0" \
69 "hsdk_hs38=setenv core_mask 0x1; setenv icache_ena 0x1; \
70setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
71setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;\0" \
72 "hsdk_hs38_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; \
73setenv dcache_ena 0x1; setenv core_iccm_1 0x7; \
74setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;\0" \
75 "hsdk_hs38x2=setenv core_mask 0x3; setenv icache_ena 0x1; \
76setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
77setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
78setenv core_iccm_1 0x6; setenv core_dccm_1 0x6;\0" \
79 "hsdk_hs38x3=setenv core_mask 0x7; setenv icache_ena 0x1; \
80setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
81setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
82setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \
83setenv core_iccm_2 0x10; setenv core_dccm_2 0x10;\0" \
84 "hsdk_hs38x4=setenv core_mask 0xF; setenv icache_ena 0x1; \
85setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
86setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
87setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \
88setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; \
89setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0"
90
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]91/* Cli configuration */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]92
93/*
Eugeniy Paltsev24e026e2018-03-26 15:57:37 +0300[diff] [blame]94 * Callback configuration
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]95 */
Alexey Brodkin88961bc2016-11-25 16:23:43 +0300[diff] [blame]96
97#endif /* _CONFIG_HSDK_H_ */