blob: 698da6b6dac8d331dd3b07e74bffda1929e357e5 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocher3757e972013-12-02 07:47:23 +01002/*
3 * Common board functions for siemens AT91SAM9G45 based boards
4 * (C) Copyright 2013 Siemens AG
5 *
6 * Based on:
7 * U-Boot file: include/configs/at91sam9m10g45ek.h
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
Heiko Schocher3757e972013-12-02 07:47:23 +010011 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16#include <asm/hardware.h>
Heiko Schocher8189a082015-08-21 11:28:19 +020017#include <linux/sizes.h>
Heiko Schocher3757e972013-12-02 07:47:23 +010018
Heiko Schocher3757e972013-12-02 07:47:23 +010019/*
20 * Warning: changing CONFIG_SYS_TEXT_BASE requires
21 * adapting the initial boot program.
22 * Since the linker has to swallow that define, we must use a pure
23 * hex number here!
24 */
25
Heiko Schocher3757e972013-12-02 07:47:23 +010026/* ARM asynchronous clock */
27#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
28#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
Heiko Schocher3757e972013-12-02 07:47:23 +010029
Heiko Schocher3757e972013-12-02 07:47:23 +010030/* serial console */
Heiko Schocher3757e972013-12-02 07:47:23 +010031#define CONFIG_USART_BASE ATMEL_BASE_DBGU
32#define CONFIG_USART_ID ATMEL_ID_SYS
33
Heiko Schocher3757e972013-12-02 07:47:23 +010034/* SDRAM */
Heiko Schocher3757e972013-12-02 07:47:23 +010035#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
36#define CONFIG_SYS_SDRAM_SIZE 0x08000000
37
Heiko Schocher3757e972013-12-02 07:47:23 +010038/* NAND flash */
39#ifdef CONFIG_CMD_NAND
Heiko Schocher3757e972013-12-02 07:47:23 +010040#define CONFIG_SYS_MAX_NAND_DEVICE 1
41#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
42#define CONFIG_SYS_NAND_DBW_8
43/* our ALE is AD21 */
44#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
45/* our CLE is AD22 */
46#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
47#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
Heiko Schocher22ab1322014-11-18 11:53:53 +010048#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
Heiko Schocher3757e972013-12-02 07:47:23 +010049#endif
50
Heiko Schocher08c5df22015-08-21 11:28:20 +020051/* DFU class support */
Heiko Schocher08c5df22015-08-21 11:28:20 +020052#define DFU_MANIFEST_POLL_TIMEOUT 25000
53
Heiko Schocher3757e972013-12-02 07:47:23 +010054/* bootstrap + u-boot + env in nandflash */
Heiko Schocher3757e972013-12-02 07:47:23 +010055
Heiko Schocher25d74a32014-10-31 08:31:06 +010056/* Defines for SPL */
Heiko Schocher25d74a32014-10-31 08:31:06 +010057
Heiko Schocher25d74a32014-10-31 08:31:06 +010058#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
59#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
60#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
Heiko Schocher25d74a32014-10-31 08:31:06 +010061
Heiko Schocher25d74a32014-10-31 08:31:06 +010062#define CONFIG_SYS_NAND_ECCSIZE 256
63#define CONFIG_SYS_NAND_ECCBYTES 3
Heiko Schocher25d74a32014-10-31 08:31:06 +010064#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
65 48, 49, 50, 51, 52, 53, 54, 55, \
66 56, 57, 58, 59, 60, 61, 62, 63, }
67
Heiko Schocher25d74a32014-10-31 08:31:06 +010068#define CONFIG_SYS_MASTER_CLOCK 132096000
69#define AT91_PLL_LOCK_TIMEOUT 1000000
70#define CONFIG_SYS_AT91_PLLA 0x20c73f03
71#define CONFIG_SYS_MCKR 0x1301
72#define CONFIG_SYS_MCKR_CSS 0x1302
73
Heiko Schocher3757e972013-12-02 07:47:23 +010074#endif