blob: c71b961234a90cfa468de02de3a8e3ba066a5148 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassad8f8ab2015-06-23 15:38:42 -06002/*
3 * Copyright (c) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Simon Glassad8f8ab2015-06-23 15:38:42 -06005 */
6
7#include <common.h>
8#include <dm.h>
9#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Masahiro Yamada75f82d02018-03-05 01:20:11 +090011#include <linux/libfdt.h>
Simon Glassad8f8ab2015-06-23 15:38:42 -060012#include <malloc.h>
13#include <mapmem.h>
14#include <regmap.h>
Paul Burton39776032016-09-08 07:47:35 +010015#include <asm/io.h>
Simon Glasseeeb5192017-05-18 20:09:10 -060016#include <dm/of_addr.h>
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +053017#include <dm/devres.h>
Simon Glasseeeb5192017-05-18 20:09:10 -060018#include <linux/ioport.h>
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +053019#include <linux/compat.h>
20#include <linux/err.h>
Paul Burton39776032016-09-08 07:47:35 +010021
Simon Glassad8f8ab2015-06-23 15:38:42 -060022DECLARE_GLOBAL_DATA_PTR;
23
Mario Six0aa52992018-10-04 09:00:42 +020024/**
25 * regmap_alloc() - Allocate a regmap with a given number of ranges.
26 *
27 * @count: Number of ranges to be allocated for the regmap.
Pratyush Yadav1c9867c2020-09-24 10:04:12 +053028 *
29 * The default regmap width is set to REGMAP_SIZE_32. Callers can override it
30 * if they need.
31 *
Mario Six0aa52992018-10-04 09:00:42 +020032 * Return: A pointer to the newly allocated regmap, or NULL on error.
33 */
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +090034static struct regmap *regmap_alloc(int count)
Simon Glass30d73e82016-07-04 11:58:21 -060035{
36 struct regmap *map;
Pratyush Yadav279cad82020-09-24 10:04:11 +053037 size_t size = sizeof(*map) + sizeof(map->ranges[0]) * count;
Simon Glass30d73e82016-07-04 11:58:21 -060038
Pratyush Yadav279cad82020-09-24 10:04:11 +053039 map = calloc(1, size);
Simon Glass30d73e82016-07-04 11:58:21 -060040 if (!map)
41 return NULL;
Simon Glass30d73e82016-07-04 11:58:21 -060042 map->range_count = count;
Pratyush Yadav1c9867c2020-09-24 10:04:12 +053043 map->width = REGMAP_SIZE_32;
Simon Glass30d73e82016-07-04 11:58:21 -060044
45 return map;
46}
47
Simon Glassb9443452016-07-04 11:57:59 -060048#if CONFIG_IS_ENABLED(OF_PLATDATA)
Simon Glass1b1fe412017-08-29 14:15:50 -060049int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
Simon Glassb9443452016-07-04 11:57:59 -060050 struct regmap **mapp)
51{
Simon Glassb6114332016-07-04 11:58:22 -060052 struct regmap_range *range;
53 struct regmap *map;
54
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +090055 map = regmap_alloc(count);
Simon Glassb6114332016-07-04 11:58:22 -060056 if (!map)
57 return -ENOMEM;
58
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +090059 for (range = map->ranges; count > 0; reg += 2, range++, count--) {
Simon Glassb6114332016-07-04 11:58:22 -060060 range->start = *reg;
61 range->size = reg[1];
62 }
63
64 *mapp = map;
65
Simon Glassb9443452016-07-04 11:57:59 -060066 return 0;
67}
68#else
Mario Six5159c0c2018-10-15 09:24:07 +020069/**
70 * init_range() - Initialize a single range of a regmap
71 * @node: Device node that will use the map in question
72 * @range: Pointer to a regmap_range structure that will be initialized
73 * @addr_len: The length of the addr parts of the reg property
74 * @size_len: The length of the size parts of the reg property
75 * @index: The index of the range to initialize
76 *
77 * This function will read the necessary 'reg' information from the device tree
78 * (the 'addr' part, and the 'length' part), and initialize the range in
79 * quesion.
80 *
81 * Return: 0 if OK, -ve on error
82 */
83static int init_range(ofnode node, struct regmap_range *range, int addr_len,
84 int size_len, int index)
85{
86 fdt_size_t sz;
87 struct resource r;
88
89 if (of_live_active()) {
90 int ret;
91
92 ret = of_address_to_resource(ofnode_to_np(node),
93 index, &r);
94 if (ret) {
95 debug("%s: Could not read resource of range %d (ret = %d)\n",
96 ofnode_get_name(node), index, ret);
97 return ret;
98 }
99
100 range->start = r.start;
101 range->size = r.end - r.start + 1;
102 } else {
103 int offset = ofnode_to_offset(node);
104
105 range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob, offset,
106 "reg", index,
107 addr_len, size_len,
108 &sz, true);
109 if (range->start == FDT_ADDR_T_NONE) {
110 debug("%s: Could not read start of range %d\n",
111 ofnode_get_name(node), index);
112 return -EINVAL;
113 }
114
115 range->size = sz;
116 }
117
118 return 0;
119}
120
Faiz Abbas52742f42019-06-11 00:43:33 +0530121int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index)
122{
123 struct regmap *map;
124 int addr_len, size_len;
125 int ret;
126
127 addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
128 if (addr_len < 0) {
129 debug("%s: Error while reading the addr length (ret = %d)\n",
130 ofnode_get_name(node), addr_len);
131 return addr_len;
132 }
133
134 size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
135 if (size_len < 0) {
136 debug("%s: Error while reading the size length: (ret = %d)\n",
137 ofnode_get_name(node), size_len);
138 return size_len;
139 }
140
141 map = regmap_alloc(1);
142 if (!map)
143 return -ENOMEM;
144
145 ret = init_range(node, map->ranges, addr_len, size_len, index);
146 if (ret)
Faiz Abbas4bba4132019-11-11 15:29:05 +0530147 goto err;
Faiz Abbas52742f42019-06-11 00:43:33 +0530148
149 if (ofnode_read_bool(node, "little-endian"))
150 map->endianness = REGMAP_LITTLE_ENDIAN;
151 else if (ofnode_read_bool(node, "big-endian"))
152 map->endianness = REGMAP_BIG_ENDIAN;
153 else if (ofnode_read_bool(node, "native-endian"))
154 map->endianness = REGMAP_NATIVE_ENDIAN;
155 else /* Default: native endianness */
156 map->endianness = REGMAP_NATIVE_ENDIAN;
157
158 *mapp = map;
159
Faiz Abbas4bba4132019-11-11 15:29:05 +0530160 return 0;
161err:
162 regmap_uninit(map);
163
Faiz Abbas52742f42019-06-11 00:43:33 +0530164 return ret;
165}
166
Masahiro Yamadae4873e32018-04-19 12:14:03 +0900167int regmap_init_mem(ofnode node, struct regmap **mapp)
Simon Glassad8f8ab2015-06-23 15:38:42 -0600168{
Simon Glassad8f8ab2015-06-23 15:38:42 -0600169 struct regmap_range *range;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600170 struct regmap *map;
171 int count;
172 int addr_len, size_len, both_len;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600173 int len;
Jean-Jacques Hiblot024611b2017-02-13 16:17:48 +0100174 int index;
Faiz Abbas4bba4132019-11-11 15:29:05 +0530175 int ret;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600176
Masahiro Yamadae4873e32018-04-19 12:14:03 +0900177 addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
Mario Six12321162018-10-04 09:00:43 +0200178 if (addr_len < 0) {
179 debug("%s: Error while reading the addr length (ret = %d)\n",
180 ofnode_get_name(node), addr_len);
181 return addr_len;
182 }
183
Masahiro Yamadae4873e32018-04-19 12:14:03 +0900184 size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
Mario Six12321162018-10-04 09:00:43 +0200185 if (size_len < 0) {
186 debug("%s: Error while reading the size length: (ret = %d)\n",
187 ofnode_get_name(node), size_len);
188 return size_len;
189 }
190
Simon Glassad8f8ab2015-06-23 15:38:42 -0600191 both_len = addr_len + size_len;
Mario Six12321162018-10-04 09:00:43 +0200192 if (!both_len) {
193 debug("%s: Both addr and size length are zero\n",
194 ofnode_get_name(node));
195 return -EINVAL;
196 }
Simon Glassad8f8ab2015-06-23 15:38:42 -0600197
Masahiro Yamadae4873e32018-04-19 12:14:03 +0900198 len = ofnode_read_size(node, "reg");
Mario Six6e96ba22018-10-15 09:24:08 +0200199 if (len < 0) {
200 debug("%s: Error while reading reg size (ret = %d)\n",
201 ofnode_get_name(node), len);
Simon Glasseeeb5192017-05-18 20:09:10 -0600202 return len;
Mario Six6e96ba22018-10-15 09:24:08 +0200203 }
Simon Glasseeeb5192017-05-18 20:09:10 -0600204 len /= sizeof(fdt32_t);
Simon Glassad8f8ab2015-06-23 15:38:42 -0600205 count = len / both_len;
Mario Six6e96ba22018-10-15 09:24:08 +0200206 if (!count) {
207 debug("%s: Not enough data in reg property\n",
208 ofnode_get_name(node));
Simon Glassad8f8ab2015-06-23 15:38:42 -0600209 return -EINVAL;
Mario Six6e96ba22018-10-15 09:24:08 +0200210 }
Simon Glassad8f8ab2015-06-23 15:38:42 -0600211
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +0900212 map = regmap_alloc(count);
Simon Glassad8f8ab2015-06-23 15:38:42 -0600213 if (!map)
214 return -ENOMEM;
215
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +0900216 for (range = map->ranges, index = 0; count > 0;
Simon Glasseeeb5192017-05-18 20:09:10 -0600217 count--, range++, index++) {
Faiz Abbas4bba4132019-11-11 15:29:05 +0530218 ret = init_range(node, range, addr_len, size_len, index);
Mario Six5159c0c2018-10-15 09:24:07 +0200219 if (ret)
Faiz Abbas4bba4132019-11-11 15:29:05 +0530220 goto err;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600221 }
222
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200223 if (ofnode_read_bool(node, "little-endian"))
224 map->endianness = REGMAP_LITTLE_ENDIAN;
225 else if (ofnode_read_bool(node, "big-endian"))
226 map->endianness = REGMAP_BIG_ENDIAN;
227 else if (ofnode_read_bool(node, "native-endian"))
228 map->endianness = REGMAP_NATIVE_ENDIAN;
229 else /* Default: native endianness */
230 map->endianness = REGMAP_NATIVE_ENDIAN;
231
Simon Glassad8f8ab2015-06-23 15:38:42 -0600232 *mapp = map;
233
234 return 0;
Faiz Abbas4bba4132019-11-11 15:29:05 +0530235err:
236 regmap_uninit(map);
237
238 return ret;
Simon Glassad8f8ab2015-06-23 15:38:42 -0600239}
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +0530240
241static void devm_regmap_release(struct udevice *dev, void *res)
242{
243 regmap_uninit(*(struct regmap **)res);
244}
245
246struct regmap *devm_regmap_init(struct udevice *dev,
247 const struct regmap_bus *bus,
248 void *bus_context,
249 const struct regmap_config *config)
250{
251 int rc;
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530252 struct regmap **mapp, *map;
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +0530253
254 mapp = devres_alloc(devm_regmap_release, sizeof(struct regmap *),
255 __GFP_ZERO);
256 if (unlikely(!mapp))
257 return ERR_PTR(-ENOMEM);
258
259 rc = regmap_init_mem(dev_ofnode(dev), mapp);
260 if (rc)
261 return ERR_PTR(rc);
262
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530263 map = *mapp;
264 if (config)
265 map->width = config->width;
266
Jean-Jacques Hiblotde03d122020-09-24 10:04:10 +0530267 devres_add(dev, mapp);
268 return *mapp;
269}
Simon Glassb9443452016-07-04 11:57:59 -0600270#endif
Simon Glassad8f8ab2015-06-23 15:38:42 -0600271
272void *regmap_get_range(struct regmap *map, unsigned int range_num)
273{
274 struct regmap_range *range;
275
276 if (range_num >= map->range_count)
277 return NULL;
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +0900278 range = &map->ranges[range_num];
Simon Glassad8f8ab2015-06-23 15:38:42 -0600279
280 return map_sysmem(range->start, range->size);
281}
282
283int regmap_uninit(struct regmap *map)
284{
Simon Glassad8f8ab2015-06-23 15:38:42 -0600285 free(map);
286
287 return 0;
288}
Paul Burton39776032016-09-08 07:47:35 +0100289
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200290static inline u8 __read_8(u8 *addr, enum regmap_endianness_t endianness)
291{
292 return readb(addr);
293}
294
295static inline u16 __read_16(u16 *addr, enum regmap_endianness_t endianness)
296{
297 switch (endianness) {
298 case REGMAP_LITTLE_ENDIAN:
299 return in_le16(addr);
300 case REGMAP_BIG_ENDIAN:
301 return in_be16(addr);
302 case REGMAP_NATIVE_ENDIAN:
303 return readw(addr);
304 }
305
306 return readw(addr);
307}
308
309static inline u32 __read_32(u32 *addr, enum regmap_endianness_t endianness)
310{
311 switch (endianness) {
312 case REGMAP_LITTLE_ENDIAN:
313 return in_le32(addr);
314 case REGMAP_BIG_ENDIAN:
315 return in_be32(addr);
316 case REGMAP_NATIVE_ENDIAN:
317 return readl(addr);
318 }
319
320 return readl(addr);
321}
322
323#if defined(in_le64) && defined(in_be64) && defined(readq)
324static inline u64 __read_64(u64 *addr, enum regmap_endianness_t endianness)
325{
326 switch (endianness) {
327 case REGMAP_LITTLE_ENDIAN:
328 return in_le64(addr);
329 case REGMAP_BIG_ENDIAN:
330 return in_be64(addr);
331 case REGMAP_NATIVE_ENDIAN:
332 return readq(addr);
333 }
334
335 return readq(addr);
336}
337#endif
338
Mario Six2f009972018-10-15 09:24:11 +0200339int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
340 void *valp, size_t val_len)
Paul Burton39776032016-09-08 07:47:35 +0100341{
Mario Six2f009972018-10-15 09:24:11 +0200342 struct regmap_range *range;
Mario Sixa4fd59e2018-10-15 09:24:10 +0200343 void *ptr;
Paul Burton39776032016-09-08 07:47:35 +0100344
Mario Six2f009972018-10-15 09:24:11 +0200345 if (range_num >= map->range_count) {
346 debug("%s: range index %d larger than range count\n",
347 __func__, range_num);
348 return -ERANGE;
349 }
350 range = &map->ranges[range_num];
351
Mario Six2f009972018-10-15 09:24:11 +0200352 if (offset + val_len > range->size) {
353 debug("%s: offset/size combination invalid\n", __func__);
354 return -ERANGE;
355 }
Paul Burton39776032016-09-08 07:47:35 +0100356
Pratyush Yadav5c42d5d2020-05-26 17:35:57 +0530357 ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
358
Mario Sixa4fd59e2018-10-15 09:24:10 +0200359 switch (val_len) {
360 case REGMAP_SIZE_8:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200361 *((u8 *)valp) = __read_8(ptr, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200362 break;
363 case REGMAP_SIZE_16:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200364 *((u16 *)valp) = __read_16(ptr, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200365 break;
366 case REGMAP_SIZE_32:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200367 *((u32 *)valp) = __read_32(ptr, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200368 break;
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200369#if defined(in_le64) && defined(in_be64) && defined(readq)
Mario Sixa4fd59e2018-10-15 09:24:10 +0200370 case REGMAP_SIZE_64:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200371 *((u64 *)valp) = __read_64(ptr, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200372 break;
373#endif
374 default:
375 debug("%s: regmap size %zu unknown\n", __func__, val_len);
376 return -EINVAL;
377 }
Mario Six2f009972018-10-15 09:24:11 +0200378
Paul Burton39776032016-09-08 07:47:35 +0100379 return 0;
380}
381
Mario Six2f009972018-10-15 09:24:11 +0200382int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t val_len)
383{
384 return regmap_raw_read_range(map, 0, offset, valp, val_len);
385}
386
Mario Sixa4fd59e2018-10-15 09:24:10 +0200387int regmap_read(struct regmap *map, uint offset, uint *valp)
Paul Burton39776032016-09-08 07:47:35 +0100388{
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530389 return regmap_raw_read(map, offset, valp, map->width);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200390}
391
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200392static inline void __write_8(u8 *addr, const u8 *val,
393 enum regmap_endianness_t endianness)
394{
395 writeb(*val, addr);
396}
397
398static inline void __write_16(u16 *addr, const u16 *val,
399 enum regmap_endianness_t endianness)
400{
401 switch (endianness) {
402 case REGMAP_NATIVE_ENDIAN:
403 writew(*val, addr);
404 break;
405 case REGMAP_LITTLE_ENDIAN:
406 out_le16(addr, *val);
407 break;
408 case REGMAP_BIG_ENDIAN:
409 out_be16(addr, *val);
410 break;
411 }
412}
413
414static inline void __write_32(u32 *addr, const u32 *val,
415 enum regmap_endianness_t endianness)
416{
417 switch (endianness) {
418 case REGMAP_NATIVE_ENDIAN:
419 writel(*val, addr);
420 break;
421 case REGMAP_LITTLE_ENDIAN:
422 out_le32(addr, *val);
423 break;
424 case REGMAP_BIG_ENDIAN:
425 out_be32(addr, *val);
426 break;
427 }
428}
429
430#if defined(out_le64) && defined(out_be64) && defined(writeq)
431static inline void __write_64(u64 *addr, const u64 *val,
432 enum regmap_endianness_t endianness)
433{
434 switch (endianness) {
435 case REGMAP_NATIVE_ENDIAN:
436 writeq(*val, addr);
437 break;
438 case REGMAP_LITTLE_ENDIAN:
439 out_le64(addr, *val);
440 break;
441 case REGMAP_BIG_ENDIAN:
442 out_be64(addr, *val);
443 break;
444 }
445}
446#endif
447
Mario Six2f009972018-10-15 09:24:11 +0200448int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset,
449 const void *val, size_t val_len)
Mario Sixa4fd59e2018-10-15 09:24:10 +0200450{
Mario Six2f009972018-10-15 09:24:11 +0200451 struct regmap_range *range;
Mario Sixa4fd59e2018-10-15 09:24:10 +0200452 void *ptr;
Paul Burton39776032016-09-08 07:47:35 +0100453
Mario Six2f009972018-10-15 09:24:11 +0200454 if (range_num >= map->range_count) {
455 debug("%s: range index %d larger than range count\n",
456 __func__, range_num);
457 return -ERANGE;
458 }
459 range = &map->ranges[range_num];
460
Mario Six2f009972018-10-15 09:24:11 +0200461 if (offset + val_len > range->size) {
462 debug("%s: offset/size combination invalid\n", __func__);
463 return -ERANGE;
464 }
Mario Sixa4fd59e2018-10-15 09:24:10 +0200465
Pratyush Yadav5c42d5d2020-05-26 17:35:57 +0530466 ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
467
Mario Sixa4fd59e2018-10-15 09:24:10 +0200468 switch (val_len) {
469 case REGMAP_SIZE_8:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200470 __write_8(ptr, val, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200471 break;
472 case REGMAP_SIZE_16:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200473 __write_16(ptr, val, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200474 break;
475 case REGMAP_SIZE_32:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200476 __write_32(ptr, val, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200477 break;
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200478#if defined(out_le64) && defined(out_be64) && defined(writeq)
Mario Sixa4fd59e2018-10-15 09:24:10 +0200479 case REGMAP_SIZE_64:
Mario Sixe5a3d5b2018-10-15 09:24:14 +0200480 __write_64(ptr, val, map->endianness);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200481 break;
482#endif
483 default:
484 debug("%s: regmap size %zu unknown\n", __func__, val_len);
485 return -EINVAL;
486 }
Paul Burton39776032016-09-08 07:47:35 +0100487
488 return 0;
489}
Neil Armstrong5444ec62018-04-27 11:56:14 +0200490
Mario Six2f009972018-10-15 09:24:11 +0200491int regmap_raw_write(struct regmap *map, uint offset, const void *val,
492 size_t val_len)
493{
494 return regmap_raw_write_range(map, 0, offset, val, val_len);
495}
496
Mario Sixa4fd59e2018-10-15 09:24:10 +0200497int regmap_write(struct regmap *map, uint offset, uint val)
498{
Pratyush Yadav1c9867c2020-09-24 10:04:12 +0530499 return regmap_raw_write(map, offset, &val, map->width);
Mario Sixa4fd59e2018-10-15 09:24:10 +0200500}
501
Neil Armstrong5444ec62018-04-27 11:56:14 +0200502int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val)
503{
504 uint reg;
505 int ret;
506
507 ret = regmap_read(map, offset, &reg);
508 if (ret)
509 return ret;
510
511 reg &= ~mask;
512
Simon Glass56bed2a2019-10-11 16:16:49 -0600513 return regmap_write(map, offset, reg | (val & mask));
Neil Armstrong5444ec62018-04-27 11:56:14 +0200514}