Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2023 Rockchip Electronics Co., Ltd. |
| 4 | * |
| 5 | */ |
| 6 | |
| 7 | /dts-v1/; |
| 8 | |
| 9 | #include <dt-bindings/gpio/gpio.h> |
| 10 | #include <dt-bindings/pwm/pwm.h> |
| 11 | #include <dt-bindings/pinctrl/rockchip.h> |
| 12 | #include "rk3588.dtsi" |
| 13 | |
| 14 | / { |
| 15 | compatible = "coolpi,pi-cm5", "rockchip,rk3588"; |
| 16 | |
| 17 | aliases { |
| 18 | mmc0 = &sdhci; |
| 19 | mmc1 = &sdmmc; |
| 20 | mmc2 = &sdio; |
| 21 | serial2 = &uart2; |
| 22 | }; |
| 23 | |
| 24 | analog-sound { |
| 25 | compatible = "audio-graph-card"; |
| 26 | dais = <&i2s0_8ch_p0>; |
| 27 | label = "rk3588-es8316"; |
| 28 | routing = "MIC2", "Mic Jack", |
| 29 | "Headphones", "HPOL", |
| 30 | "Headphones", "HPOR"; |
| 31 | widgets = "Microphone", "Mic Jack", |
| 32 | "Headphone", "Headphones"; |
| 33 | }; |
| 34 | |
| 35 | chosen { |
| 36 | stdout-path = "serial2:1500000n8"; |
| 37 | }; |
| 38 | |
| 39 | avdd0v85_pcie20: avdd0v85-pcie20-regulator { |
| 40 | compatible = "regulator-fixed"; |
| 41 | regulator-name = "avdd0v85_pcie20"; |
| 42 | regulator-boot-on; |
| 43 | regulator-always-on; |
| 44 | regulator-min-microvolt = <850000>; |
| 45 | regulator-max-microvolt = <850000>; |
| 46 | vin-supply = <&vdd_0v85_s0>; |
| 47 | }; |
| 48 | |
| 49 | avdd1v8_pcie20: avdd1v8-pcie20-regulator { |
| 50 | compatible = "regulator-fixed"; |
| 51 | regulator-name = "avdd1v8_pcie20"; |
| 52 | regulator-boot-on; |
| 53 | regulator-always-on; |
| 54 | regulator-min-microvolt = <1800000>; |
| 55 | regulator-max-microvolt = <1800000>; |
| 56 | vin-supply = <&avcc_1v8_s0>; |
| 57 | }; |
| 58 | |
| 59 | avdd0v75_pcie30: avdd0v75-pcie30-regulator { |
| 60 | compatible = "regulator-fixed"; |
| 61 | regulator-name = "avdd0v75_pcie30"; |
| 62 | regulator-boot-on; |
| 63 | regulator-always-on; |
| 64 | regulator-min-microvolt = <750000>; |
| 65 | regulator-max-microvolt = <750000>; |
| 66 | vin-supply = <&avdd_0v75_s0>; |
| 67 | }; |
| 68 | |
| 69 | pcie30_avdd1v8: avdd1v8-pcie30-regulator { |
| 70 | compatible = "regulator-fixed"; |
| 71 | regulator-name = "pcie30_avdd1v8"; |
| 72 | regulator-boot-on; |
| 73 | regulator-always-on; |
| 74 | regulator-min-microvolt = <1800000>; |
| 75 | regulator-max-microvolt = <1800000>; |
| 76 | vin-supply = <&avcc_1v8_s0>; |
| 77 | }; |
| 78 | }; |
| 79 | |
| 80 | &combphy0_ps { |
| 81 | status = "okay"; |
| 82 | }; |
| 83 | |
| 84 | &combphy1_ps { |
| 85 | status = "okay"; |
| 86 | }; |
| 87 | |
| 88 | &combphy2_psu { |
| 89 | status = "okay"; |
| 90 | }; |
| 91 | |
| 92 | &cpu_b0 { |
| 93 | cpu-supply = <&vdd_cpu_big0_s0>; |
| 94 | }; |
| 95 | |
| 96 | &cpu_b1 { |
| 97 | cpu-supply = <&vdd_cpu_big0_s0>; |
| 98 | }; |
| 99 | |
| 100 | &cpu_b2 { |
| 101 | cpu-supply = <&vdd_cpu_big1_s0>; |
| 102 | }; |
| 103 | |
| 104 | &cpu_b3 { |
| 105 | cpu-supply = <&vdd_cpu_big1_s0>; |
| 106 | }; |
| 107 | |
| 108 | &cpu_l0 { |
| 109 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 110 | }; |
| 111 | |
| 112 | &cpu_l1 { |
| 113 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 114 | }; |
| 115 | |
| 116 | &cpu_l2 { |
| 117 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 118 | }; |
| 119 | |
| 120 | &cpu_l3 { |
| 121 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 122 | }; |
| 123 | |
| 124 | &gmac0 { |
| 125 | clock_in_out = "output"; |
| 126 | phy-handle = <&rgmii_phy>; |
| 127 | phy-mode = "rgmii-rxid"; |
| 128 | pinctrl-0 = <&gmac0_miim |
| 129 | &gmac0_tx_bus2 |
| 130 | &gmac0_rx_bus2 |
| 131 | &gmac0_rgmii_clk |
| 132 | &gmac0_rgmii_bus>; |
| 133 | pinctrl-names = "default"; |
| 134 | rx_delay = <0x00>; |
| 135 | tx_delay = <0x43>; |
| 136 | status = "okay"; |
| 137 | }; |
| 138 | |
| 139 | &i2c0 { |
| 140 | pinctrl-0 = <&i2c0m2_xfer>; |
| 141 | status = "okay"; |
| 142 | |
| 143 | vdd_cpu_big0_s0: regulator@42 { |
| 144 | compatible = "rockchip,rk8602"; |
| 145 | reg = <0x42>; |
| 146 | fcs,suspend-voltage-selector = <1>; |
| 147 | regulator-name = "vdd_cpu_big0_s0"; |
| 148 | regulator-always-on; |
| 149 | regulator-boot-on; |
| 150 | regulator-min-microvolt = <550000>; |
| 151 | regulator-max-microvolt = <1050000>; |
| 152 | regulator-ramp-delay = <2300>; |
| 153 | vin-supply = <&vcc5v0_sys>; |
| 154 | |
| 155 | regulator-state-mem { |
| 156 | regulator-off-in-suspend; |
| 157 | }; |
| 158 | }; |
| 159 | |
| 160 | vdd_cpu_big1_s0: regulator@43 { |
| 161 | compatible = "rockchip,rk8603", "rockchip,rk8602"; |
| 162 | reg = <0x43>; |
| 163 | fcs,suspend-voltage-selector = <1>; |
| 164 | regulator-name = "vdd_cpu_big1_s0"; |
| 165 | regulator-always-on; |
| 166 | regulator-boot-on; |
| 167 | regulator-min-microvolt = <550000>; |
| 168 | regulator-max-microvolt = <1050000>; |
| 169 | regulator-ramp-delay = <2300>; |
| 170 | vin-supply = <&vcc5v0_sys>; |
| 171 | |
| 172 | regulator-state-mem { |
| 173 | regulator-off-in-suspend; |
| 174 | }; |
| 175 | }; |
| 176 | }; |
| 177 | |
| 178 | &i2c2 { |
| 179 | status = "okay"; |
| 180 | |
| 181 | vdd_npu_s0: regulator@42 { |
| 182 | compatible = "rockchip,rk8602"; |
| 183 | reg = <0x42>; |
| 184 | fcs,suspend-voltage-selector = <1>; |
| 185 | regulator-name = "vdd_npu_s0"; |
| 186 | regulator-always-on; |
| 187 | regulator-boot-on; |
| 188 | regulator-min-microvolt = <550000>; |
| 189 | regulator-max-microvolt = <950000>; |
| 190 | regulator-ramp-delay = <2300>; |
| 191 | vin-supply = <&vcc5v0_sys>; |
| 192 | |
| 193 | regulator-state-mem { |
| 194 | regulator-off-in-suspend; |
| 195 | }; |
| 196 | }; |
| 197 | }; |
| 198 | |
| 199 | &i2c6 { |
| 200 | status = "okay"; |
| 201 | |
| 202 | hym8563: rtc@51 { |
| 203 | compatible = "haoyu,hym8563"; |
| 204 | reg = <0x51>; |
| 205 | interrupt-parent = <&gpio0>; |
| 206 | interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>; |
| 207 | #clock-cells = <0>; |
| 208 | clock-output-names = "hym8563"; |
| 209 | pinctrl-names = "default"; |
| 210 | pinctrl-0 = <&hym8563_int>; |
| 211 | wakeup-source; |
| 212 | }; |
| 213 | }; |
| 214 | |
| 215 | &i2c7 { |
| 216 | pinctrl-0 = <&i2c7m0_xfer>; |
| 217 | status = "okay"; |
| 218 | |
| 219 | es8316: audio-codec@11 { |
| 220 | compatible = "everest,es8316"; |
| 221 | reg = <0x11>; |
| 222 | assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; |
| 223 | assigned-clock-rates = <12288000>; |
| 224 | clocks = <&cru I2S0_8CH_MCLKOUT>; |
| 225 | clock-names = "mclk"; |
| 226 | #sound-dai-cells = <0>; |
| 227 | |
| 228 | port { |
| 229 | es8316_p0_0: endpoint { |
| 230 | remote-endpoint = <&i2s0_8ch_p0_0>; |
| 231 | }; |
| 232 | }; |
| 233 | }; |
| 234 | }; |
| 235 | |
| 236 | &i2s0_8ch { |
| 237 | pinctrl-0 = <&i2s0_lrck |
| 238 | &i2s0_mclk |
| 239 | &i2s0_sclk |
| 240 | &i2s0_sdi0 |
| 241 | &i2s0_sdo0>; |
| 242 | status = "okay"; |
| 243 | |
| 244 | i2s0_8ch_p0: port { |
| 245 | i2s0_8ch_p0_0: endpoint { |
| 246 | dai-format = "i2s"; |
| 247 | mclk-fs = <256>; |
| 248 | remote-endpoint = <&es8316_p0_0>; |
| 249 | }; |
| 250 | }; |
| 251 | }; |
| 252 | |
| 253 | &mdio0 { |
| 254 | rgmii_phy: ethernet-phy@1 { |
| 255 | /* YT8531C/H */ |
| 256 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 257 | reg = <0x1>; |
| 258 | pinctrl-names = "default"; |
| 259 | pinctrl-0 = <&yt8531_rst>; |
| 260 | reset-assert-us = <20000>; |
| 261 | reset-deassert-us = <100000>; |
| 262 | reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; |
| 263 | }; |
| 264 | }; |
| 265 | |
| 266 | /* ethernet */ |
| 267 | &pcie2x1l2 { |
| 268 | reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; |
| 269 | vpcie3v3-supply = <&vcc3v3_sys>; |
| 270 | pinctrl-names = "default"; |
| 271 | pinctrl-0 = <&yt6801_isolate>; |
| 272 | status = "okay"; |
| 273 | }; |
| 274 | |
| 275 | &pinctrl { |
| 276 | hym8563 { |
| 277 | hym8563_int: hym8563-int { |
| 278 | rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; |
| 279 | }; |
| 280 | }; |
| 281 | |
| 282 | yt6801 { |
| 283 | yt6801_isolate: yt6801-isolate { |
| 284 | rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; |
| 285 | }; |
| 286 | }; |
| 287 | |
| 288 | yt8531 { |
| 289 | yt8531_rst: yt8531-rst { |
| 290 | rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; |
| 291 | }; |
| 292 | }; |
| 293 | }; |
| 294 | |
| 295 | &saradc { |
| 296 | vref-supply = <&vcc_1v8_s0>; |
| 297 | status = "okay"; |
| 298 | }; |
| 299 | |
| 300 | &sdhci { |
| 301 | bus-width = <8>; |
| 302 | max-frequency = <200000000>; |
| 303 | mmc-hs400-1_8v; |
| 304 | mmc-hs400-enhanced-strobe; |
| 305 | no-sdio; |
| 306 | no-sd; |
| 307 | non-removable; |
| 308 | status = "okay"; |
| 309 | }; |
| 310 | |
| 311 | &sdmmc { |
| 312 | bus-width = <4>; |
| 313 | cap-mmc-highspeed; |
| 314 | cap-sd-highspeed; |
| 315 | disable-wp; |
| 316 | max-frequency = <150000000>; |
| 317 | no-sdio; |
| 318 | no-mmc; |
| 319 | sd-uhs-sdr104; |
| 320 | vqmmc-supply = <&vccio_sd_s0>; |
| 321 | status = "okay"; |
| 322 | }; |
| 323 | |
| 324 | &spi2 { |
| 325 | assigned-clocks = <&cru CLK_SPI2>; |
| 326 | assigned-clock-rates = <200000000>; |
| 327 | num-cs = <1>; |
| 328 | pinctrl-names = "default"; |
| 329 | pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; |
| 330 | status = "okay"; |
| 331 | |
| 332 | pmic@0 { |
| 333 | compatible = "rockchip,rk806"; |
| 334 | reg = <0x0>; |
| 335 | interrupt-parent = <&gpio0>; |
| 336 | interrupts = <7 IRQ_TYPE_LEVEL_LOW>; |
| 337 | gpio-controller; |
| 338 | #gpio-cells = <2>; |
| 339 | pinctrl-names = "default"; |
| 340 | pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, |
| 341 | <&rk806_dvs2_null>, <&rk806_dvs3_null>; |
| 342 | spi-max-frequency = <1000000>; |
| 343 | vcc1-supply = <&vcc5v0_sys>; |
| 344 | vcc2-supply = <&vcc5v0_sys>; |
| 345 | vcc3-supply = <&vcc5v0_sys>; |
| 346 | vcc4-supply = <&vcc5v0_sys>; |
| 347 | vcc5-supply = <&vcc5v0_sys>; |
| 348 | vcc6-supply = <&vcc5v0_sys>; |
| 349 | vcc7-supply = <&vcc5v0_sys>; |
| 350 | vcc8-supply = <&vcc5v0_sys>; |
| 351 | vcc9-supply = <&vcc5v0_sys>; |
| 352 | vcc10-supply = <&vcc5v0_sys>; |
| 353 | vcc11-supply = <&vcc_2v0_pldo_s3>; |
| 354 | vcc12-supply = <&vcc5v0_sys>; |
| 355 | vcc13-supply = <&vcc_2v0_pldo_s3>; |
| 356 | vcc14-supply = <&vcc_2v0_pldo_s3>; |
| 357 | vcca-supply = <&vcc5v0_sys>; |
| 358 | |
| 359 | rk806_dvs1_null: dvs1-null-pins { |
| 360 | pins = "gpio_pwrctrl2"; |
| 361 | function = "pin_fun0"; |
| 362 | }; |
| 363 | |
| 364 | rk806_dvs2_null: dvs2-null-pins { |
| 365 | pins = "gpio_pwrctrl2"; |
| 366 | function = "pin_fun0"; |
| 367 | }; |
| 368 | |
| 369 | rk806_dvs3_null: dvs3-null-pins { |
| 370 | pins = "gpio_pwrctrl3"; |
| 371 | function = "pin_fun0"; |
| 372 | }; |
| 373 | |
| 374 | regulators { |
| 375 | vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { |
| 376 | regulator-boot-on; |
| 377 | regulator-min-microvolt = <550000>; |
| 378 | regulator-max-microvolt = <950000>; |
| 379 | regulator-ramp-delay = <12500>; |
| 380 | regulator-name = "vdd_gpu_s0"; |
| 381 | regulator-enable-ramp-delay = <400>; |
| 382 | |
| 383 | regulator-state-mem { |
| 384 | regulator-off-in-suspend; |
| 385 | }; |
| 386 | }; |
| 387 | |
| 388 | vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { |
| 389 | regulator-always-on; |
| 390 | regulator-boot-on; |
| 391 | regulator-min-microvolt = <550000>; |
| 392 | regulator-max-microvolt = <950000>; |
| 393 | regulator-ramp-delay = <12500>; |
| 394 | regulator-name = "vdd_cpu_lit_s0"; |
| 395 | |
| 396 | regulator-state-mem { |
| 397 | regulator-off-in-suspend; |
| 398 | }; |
| 399 | }; |
| 400 | |
| 401 | vdd_log_s0: dcdc-reg3 { |
| 402 | regulator-always-on; |
| 403 | regulator-boot-on; |
| 404 | regulator-min-microvolt = <675000>; |
| 405 | regulator-max-microvolt = <750000>; |
| 406 | regulator-ramp-delay = <12500>; |
| 407 | regulator-name = "vdd_log_s0"; |
| 408 | |
| 409 | regulator-state-mem { |
| 410 | regulator-off-in-suspend; |
| 411 | regulator-suspend-microvolt = <750000>; |
| 412 | }; |
| 413 | }; |
| 414 | |
| 415 | vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { |
| 416 | regulator-always-on; |
| 417 | regulator-boot-on; |
| 418 | regulator-min-microvolt = <550000>; |
| 419 | regulator-max-microvolt = <950000>; |
| 420 | regulator-ramp-delay = <12500>; |
| 421 | regulator-name = "vdd_vdenc_s0"; |
| 422 | |
| 423 | regulator-state-mem { |
| 424 | regulator-off-in-suspend; |
| 425 | }; |
| 426 | }; |
| 427 | |
| 428 | vdd_ddr_s0: dcdc-reg5 { |
| 429 | regulator-always-on; |
| 430 | regulator-boot-on; |
| 431 | regulator-min-microvolt = <675000>; |
| 432 | regulator-max-microvolt = <900000>; |
| 433 | regulator-ramp-delay = <12500>; |
| 434 | regulator-name = "vdd_ddr_s0"; |
| 435 | |
| 436 | regulator-state-mem { |
| 437 | regulator-off-in-suspend; |
| 438 | regulator-suspend-microvolt = <850000>; |
| 439 | }; |
| 440 | }; |
| 441 | |
| 442 | vdd2_ddr_s3: dcdc-reg6 { |
| 443 | regulator-always-on; |
| 444 | regulator-boot-on; |
| 445 | regulator-name = "vdd2_ddr_s3"; |
| 446 | |
| 447 | regulator-state-mem { |
| 448 | regulator-on-in-suspend; |
| 449 | }; |
| 450 | }; |
| 451 | |
| 452 | vcc_2v0_pldo_s3: dcdc-reg7 { |
| 453 | regulator-always-on; |
| 454 | regulator-boot-on; |
| 455 | regulator-min-microvolt = <2000000>; |
| 456 | regulator-max-microvolt = <2000000>; |
| 457 | regulator-ramp-delay = <12500>; |
| 458 | regulator-name = "vdd_2v0_pldo_s3"; |
| 459 | |
| 460 | regulator-state-mem { |
| 461 | regulator-on-in-suspend; |
| 462 | regulator-suspend-microvolt = <2000000>; |
| 463 | }; |
| 464 | }; |
| 465 | |
| 466 | vcc_3v3_s3: dcdc-reg8 { |
| 467 | regulator-always-on; |
| 468 | regulator-boot-on; |
| 469 | regulator-min-microvolt = <3300000>; |
| 470 | regulator-max-microvolt = <3300000>; |
| 471 | regulator-name = "vcc_3v3_s3"; |
| 472 | |
| 473 | regulator-state-mem { |
| 474 | regulator-on-in-suspend; |
| 475 | regulator-suspend-microvolt = <3300000>; |
| 476 | }; |
| 477 | }; |
| 478 | |
| 479 | vddq_ddr_s0: dcdc-reg9 { |
| 480 | regulator-always-on; |
| 481 | regulator-boot-on; |
| 482 | regulator-name = "vddq_ddr_s0"; |
| 483 | |
| 484 | regulator-state-mem { |
| 485 | regulator-off-in-suspend; |
| 486 | }; |
| 487 | }; |
| 488 | |
| 489 | vcc_1v8_s3: dcdc-reg10 { |
| 490 | regulator-always-on; |
| 491 | regulator-boot-on; |
| 492 | regulator-min-microvolt = <1800000>; |
| 493 | regulator-max-microvolt = <1800000>; |
| 494 | regulator-name = "vcc_1v8_s3"; |
| 495 | |
| 496 | regulator-state-mem { |
| 497 | regulator-on-in-suspend; |
| 498 | regulator-suspend-microvolt = <1800000>; |
| 499 | }; |
| 500 | }; |
| 501 | |
| 502 | avcc_1v8_s0: pldo-reg1 { |
| 503 | regulator-always-on; |
| 504 | regulator-boot-on; |
| 505 | regulator-min-microvolt = <1800000>; |
| 506 | regulator-max-microvolt = <1800000>; |
| 507 | regulator-name = "avcc_1v8_s0"; |
| 508 | |
| 509 | regulator-state-mem { |
| 510 | regulator-off-in-suspend; |
| 511 | }; |
| 512 | }; |
| 513 | |
| 514 | vcc_1v8_s0: pldo-reg2 { |
| 515 | regulator-always-on; |
| 516 | regulator-boot-on; |
| 517 | regulator-min-microvolt = <1800000>; |
| 518 | regulator-max-microvolt = <1800000>; |
| 519 | regulator-name = "vcc_1v8_s0"; |
| 520 | |
| 521 | regulator-state-mem { |
| 522 | regulator-off-in-suspend; |
| 523 | regulator-suspend-microvolt = <1800000>; |
| 524 | }; |
| 525 | }; |
| 526 | |
| 527 | avdd_1v2_s0: pldo-reg3 { |
| 528 | regulator-always-on; |
| 529 | regulator-boot-on; |
| 530 | regulator-min-microvolt = <1200000>; |
| 531 | regulator-max-microvolt = <1200000>; |
| 532 | regulator-name = "avdd_1v2_s0"; |
| 533 | |
| 534 | regulator-state-mem { |
| 535 | regulator-off-in-suspend; |
| 536 | }; |
| 537 | }; |
| 538 | |
| 539 | vcc_3v3_s0: pldo-reg4 { |
| 540 | regulator-always-on; |
| 541 | regulator-boot-on; |
| 542 | regulator-min-microvolt = <3300000>; |
| 543 | regulator-max-microvolt = <3300000>; |
| 544 | regulator-ramp-delay = <12500>; |
| 545 | regulator-name = "vcc_3v3_s0"; |
| 546 | |
| 547 | regulator-state-mem { |
| 548 | regulator-off-in-suspend; |
| 549 | }; |
| 550 | }; |
| 551 | |
| 552 | vccio_sd_s0: pldo-reg5 { |
| 553 | regulator-always-on; |
| 554 | regulator-boot-on; |
| 555 | regulator-min-microvolt = <1800000>; |
| 556 | regulator-max-microvolt = <3300000>; |
| 557 | regulator-ramp-delay = <12500>; |
| 558 | regulator-name = "vccio_sd_s0"; |
| 559 | |
| 560 | regulator-state-mem { |
| 561 | regulator-off-in-suspend; |
| 562 | }; |
| 563 | }; |
| 564 | |
| 565 | pldo6_s3: pldo-reg6 { |
| 566 | regulator-always-on; |
| 567 | regulator-boot-on; |
| 568 | regulator-min-microvolt = <1800000>; |
| 569 | regulator-max-microvolt = <1800000>; |
| 570 | regulator-name = "pldo6_s3"; |
| 571 | |
| 572 | regulator-state-mem { |
| 573 | regulator-on-in-suspend; |
| 574 | regulator-suspend-microvolt = <1800000>; |
| 575 | }; |
| 576 | }; |
| 577 | |
| 578 | vdd_0v75_s3: nldo-reg1 { |
| 579 | regulator-always-on; |
| 580 | regulator-boot-on; |
| 581 | regulator-min-microvolt = <750000>; |
| 582 | regulator-max-microvolt = <750000>; |
| 583 | regulator-name = "vdd_0v75_s3"; |
| 584 | |
| 585 | regulator-state-mem { |
| 586 | regulator-on-in-suspend; |
| 587 | regulator-suspend-microvolt = <750000>; |
| 588 | }; |
| 589 | }; |
| 590 | |
| 591 | vdd_ddr_pll_s0: nldo-reg2 { |
| 592 | regulator-always-on; |
| 593 | regulator-boot-on; |
| 594 | regulator-min-microvolt = <850000>; |
| 595 | regulator-max-microvolt = <850000>; |
| 596 | regulator-name = "vdd_ddr_pll_s0"; |
| 597 | |
| 598 | regulator-state-mem { |
| 599 | regulator-off-in-suspend; |
| 600 | regulator-suspend-microvolt = <850000>; |
| 601 | }; |
| 602 | }; |
| 603 | |
| 604 | avdd_0v75_s0: nldo-reg3 { |
| 605 | regulator-always-on; |
| 606 | regulator-boot-on; |
| 607 | regulator-min-microvolt = <750000>; |
| 608 | regulator-max-microvolt = <750000>; |
| 609 | regulator-name = "avdd_0v75_s0"; |
| 610 | |
| 611 | regulator-state-mem { |
| 612 | regulator-off-in-suspend; |
| 613 | }; |
| 614 | }; |
| 615 | |
| 616 | vdd_0v85_s0: nldo-reg4 { |
| 617 | regulator-always-on; |
| 618 | regulator-boot-on; |
| 619 | regulator-min-microvolt = <850000>; |
| 620 | regulator-max-microvolt = <850000>; |
| 621 | regulator-name = "vdd_0v85_s0"; |
| 622 | |
| 623 | regulator-state-mem { |
| 624 | regulator-off-in-suspend; |
| 625 | }; |
| 626 | }; |
| 627 | |
| 628 | vdd_0v75_s0: nldo-reg5 { |
| 629 | regulator-always-on; |
| 630 | regulator-boot-on; |
| 631 | regulator-min-microvolt = <750000>; |
| 632 | regulator-max-microvolt = <750000>; |
| 633 | regulator-name = "vdd_0v75_s0"; |
| 634 | |
| 635 | regulator-state-mem { |
| 636 | regulator-off-in-suspend; |
| 637 | }; |
| 638 | }; |
| 639 | }; |
| 640 | }; |
| 641 | }; |
| 642 | |
| 643 | &tsadc { |
| 644 | status = "okay"; |
| 645 | }; |
| 646 | |
| 647 | &uart2 { |
| 648 | pinctrl-0 = <&uart2m0_xfer>; |
| 649 | status = "okay"; |
| 650 | }; |