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git01.mediatek.com / filogic / uboot / 3b829a2c0bac0f9767988942751eaac8e3ade5e0 / . / dts / upstream / src / arm64 / rockchip / rk3399-sapphire-excavator.dts
blob: dbec2b7173a0b677a032fa71b5d6e65e33a1ab24 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6/dts-v1/;
7#include "rk3399-sapphire.dtsi"
8
9/ {
10 model = "Excavator-RK3399 Board";
11 compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399";
12
13 aliases {
14 mmc2 = &sdio0;
15 };
16
17 adc-keys {
18 compatible = "adc-keys";
19 io-channels = <&saradc 1>;
20 io-channel-names = "buttons";
21 keyup-threshold-microvolt = <1800000>;
22 poll-interval = <100>;
23
24 button-up {
25 label = "Volume Up";
26 linux,code = <KEY_VOLUMEUP>;
27 press-threshold-microvolt = <100000>;
28 };
29
30 button-down {
31 label = "Volume Down";
32 linux,code = <KEY_VOLUMEDOWN>;
33 press-threshold-microvolt = <300000>;
34 };
35
36 button-back {
37 label = "Back";
38 linux,code = <KEY_BACK>;
39 press-threshold-microvolt = <985000>;
40 };
41
42 button-menu {
43 label = "Menu";
44 linux,code = <KEY_MENU>;
45 press-threshold-microvolt = <1314000>;
46 };
47 };
48
49 backlight: backlight {
50 compatible = "pwm-backlight";
51 brightness-levels = <
52 0 1 2 3 4 5 6 7
53 8 9 10 11 12 13 14 15
54 16 17 18 19 20 21 22 23
55 24 25 26 27 28 29 30 31
56 32 33 34 35 36 37 38 39
57 40 41 42 43 44 45 46 47
58 48 49 50 51 52 53 54 55
59 56 57 58 59 60 61 62 63
60 64 65 66 67 68 69 70 71
61 72 73 74 75 76 77 78 79
62 80 81 82 83 84 85 86 87
63 88 89 90 91 92 93 94 95
64 96 97 98 99 100 101 102 103
65 104 105 106 107 108 109 110 111
66 112 113 114 115 116 117 118 119
67 120 121 122 123 124 125 126 127
68 128 129 130 131 132 133 134 135
69 136 137 138 139 140 141 142 143
70 144 145 146 147 148 149 150 151
71 152 153 154 155 156 157 158 159
72 160 161 162 163 164 165 166 167
73 168 169 170 171 172 173 174 175
74 176 177 178 179 180 181 182 183
75 184 185 186 187 188 189 190 191
76 192 193 194 195 196 197 198 199
77 200 201 202 203 204 205 206 207
78 208 209 210 211 212 213 214 215
79 216 217 218 219 220 221 222 223
80 224 225 226 227 228 229 230 231
81 232 233 234 235 236 237 238 239
82 240 241 242 243 244 245 246 247
83 248 249 250 251 252 253 254 255>;
84 default-brightness-level = <200>;
85 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
86 pwms = <&pwm0 0 25000 0>;
87 status = "okay";
88 };
89
90 edp_panel: edp-panel {
91 compatible = "lg,lp079qx1-sp0v";
92 backlight = <&backlight>;
93 enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&lcd_panel_reset>;
96 power-supply = <&vcc3v3_s0>;
97
98 port {
99 panel_in_edp: endpoint {
100 remote-endpoint = <&edp_out_panel>;
101 };
102 };
103 };
104
105 rt5651-sound {
106 compatible = "simple-audio-card";
107 simple-audio-card,name = "realtek,rt5651-codec";
108 simple-audio-card,format = "i2s";
109 simple-audio-card,mclk-fs = <256>;
110 simple-audio-card,widgets =
111 "Microphone", "Mic Jack",
112 "Headphone", "Headphone Jack";
113 simple-audio-card,routing =
114 "Mic Jack", "MICBIAS1",
115 "IN1P", "Mic Jack",
116 "Headphone Jack", "HPOL",
117 "Headphone Jack", "HPOR";
118 simple-audio-card,cpu {
119 sound-dai = <&i2s0>;
120 };
121 simple-audio-card,codec {
122 sound-dai = <&rt5651>;
123 };
124 };
125
126 sdio_pwrseq: sdio-pwrseq {
127 compatible = "mmc-pwrseq-simple";
128 clocks = <&rk808 1>;
129 clock-names = "ext_clock";
130 pinctrl-names = "default";
131 pinctrl-0 = <&wifi_enable_h>;
132
133 /*
134 * On the module itself this is one of these (depending
135 * on the actual card populated):
136 * - SDIO_RESET_L_WL_REG_ON
137 * - PDN (power down when low)
138 */
139 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
140 };
141};
142
143&edp {
144 status = "okay";
145
146 ports {
147 edp_out: port@1 {
148 reg = <1>;
149 #address-cells = <1>;
150 #size-cells = <0>;
151
152 edp_out_panel: endpoint@0 {
153 reg = <0>;
154 remote-endpoint = <&panel_in_edp>;
155 };
156 };
157 };
158};
159
160&i2c1 {
161 i2c-scl-rising-time-ns = <300>;
162 i2c-scl-falling-time-ns = <15>;
163 status = "okay";
164
165 rt5651: rt5651@1a {
166 compatible = "rockchip,rt5651";
167 reg = <0x1a>;
168 clocks = <&cru SCLK_I2S_8CH_OUT>;
169 clock-names = "mclk";
170 hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
171 spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
172 #sound-dai-cells = <0>;
173 };
174};
175
176&i2c4 {
177 i2c-scl-rising-time-ns = <600>;
178 i2c-scl-falling-time-ns = <20>;
179 status = "okay";
180
181 accelerometer@68 {
182 compatible = "invensense,mpu6500";
183 reg = <0x68>;
184 interrupt-parent = <&gpio1>;
185 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
186 };
187};
188
189&i2s0 {
190 rockchip,playback-channels = <8>;
191 rockchip,capture-channels = <8>;
192 status = "okay";
193};
194
195&pcie_phy {
196 status = "okay";
197};
198
199&pcie0 {
200 ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
201 num-lanes = <4>;
202 pinctrl-names = "default";
203 pinctrl-0 = <&pcie_clkreqn_cpm>;
204 status = "okay";
205};
206
207&pinctrl {
208 sdio-pwrseq {
209 wifi_enable_h: wifi-enable-h {
210 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
211 };
212 };
213
214 lcd-panel {
215 lcd_panel_reset: lcd-panel-reset {
216 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
217 };
218 };
219};
220
221&sdio0 {
222 bus-width = <4>;
223 cap-sd-highspeed;
224 cap-sdio-irq;
225 clock-frequency = <50000000>;
226 keep-power-in-suspend;
227 max-frequency = <50000000>;
228 mmc-pwrseq = <&sdio_pwrseq>;
229 non-removable;
230 pinctrl-names = "default";
231 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
232 sd-uhs-sdr104;
233 status = "okay";
234};
235
236&spdif {
237 status = "okay";
238};